Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8217357 |
1 |
|
|
T1 |
989 |
|
T2 |
562 |
|
T11 |
135 |
| auto[1] |
5990386 |
1 |
|
|
T1 |
943 |
|
T2 |
376 |
|
T13 |
451 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
11747266 |
1 |
|
|
T1 |
1177 |
|
T2 |
468 |
|
T11 |
135 |
| auto[1] |
2460477 |
1 |
|
|
T1 |
755 |
|
T2 |
470 |
|
T13 |
235 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8222923 |
1 |
|
|
T1 |
853 |
|
T2 |
295 |
|
T11 |
135 |
| auto[1] |
5984820 |
1 |
|
|
T1 |
1079 |
|
T2 |
643 |
|
T13 |
516 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1762844 |
1 |
|
|
T1 |
154 |
|
T2 |
90 |
|
T13 |
157 |
| auto[1] |
auto[0] |
auto[1] |
1232441 |
1 |
|
|
T1 |
388 |
|
T2 |
313 |
|
T13 |
127 |
| auto[1] |
auto[1] |
auto[0] |
1761499 |
1 |
|
|
T1 |
170 |
|
T2 |
83 |
|
T13 |
124 |
| auto[1] |
auto[1] |
auto[1] |
1228036 |
1 |
|
|
T1 |
367 |
|
T2 |
157 |
|
T13 |
108 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |