cp_pins | cp_stable_cycles | cp_pin_value | cp_filter_en | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[0] |
auto[0] |
61088 |
1 |
|
|
T24 |
536 |
|
T17 |
574 |
|
T97 |
1295 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46394 |
1 |
|
|
T24 |
383 |
|
T17 |
839 |
|
T97 |
837 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59502 |
1 |
|
|
T24 |
283 |
|
T17 |
229 |
|
T97 |
2316 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47251 |
1 |
|
|
T24 |
1485 |
|
T17 |
215 |
|
T97 |
884 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
781 |
1 |
|
|
T24 |
6 |
|
T17 |
6 |
|
T97 |
22 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1697 |
1 |
|
|
T24 |
18 |
|
T17 |
8 |
|
T97 |
44 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T24 |
6 |
|
T17 |
5 |
|
T97 |
23 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1714 |
1 |
|
|
T24 |
18 |
|
T17 |
8 |
|
T97 |
44 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
781 |
1 |
|
|
T24 |
6 |
|
T17 |
6 |
|
T97 |
22 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1663 |
1 |
|
|
T24 |
18 |
|
T17 |
7 |
|
T97 |
44 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T24 |
6 |
|
T17 |
5 |
|
T97 |
23 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1681 |
1 |
|
|
T24 |
17 |
|
T17 |
8 |
|
T97 |
43 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
781 |
1 |
|
|
T24 |
6 |
|
T17 |
6 |
|
T97 |
22 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1625 |
1 |
|
|
T24 |
18 |
|
T17 |
7 |
|
T97 |
41 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
765 |
1 |
|
|
T24 |
6 |
|
T17 |
5 |
|
T97 |
22 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1646 |
1 |
|
|
T24 |
15 |
|
T17 |
8 |
|
T97 |
42 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
781 |
1 |
|
|
T24 |
6 |
|
T17 |
6 |
|
T97 |
22 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1592 |
1 |
|
|
T24 |
17 |
|
T17 |
7 |
|
T97 |
38 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
765 |
1 |
|
|
T24 |
6 |
|
T17 |
5 |
|
T97 |
22 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1616 |
1 |
|
|
T24 |
15 |
|
T17 |
8 |
|
T97 |
42 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
777 |
1 |
|
|
T24 |
6 |
|
T17 |
6 |
|
T97 |
22 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1555 |
1 |
|
|
T24 |
16 |
|
T17 |
7 |
|
T97 |
38 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
764 |
1 |
|
|
T24 |
6 |
|
T17 |
5 |
|
T97 |
22 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1591 |
1 |
|
|
T24 |
15 |
|
T17 |
7 |
|
T97 |
42 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
777 |
1 |
|
|
T24 |
6 |
|
T17 |
6 |
|
T97 |
22 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1527 |
1 |
|
|
T24 |
15 |
|
T17 |
7 |
|
T97 |
37 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
764 |
1 |
|
|
T24 |
6 |
|
T17 |
5 |
|
T97 |
22 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1552 |
1 |
|
|
T24 |
15 |
|
T17 |
7 |
|
T97 |
41 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
773 |
1 |
|
|
T24 |
6 |
|
T17 |
6 |
|
T97 |
22 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1499 |
1 |
|
|
T24 |
15 |
|
T17 |
7 |
|
T97 |
36 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T24 |
6 |
|
T17 |
5 |
|
T97 |
22 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1512 |
1 |
|
|
T24 |
14 |
|
T17 |
7 |
|
T97 |
39 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
773 |
1 |
|
|
T24 |
6 |
|
T17 |
6 |
|
T97 |
22 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1452 |
1 |
|
|
T24 |
15 |
|
T17 |
7 |
|
T97 |
36 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T24 |
6 |
|
T17 |
5 |
|
T97 |
22 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1465 |
1 |
|
|
T24 |
14 |
|
T17 |
7 |
|
T97 |
37 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
766 |
1 |
|
|
T24 |
6 |
|
T17 |
6 |
|
T97 |
22 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1415 |
1 |
|
|
T24 |
15 |
|
T17 |
7 |
|
T97 |
36 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T24 |
6 |
|
T17 |
5 |
|
T97 |
22 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1425 |
1 |
|
|
T24 |
13 |
|
T17 |
7 |
|
T97 |
35 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
766 |
1 |
|
|
T24 |
6 |
|
T17 |
6 |
|
T97 |
22 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1389 |
1 |
|
|
T24 |
14 |
|
T17 |
7 |
|
T97 |
36 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T24 |
6 |
|
T17 |
5 |
|
T97 |
22 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1401 |
1 |
|
|
T24 |
10 |
|
T17 |
7 |
|
T97 |
35 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
763 |
1 |
|
|
T24 |
6 |
|
T17 |
6 |
|
T97 |
22 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1356 |
1 |
|
|
T24 |
14 |
|
T17 |
7 |
|
T97 |
35 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T24 |
6 |
|
T17 |
5 |
|
T97 |
22 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1368 |
1 |
|
|
T24 |
10 |
|
T17 |
5 |
|
T97 |
35 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
763 |
1 |
|
|
T24 |
6 |
|
T17 |
6 |
|
T97 |
22 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1322 |
1 |
|
|
T24 |
14 |
|
T17 |
7 |
|
T97 |
34 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T24 |
6 |
|
T17 |
5 |
|
T97 |
22 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1334 |
1 |
|
|
T24 |
10 |
|
T17 |
5 |
|
T97 |
35 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
763 |
1 |
|
|
T24 |
6 |
|
T17 |
6 |
|
T97 |
22 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1280 |
1 |
|
|
T24 |
14 |
|
T17 |
7 |
|
T97 |
34 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T24 |
6 |
|
T17 |
5 |
|
T97 |
22 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1301 |
1 |
|
|
T24 |
10 |
|
T17 |
5 |
|
T97 |
34 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
763 |
1 |
|
|
T24 |
6 |
|
T17 |
6 |
|
T97 |
22 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1241 |
1 |
|
|
T24 |
14 |
|
T17 |
7 |
|
T97 |
33 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T24 |
6 |
|
T17 |
5 |
|
T97 |
22 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1266 |
1 |
|
|
T24 |
9 |
|
T17 |
5 |
|
T97 |
34 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
763 |
1 |
|
|
T24 |
6 |
|
T17 |
6 |
|
T97 |
22 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1202 |
1 |
|
|
T24 |
14 |
|
T17 |
7 |
|
T97 |
33 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T24 |
6 |
|
T17 |
5 |
|
T97 |
22 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1239 |
1 |
|
|
T24 |
9 |
|
T17 |
5 |
|
T97 |
33 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56557 |
1 |
|
|
T24 |
498 |
|
T17 |
722 |
|
T97 |
1829 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47376 |
1 |
|
|
T24 |
282 |
|
T17 |
314 |
|
T97 |
987 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[1] |
auto[0] |
62571 |
1 |
|
|
T24 |
256 |
|
T17 |
388 |
|
T97 |
1568 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48455 |
1 |
|
|
T24 |
1664 |
|
T17 |
318 |
|
T97 |
930 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T24 |
6 |
|
T17 |
4 |
|
T97 |
22 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1700 |
1 |
|
|
T24 |
15 |
|
T17 |
14 |
|
T97 |
46 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T24 |
7 |
|
T17 |
3 |
|
T97 |
25 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1710 |
1 |
|
|
T24 |
14 |
|
T17 |
14 |
|
T97 |
43 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T24 |
6 |
|
T17 |
4 |
|
T97 |
22 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1660 |
1 |
|
|
T24 |
14 |
|
T17 |
14 |
|
T97 |
44 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T24 |
7 |
|
T17 |
3 |
|
T97 |
25 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1675 |
1 |
|
|
T24 |
14 |
|
T17 |
14 |
|
T97 |
41 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T24 |
6 |
|
T17 |
4 |
|
T97 |
22 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1634 |
1 |
|
|
T24 |
14 |
|
T17 |
14 |
|
T97 |
42 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T24 |
7 |
|
T17 |
3 |
|
T97 |
25 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1636 |
1 |
|
|
T24 |
14 |
|
T17 |
14 |
|
T97 |
40 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T24 |
6 |
|
T17 |
4 |
|
T97 |
22 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1603 |
1 |
|
|
T24 |
14 |
|
T17 |
14 |
|
T97 |
40 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T24 |
7 |
|
T17 |
3 |
|
T97 |
25 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1594 |
1 |
|
|
T24 |
14 |
|
T17 |
14 |
|
T97 |
37 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T24 |
6 |
|
T17 |
4 |
|
T97 |
22 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1567 |
1 |
|
|
T24 |
14 |
|
T17 |
13 |
|
T97 |
40 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T24 |
7 |
|
T17 |
3 |
|
T97 |
25 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1555 |
1 |
|
|
T24 |
14 |
|
T17 |
14 |
|
T97 |
35 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T24 |
6 |
|
T17 |
4 |
|
T97 |
22 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1533 |
1 |
|
|
T24 |
14 |
|
T17 |
12 |
|
T97 |
40 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T24 |
7 |
|
T17 |
3 |
|
T97 |
25 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1526 |
1 |
|
|
T24 |
13 |
|
T17 |
14 |
|
T97 |
35 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T24 |
6 |
|
T17 |
3 |
|
T97 |
22 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1500 |
1 |
|
|
T24 |
14 |
|
T17 |
13 |
|
T97 |
39 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T24 |
7 |
|
T17 |
3 |
|
T97 |
25 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1493 |
1 |
|
|
T24 |
13 |
|
T17 |
14 |
|
T97 |
33 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T24 |
6 |
|
T17 |
3 |
|
T97 |
22 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1471 |
1 |
|
|
T24 |
14 |
|
T17 |
13 |
|
T97 |
38 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T24 |
7 |
|
T17 |
3 |
|
T97 |
25 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1461 |
1 |
|
|
T24 |
13 |
|
T17 |
14 |
|
T97 |
33 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T24 |
6 |
|
T17 |
3 |
|
T97 |
22 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1435 |
1 |
|
|
T24 |
14 |
|
T17 |
13 |
|
T97 |
38 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T24 |
7 |
|
T17 |
3 |
|
T97 |
25 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1429 |
1 |
|
|
T24 |
13 |
|
T17 |
14 |
|
T97 |
33 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T24 |
6 |
|
T17 |
3 |
|
T97 |
22 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1409 |
1 |
|
|
T24 |
13 |
|
T17 |
13 |
|
T97 |
37 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T24 |
7 |
|
T17 |
3 |
|
T97 |
25 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1389 |
1 |
|
|
T24 |
13 |
|
T17 |
14 |
|
T97 |
33 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T24 |
6 |
|
T17 |
3 |
|
T97 |
22 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1374 |
1 |
|
|
T24 |
13 |
|
T17 |
12 |
|
T97 |
36 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
731 |
1 |
|
|
T24 |
7 |
|
T17 |
3 |
|
T97 |
25 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1351 |
1 |
|
|
T24 |
13 |
|
T17 |
12 |
|
T97 |
32 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T24 |
6 |
|
T17 |
3 |
|
T97 |
22 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1347 |
1 |
|
|
T24 |
12 |
|
T17 |
12 |
|
T97 |
36 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
731 |
1 |
|
|
T24 |
7 |
|
T17 |
3 |
|
T97 |
25 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1313 |
1 |
|
|
T24 |
13 |
|
T17 |
12 |
|
T97 |
31 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T24 |
6 |
|
T17 |
3 |
|
T97 |
22 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1313 |
1 |
|
|
T24 |
11 |
|
T17 |
12 |
|
T97 |
36 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T24 |
7 |
|
T17 |
3 |
|
T97 |
25 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1269 |
1 |
|
|
T24 |
13 |
|
T17 |
11 |
|
T97 |
31 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T24 |
6 |
|
T17 |
3 |
|
T97 |
22 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1290 |
1 |
|
|
T24 |
11 |
|
T17 |
12 |
|
T97 |
35 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T24 |
7 |
|
T17 |
3 |
|
T97 |
25 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1235 |
1 |
|
|
T24 |
13 |
|
T17 |
11 |
|
T97 |
31 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T24 |
6 |
|
T17 |
3 |
|
T97 |
22 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1267 |
1 |
|
|
T24 |
10 |
|
T17 |
11 |
|
T97 |
35 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T24 |
7 |
|
T17 |
3 |
|
T97 |
25 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1202 |
1 |
|
|
T24 |
13 |
|
T17 |
11 |
|
T97 |
31 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[0] |
auto[0] |
61172 |
1 |
|
|
T24 |
700 |
|
T17 |
409 |
|
T97 |
1103 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[0] |
auto[1] |
51392 |
1 |
|
|
T24 |
1463 |
|
T17 |
922 |
|
T97 |
1945 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[1] |
auto[0] |
58316 |
1 |
|
|
T24 |
448 |
|
T17 |
338 |
|
T97 |
991 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[1] |
auto[1] |
42478 |
1 |
|
|
T24 |
165 |
|
T17 |
99 |
|
T97 |
1157 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T24 |
11 |
|
T17 |
6 |
|
T97 |
18 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1762 |
1 |
|
|
T24 |
8 |
|
T17 |
11 |
|
T97 |
52 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T24 |
9 |
|
T17 |
7 |
|
T97 |
17 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1761 |
1 |
|
|
T24 |
9 |
|
T17 |
9 |
|
T97 |
53 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T24 |
11 |
|
T17 |
6 |
|
T97 |
18 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1728 |
1 |
|
|
T24 |
8 |
|
T17 |
11 |
|
T97 |
52 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T24 |
9 |
|
T17 |
7 |
|
T97 |
17 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1721 |
1 |
|
|
T24 |
8 |
|
T17 |
9 |
|
T97 |
50 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T24 |
11 |
|
T17 |
6 |
|
T97 |
18 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1689 |
1 |
|
|
T24 |
8 |
|
T17 |
11 |
|
T97 |
50 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T24 |
9 |
|
T17 |
7 |
|
T97 |
16 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1681 |
1 |
|
|
T24 |
7 |
|
T17 |
8 |
|
T97 |
49 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T24 |
11 |
|
T17 |
6 |
|
T97 |
18 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1652 |
1 |
|
|
T24 |
8 |
|
T17 |
11 |
|
T97 |
49 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T24 |
9 |
|
T17 |
7 |
|
T97 |
16 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1647 |
1 |
|
|
T24 |
7 |
|
T17 |
8 |
|
T97 |
49 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T24 |
11 |
|
T17 |
6 |
|
T97 |
18 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1615 |
1 |
|
|
T24 |
8 |
|
T17 |
11 |
|
T97 |
49 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T24 |
9 |
|
T17 |
7 |
|
T97 |
16 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1619 |
1 |
|
|
T24 |
7 |
|
T17 |
8 |
|
T97 |
48 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T24 |
11 |
|
T17 |
6 |
|
T97 |
18 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1575 |
1 |
|
|
T24 |
8 |
|
T17 |
11 |
|
T97 |
49 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T24 |
9 |
|
T17 |
7 |
|
T97 |
16 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1588 |
1 |
|
|
T24 |
7 |
|
T17 |
8 |
|
T97 |
48 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T24 |
11 |
|
T17 |
5 |
|
T97 |
18 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1544 |
1 |
|
|
T24 |
8 |
|
T17 |
12 |
|
T97 |
48 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T24 |
9 |
|
T17 |
7 |
|
T97 |
16 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1554 |
1 |
|
|
T24 |
7 |
|
T17 |
8 |
|
T97 |
46 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T24 |
11 |
|
T17 |
5 |
|
T97 |
18 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1517 |
1 |
|
|
T24 |
8 |
|
T17 |
12 |
|
T97 |
48 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T24 |
9 |
|
T17 |
7 |
|
T97 |
16 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1512 |
1 |
|
|
T24 |
7 |
|
T17 |
8 |
|
T97 |
46 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T24 |
11 |
|
T17 |
5 |
|
T97 |
18 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1485 |
1 |
|
|
T24 |
8 |
|
T17 |
12 |
|
T97 |
47 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T24 |
9 |
|
T17 |
7 |
|
T97 |
16 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1483 |
1 |
|
|
T24 |
7 |
|
T17 |
8 |
|
T97 |
46 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T24 |
11 |
|
T17 |
5 |
|
T97 |
18 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1456 |
1 |
|
|
T24 |
8 |
|
T17 |
11 |
|
T97 |
46 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T24 |
9 |
|
T17 |
7 |
|
T97 |
16 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1455 |
1 |
|
|
T24 |
7 |
|
T17 |
8 |
|
T97 |
46 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T24 |
10 |
|
T17 |
5 |
|
T97 |
18 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1420 |
1 |
|
|
T24 |
8 |
|
T17 |
10 |
|
T97 |
46 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T24 |
9 |
|
T17 |
7 |
|
T97 |
16 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1421 |
1 |
|
|
T24 |
7 |
|
T17 |
8 |
|
T97 |
45 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T24 |
10 |
|
T17 |
5 |
|
T97 |
18 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1393 |
1 |
|
|
T24 |
8 |
|
T17 |
9 |
|
T97 |
46 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T24 |
9 |
|
T17 |
7 |
|
T97 |
16 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1390 |
1 |
|
|
T24 |
6 |
|
T17 |
7 |
|
T97 |
43 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T24 |
10 |
|
T17 |
5 |
|
T97 |
18 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1354 |
1 |
|
|
T24 |
7 |
|
T17 |
9 |
|
T97 |
46 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T24 |
9 |
|
T17 |
7 |
|
T97 |
16 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1351 |
1 |
|
|
T24 |
6 |
|
T17 |
6 |
|
T97 |
42 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T24 |
10 |
|
T17 |
5 |
|
T97 |
18 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1321 |
1 |
|
|
T24 |
7 |
|
T17 |
9 |
|
T97 |
46 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T24 |
9 |
|
T17 |
7 |
|
T97 |
16 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1311 |
1 |
|
|
T24 |
6 |
|
T17 |
6 |
|
T97 |
41 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T24 |
10 |
|
T17 |
5 |
|
T97 |
18 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1290 |
1 |
|
|
T24 |
7 |
|
T17 |
9 |
|
T97 |
46 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T24 |
9 |
|
T17 |
7 |
|
T97 |
16 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1274 |
1 |
|
|
T24 |
6 |
|
T17 |
5 |
|
T97 |
40 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[0] |
auto[0] |
59128 |
1 |
|
|
T24 |
434 |
|
T17 |
160 |
|
T97 |
1420 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[0] |
auto[1] |
52436 |
1 |
|
|
T24 |
324 |
|
T17 |
238 |
|
T97 |
1076 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[1] |
auto[0] |
54948 |
1 |
|
|
T24 |
555 |
|
T17 |
1073 |
|
T97 |
1435 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47396 |
1 |
|
|
T24 |
1451 |
|
T17 |
281 |
|
T97 |
1423 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T24 |
6 |
|
T17 |
4 |
|
T97 |
20 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1759 |
1 |
|
|
T24 |
15 |
|
T17 |
14 |
|
T97 |
44 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T24 |
7 |
|
T17 |
4 |
|
T97 |
23 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1760 |
1 |
|
|
T24 |
14 |
|
T17 |
14 |
|
T97 |
42 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T24 |
6 |
|
T17 |
4 |
|
T97 |
20 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1722 |
1 |
|
|
T24 |
15 |
|
T17 |
13 |
|
T97 |
42 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T24 |
7 |
|
T17 |
4 |
|
T97 |
23 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1729 |
1 |
|
|
T24 |
12 |
|
T17 |
14 |
|
T97 |
41 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T24 |
6 |
|
T17 |
4 |
|
T97 |
20 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1687 |
1 |
|
|
T24 |
15 |
|
T17 |
13 |
|
T97 |
41 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T24 |
7 |
|
T17 |
4 |
|
T97 |
23 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1687 |
1 |
|
|
T24 |
11 |
|
T17 |
14 |
|
T97 |
41 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T24 |
6 |
|
T17 |
4 |
|
T97 |
20 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1663 |
1 |
|
|
T24 |
15 |
|
T17 |
13 |
|
T97 |
41 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T24 |
7 |
|
T17 |
4 |
|
T97 |
23 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1644 |
1 |
|
|
T24 |
10 |
|
T17 |
13 |
|
T97 |
39 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T24 |
6 |
|
T17 |
4 |
|
T97 |
20 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1631 |
1 |
|
|
T24 |
15 |
|
T17 |
12 |
|
T97 |
41 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T24 |
7 |
|
T17 |
4 |
|
T97 |
23 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1604 |
1 |
|
|
T24 |
10 |
|
T17 |
13 |
|
T97 |
38 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T24 |
6 |
|
T17 |
4 |
|
T97 |
20 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1598 |
1 |
|
|
T24 |
15 |
|
T17 |
12 |
|
T97 |
40 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T24 |
7 |
|
T17 |
4 |
|
T97 |
23 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1574 |
1 |
|
|
T24 |
8 |
|
T17 |
13 |
|
T97 |
36 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T24 |
5 |
|
T17 |
3 |
|
T97 |
20 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1566 |
1 |
|
|
T24 |
15 |
|
T17 |
12 |
|
T97 |
40 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T24 |
7 |
|
T17 |
4 |
|
T97 |
23 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1553 |
1 |
|
|
T24 |
8 |
|
T17 |
13 |
|
T97 |
36 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T24 |
5 |
|
T17 |
3 |
|
T97 |
20 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1529 |
1 |
|
|
T24 |
15 |
|
T17 |
12 |
|
T97 |
40 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T24 |
7 |
|
T17 |
4 |
|
T97 |
23 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1515 |
1 |
|
|
T24 |
7 |
|
T17 |
13 |
|
T97 |
35 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T24 |
5 |
|
T17 |
3 |
|
T97 |
20 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1497 |
1 |
|
|
T24 |
15 |
|
T17 |
11 |
|
T97 |
40 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T24 |
7 |
|
T17 |
4 |
|
T97 |
23 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1474 |
1 |
|
|
T24 |
7 |
|
T17 |
12 |
|
T97 |
34 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T24 |
5 |
|
T17 |
3 |
|
T97 |
20 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1463 |
1 |
|
|
T24 |
15 |
|
T17 |
11 |
|
T97 |
39 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T24 |
7 |
|
T17 |
4 |
|
T97 |
23 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1427 |
1 |
|
|
T24 |
7 |
|
T17 |
12 |
|
T97 |
33 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T24 |
5 |
|
T17 |
3 |
|
T97 |
20 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1429 |
1 |
|
|
T24 |
14 |
|
T17 |
10 |
|
T97 |
39 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T24 |
7 |
|
T17 |
4 |
|
T97 |
23 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1392 |
1 |
|
|
T24 |
7 |
|
T17 |
12 |
|
T97 |
32 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T24 |
5 |
|
T17 |
3 |
|
T97 |
20 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1401 |
1 |
|
|
T24 |
14 |
|
T17 |
10 |
|
T97 |
39 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T24 |
7 |
|
T17 |
4 |
|
T97 |
23 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1367 |
1 |
|
|
T24 |
7 |
|
T17 |
12 |
|
T97 |
31 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T24 |
5 |
|
T17 |
3 |
|
T97 |
20 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1374 |
1 |
|
|
T24 |
13 |
|
T17 |
10 |
|
T97 |
38 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T24 |
7 |
|
T17 |
4 |
|
T97 |
23 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1327 |
1 |
|
|
T24 |
6 |
|
T17 |
12 |
|
T97 |
30 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T24 |
5 |
|
T17 |
3 |
|
T97 |
20 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1340 |
1 |
|
|
T24 |
13 |
|
T17 |
10 |
|
T97 |
37 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T24 |
7 |
|
T17 |
4 |
|
T97 |
23 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1290 |
1 |
|
|
T24 |
6 |
|
T17 |
12 |
|
T97 |
30 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T24 |
5 |
|
T17 |
3 |
|
T97 |
20 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1304 |
1 |
|
|
T24 |
13 |
|
T17 |
10 |
|
T97 |
36 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T24 |
7 |
|
T17 |
4 |
|
T97 |
23 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1249 |
1 |
|
|
T24 |
5 |
|
T17 |
12 |
|
T97 |
26 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58621 |
1 |
|
|
T24 |
584 |
|
T17 |
431 |
|
T97 |
1367 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[0] |
auto[1] |
49305 |
1 |
|
|
T24 |
319 |
|
T17 |
807 |
|
T97 |
970 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56110 |
1 |
|
|
T24 |
1465 |
|
T17 |
405 |
|
T97 |
1374 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[1] |
auto[1] |
49971 |
1 |
|
|
T24 |
404 |
|
T17 |
121 |
|
T97 |
1670 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T24 |
8 |
|
T17 |
7 |
|
T97 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1728 |
1 |
|
|
T24 |
10 |
|
T17 |
11 |
|
T97 |
46 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T24 |
4 |
|
T17 |
8 |
|
T97 |
20 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1740 |
1 |
|
|
T24 |
14 |
|
T17 |
9 |
|
T97 |
46 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T24 |
8 |
|
T17 |
7 |
|
T97 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1701 |
1 |
|
|
T24 |
10 |
|
T17 |
11 |
|
T97 |
44 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T24 |
4 |
|
T17 |
8 |
|
T97 |
20 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1713 |
1 |
|
|
T24 |
14 |
|
T17 |
9 |
|
T97 |
43 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T24 |
8 |
|
T17 |
7 |
|
T97 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1668 |
1 |
|
|
T24 |
10 |
|
T17 |
10 |
|
T97 |
42 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T24 |
4 |
|
T17 |
8 |
|
T97 |
20 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1680 |
1 |
|
|
T24 |
14 |
|
T17 |
8 |
|
T97 |
42 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T24 |
8 |
|
T17 |
7 |
|
T97 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1632 |
1 |
|
|
T24 |
10 |
|
T17 |
10 |
|
T97 |
41 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T24 |
4 |
|
T17 |
8 |
|
T97 |
20 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1660 |
1 |
|
|
T24 |
14 |
|
T17 |
8 |
|
T97 |
40 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T24 |
8 |
|
T17 |
7 |
|
T97 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1599 |
1 |
|
|
T24 |
10 |
|
T17 |
9 |
|
T97 |
40 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T24 |
4 |
|
T17 |
8 |
|
T97 |
20 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1628 |
1 |
|
|
T24 |
14 |
|
T17 |
8 |
|
T97 |
39 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T24 |
8 |
|
T17 |
7 |
|
T97 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1569 |
1 |
|
|
T24 |
10 |
|
T17 |
9 |
|
T97 |
40 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T24 |
4 |
|
T17 |
8 |
|
T97 |
20 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1585 |
1 |
|
|
T24 |
14 |
|
T17 |
8 |
|
T97 |
39 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T24 |
8 |
|
T17 |
6 |
|
T97 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1533 |
1 |
|
|
T24 |
9 |
|
T17 |
10 |
|
T97 |
38 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T24 |
4 |
|
T17 |
8 |
|
T97 |
20 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1546 |
1 |
|
|
T24 |
14 |
|
T17 |
8 |
|
T97 |
39 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T24 |
8 |
|
T17 |
6 |
|
T97 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1499 |
1 |
|
|
T24 |
8 |
|
T17 |
10 |
|
T97 |
38 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T24 |
4 |
|
T17 |
8 |
|
T97 |
20 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1517 |
1 |
|
|
T24 |
14 |
|
T17 |
8 |
|
T97 |
39 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T24 |
8 |
|
T17 |
6 |
|
T97 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1458 |
1 |
|
|
T24 |
8 |
|
T17 |
10 |
|
T97 |
37 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T24 |
4 |
|
T17 |
8 |
|
T97 |
20 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1484 |
1 |
|
|
T24 |
14 |
|
T17 |
7 |
|
T97 |
39 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T24 |
8 |
|
T17 |
6 |
|
T97 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1429 |
1 |
|
|
T24 |
8 |
|
T17 |
10 |
|
T97 |
37 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T24 |
4 |
|
T17 |
8 |
|
T97 |
20 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1449 |
1 |
|
|
T24 |
14 |
|
T17 |
7 |
|
T97 |
38 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T24 |
8 |
|
T17 |
6 |
|
T97 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1389 |
1 |
|
|
T24 |
8 |
|
T17 |
9 |
|
T97 |
35 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T24 |
4 |
|
T17 |
8 |
|
T97 |
20 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1416 |
1 |
|
|
T24 |
14 |
|
T17 |
6 |
|
T97 |
38 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T24 |
8 |
|
T17 |
6 |
|
T97 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1363 |
1 |
|
|
T24 |
8 |
|
T17 |
8 |
|
T97 |
34 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T24 |
4 |
|
T17 |
8 |
|
T97 |
20 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1370 |
1 |
|
|
T24 |
14 |
|
T17 |
5 |
|
T97 |
38 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T24 |
8 |
|
T17 |
6 |
|
T97 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1331 |
1 |
|
|
T24 |
8 |
|
T17 |
8 |
|
T97 |
32 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T24 |
4 |
|
T17 |
8 |
|
T97 |
20 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1335 |
1 |
|
|
T24 |
14 |
|
T17 |
5 |
|
T97 |
37 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T24 |
8 |
|
T17 |
6 |
|
T97 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1297 |
1 |
|
|
T24 |
8 |
|
T17 |
8 |
|
T97 |
32 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T24 |
4 |
|
T17 |
8 |
|
T97 |
20 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1295 |
1 |
|
|
T24 |
13 |
|
T17 |
5 |
|
T97 |
36 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T24 |
8 |
|
T17 |
6 |
|
T97 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1267 |
1 |
|
|
T24 |
8 |
|
T17 |
8 |
|
T97 |
30 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T24 |
4 |
|
T17 |
8 |
|
T97 |
20 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1262 |
1 |
|
|
T24 |
12 |
|
T17 |
5 |
|
T97 |
35 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[0] |
auto[0] |
54416 |
1 |
|
|
T24 |
419 |
|
T17 |
945 |
|
T97 |
1412 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[0] |
auto[1] |
50669 |
1 |
|
|
T24 |
331 |
|
T17 |
255 |
|
T97 |
1583 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[1] |
auto[0] |
62166 |
1 |
|
|
T24 |
300 |
|
T17 |
526 |
|
T97 |
1475 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46298 |
1 |
|
|
T24 |
1598 |
|
T17 |
153 |
|
T97 |
910 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T24 |
6 |
|
T17 |
5 |
|
T97 |
21 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1751 |
1 |
|
|
T24 |
18 |
|
T17 |
8 |
|
T97 |
41 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T24 |
5 |
|
T17 |
5 |
|
T97 |
24 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1777 |
1 |
|
|
T24 |
19 |
|
T17 |
7 |
|
T97 |
38 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T24 |
6 |
|
T17 |
5 |
|
T97 |
21 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1731 |
1 |
|
|
T24 |
18 |
|
T17 |
8 |
|
T97 |
41 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T24 |
5 |
|
T17 |
5 |
|
T97 |
24 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1732 |
1 |
|
|
T24 |
19 |
|
T17 |
7 |
|
T97 |
38 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T24 |
6 |
|
T17 |
5 |
|
T97 |
21 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1698 |
1 |
|
|
T24 |
18 |
|
T17 |
8 |
|
T97 |
41 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T24 |
5 |
|
T17 |
5 |
|
T97 |
23 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1697 |
1 |
|
|
T24 |
19 |
|
T17 |
7 |
|
T97 |
39 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T24 |
6 |
|
T17 |
5 |
|
T97 |
21 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1662 |
1 |
|
|
T24 |
18 |
|
T17 |
8 |
|
T97 |
41 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T24 |
5 |
|
T17 |
5 |
|
T97 |
23 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1664 |
1 |
|
|
T24 |
19 |
|
T17 |
7 |
|
T97 |
39 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T24 |
6 |
|
T17 |
5 |
|
T97 |
21 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1629 |
1 |
|
|
T24 |
18 |
|
T17 |
7 |
|
T97 |
41 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T24 |
5 |
|
T17 |
5 |
|
T97 |
23 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1629 |
1 |
|
|
T24 |
19 |
|
T17 |
7 |
|
T97 |
39 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T24 |
6 |
|
T17 |
5 |
|
T97 |
21 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1602 |
1 |
|
|
T24 |
18 |
|
T17 |
7 |
|
T97 |
41 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T24 |
5 |
|
T17 |
5 |
|
T97 |
23 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1599 |
1 |
|
|
T24 |
19 |
|
T17 |
7 |
|
T97 |
39 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T24 |
6 |
|
T17 |
4 |
|
T97 |
21 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1573 |
1 |
|
|
T24 |
17 |
|
T17 |
8 |
|
T97 |
38 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T24 |
5 |
|
T17 |
5 |
|
T97 |
23 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1558 |
1 |
|
|
T24 |
18 |
|
T17 |
7 |
|
T97 |
37 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T24 |
6 |
|
T17 |
4 |
|
T97 |
21 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1543 |
1 |
|
|
T24 |
17 |
|
T17 |
8 |
|
T97 |
37 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T24 |
5 |
|
T17 |
5 |
|
T97 |
23 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1519 |
1 |
|
|
T24 |
17 |
|
T17 |
7 |
|
T97 |
36 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T24 |
6 |
|
T17 |
4 |
|
T97 |
21 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1500 |
1 |
|
|
T24 |
14 |
|
T17 |
8 |
|
T97 |
36 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T24 |
5 |
|
T17 |
5 |
|
T97 |
23 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1480 |
1 |
|
|
T24 |
16 |
|
T17 |
7 |
|
T97 |
34 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T24 |
6 |
|
T17 |
4 |
|
T97 |
21 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1473 |
1 |
|
|
T24 |
14 |
|
T17 |
8 |
|
T97 |
36 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T24 |
5 |
|
T17 |
5 |
|
T97 |
23 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1438 |
1 |
|
|
T24 |
15 |
|
T17 |
6 |
|
T97 |
32 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T24 |
5 |
|
T17 |
4 |
|
T97 |
21 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1436 |
1 |
|
|
T24 |
13 |
|
T17 |
7 |
|
T97 |
35 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T24 |
5 |
|
T17 |
5 |
|
T97 |
23 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1406 |
1 |
|
|
T24 |
15 |
|
T17 |
5 |
|
T97 |
31 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T24 |
5 |
|
T17 |
4 |
|
T97 |
21 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1395 |
1 |
|
|
T24 |
12 |
|
T17 |
7 |
|
T97 |
34 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T24 |
5 |
|
T17 |
5 |
|
T97 |
23 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1363 |
1 |
|
|
T24 |
15 |
|
T17 |
5 |
|
T97 |
31 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T24 |
5 |
|
T17 |
4 |
|
T97 |
21 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1365 |
1 |
|
|
T24 |
12 |
|
T17 |
7 |
|
T97 |
33 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T24 |
5 |
|
T17 |
5 |
|
T97 |
23 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1330 |
1 |
|
|
T24 |
15 |
|
T17 |
5 |
|
T97 |
29 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T24 |
5 |
|
T17 |
4 |
|
T97 |
21 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1328 |
1 |
|
|
T24 |
12 |
|
T17 |
7 |
|
T97 |
32 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T24 |
5 |
|
T17 |
5 |
|
T97 |
23 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1296 |
1 |
|
|
T24 |
14 |
|
T17 |
5 |
|
T97 |
29 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T24 |
5 |
|
T17 |
4 |
|
T97 |
21 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1297 |
1 |
|
|
T24 |
12 |
|
T17 |
7 |
|
T97 |
32 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T24 |
5 |
|
T17 |
5 |
|
T97 |
23 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1265 |
1 |
|
|
T24 |
14 |
|
T17 |
5 |
|
T97 |
28 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[0] |
auto[0] |
59486 |
1 |
|
|
T24 |
442 |
|
T17 |
958 |
|
T97 |
935 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45604 |
1 |
|
|
T24 |
194 |
|
T17 |
230 |
|
T97 |
1230 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[1] |
auto[0] |
61963 |
1 |
|
|
T24 |
535 |
|
T17 |
167 |
|
T97 |
2335 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47055 |
1 |
|
|
T24 |
1495 |
|
T17 |
410 |
|
T97 |
828 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
780 |
1 |
|
|
T24 |
10 |
|
T17 |
4 |
|
T97 |
18 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1679 |
1 |
|
|
T24 |
12 |
|
T17 |
13 |
|
T97 |
48 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
778 |
1 |
|
|
T24 |
10 |
|
T17 |
3 |
|
T97 |
22 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1685 |
1 |
|
|
T24 |
12 |
|
T17 |
13 |
|
T97 |
45 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
780 |
1 |
|
|
T24 |
10 |
|
T17 |
4 |
|
T97 |
18 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1649 |
1 |
|
|
T24 |
12 |
|
T17 |
13 |
|
T97 |
48 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
778 |
1 |
|
|
T24 |
10 |
|
T17 |
3 |
|
T97 |
22 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1647 |
1 |
|
|
T24 |
12 |
|
T17 |
13 |
|
T97 |
44 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
778 |
1 |
|
|
T24 |
10 |
|
T17 |
4 |
|
T97 |
18 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1613 |
1 |
|
|
T24 |
12 |
|
T17 |
13 |
|
T97 |
46 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
777 |
1 |
|
|
T24 |
10 |
|
T17 |
3 |
|
T97 |
22 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1615 |
1 |
|
|
T24 |
12 |
|
T17 |
13 |
|
T97 |
41 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
778 |
1 |
|
|
T24 |
10 |
|
T17 |
4 |
|
T97 |
18 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1584 |
1 |
|
|
T24 |
12 |
|
T17 |
13 |
|
T97 |
46 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
777 |
1 |
|
|
T24 |
10 |
|
T17 |
3 |
|
T97 |
22 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1591 |
1 |
|
|
T24 |
12 |
|
T17 |
12 |
|
T97 |
39 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
775 |
1 |
|
|
T24 |
10 |
|
T17 |
4 |
|
T97 |
18 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1558 |
1 |
|
|
T24 |
11 |
|
T17 |
13 |
|
T97 |
46 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
776 |
1 |
|
|
T24 |
10 |
|
T17 |
3 |
|
T97 |
22 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1558 |
1 |
|
|
T24 |
12 |
|
T17 |
12 |
|
T97 |
39 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
775 |
1 |
|
|
T24 |
10 |
|
T17 |
4 |
|
T97 |
18 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1527 |
1 |
|
|
T24 |
11 |
|
T17 |
13 |
|
T97 |
46 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
776 |
1 |
|
|
T24 |
10 |
|
T17 |
3 |
|
T97 |
22 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1527 |
1 |
|
|
T24 |
12 |
|
T17 |
12 |
|
T97 |
38 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
773 |
1 |
|
|
T24 |
10 |
|
T17 |
3 |
|
T97 |
18 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1502 |
1 |
|
|
T24 |
11 |
|
T17 |
14 |
|
T97 |
44 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
771 |
1 |
|
|
T24 |
10 |
|
T17 |
3 |
|
T97 |
22 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1502 |
1 |
|
|
T24 |
12 |
|
T17 |
12 |
|
T97 |
36 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
773 |
1 |
|
|
T24 |
10 |
|
T17 |
3 |
|
T97 |
18 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1473 |
1 |
|
|
T24 |
11 |
|
T17 |
14 |
|
T97 |
44 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
771 |
1 |
|
|
T24 |
10 |
|
T17 |
3 |
|
T97 |
22 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1462 |
1 |
|
|
T24 |
12 |
|
T17 |
12 |
|
T97 |
36 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
769 |
1 |
|
|
T24 |
10 |
|
T17 |
3 |
|
T97 |
18 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1439 |
1 |
|
|
T24 |
11 |
|
T17 |
14 |
|
T97 |
44 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
768 |
1 |
|
|
T24 |
10 |
|
T17 |
3 |
|
T97 |
22 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1426 |
1 |
|
|
T24 |
12 |
|
T17 |
12 |
|
T97 |
35 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
769 |
1 |
|
|
T24 |
10 |
|
T17 |
3 |
|
T97 |
18 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1414 |
1 |
|
|
T24 |
10 |
|
T17 |
14 |
|
T97 |
42 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
768 |
1 |
|
|
T24 |
10 |
|
T17 |
3 |
|
T97 |
22 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1384 |
1 |
|
|
T24 |
11 |
|
T17 |
12 |
|
T97 |
34 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
766 |
1 |
|
|
T24 |
9 |
|
T17 |
3 |
|
T97 |
18 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1381 |
1 |
|
|
T24 |
10 |
|
T17 |
14 |
|
T97 |
42 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
767 |
1 |
|
|
T24 |
10 |
|
T17 |
3 |
|
T97 |
22 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1347 |
1 |
|
|
T24 |
11 |
|
T17 |
9 |
|
T97 |
32 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
766 |
1 |
|
|
T24 |
9 |
|
T17 |
3 |
|
T97 |
18 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1357 |
1 |
|
|
T24 |
10 |
|
T17 |
13 |
|
T97 |
41 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
767 |
1 |
|
|
T24 |
10 |
|
T17 |
3 |
|
T97 |
22 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1313 |
1 |
|
|
T24 |
11 |
|
T17 |
9 |
|
T97 |
32 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
765 |
1 |
|
|
T24 |
9 |
|
T17 |
3 |
|
T97 |
18 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1330 |
1 |
|
|
T24 |
10 |
|
T17 |
13 |
|
T97 |
41 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T24 |
10 |
|
T17 |
3 |
|
T97 |
22 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1284 |
1 |
|
|
T24 |
11 |
|
T17 |
9 |
|
T97 |
31 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
765 |
1 |
|
|
T24 |
9 |
|
T17 |
3 |
|
T97 |
18 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1296 |
1 |
|
|
T24 |
9 |
|
T17 |
13 |
|
T97 |
41 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T24 |
10 |
|
T17 |
3 |
|
T97 |
22 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1234 |
1 |
|
|
T24 |
10 |
|
T17 |
8 |
|
T97 |
26 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
765 |
1 |
|
|
T24 |
9 |
|
T17 |
3 |
|
T97 |
18 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1262 |
1 |
|
|
T24 |
7 |
|
T17 |
13 |
|
T97 |
40 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T24 |
10 |
|
T17 |
3 |
|
T97 |
22 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1198 |
1 |
|
|
T24 |
10 |
|
T17 |
8 |
|
T97 |
25 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[0] |
auto[0] |
60858 |
1 |
|
|
T24 |
1575 |
|
T17 |
226 |
|
T97 |
1178 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48202 |
1 |
|
|
T24 |
360 |
|
T17 |
304 |
|
T97 |
1737 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59123 |
1 |
|
|
T24 |
492 |
|
T17 |
394 |
|
T97 |
1213 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47247 |
1 |
|
|
T24 |
364 |
|
T17 |
862 |
|
T97 |
1255 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
754 |
1 |
|
|
T24 |
8 |
|
T17 |
6 |
|
T97 |
16 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1663 |
1 |
|
|
T24 |
11 |
|
T17 |
10 |
|
T97 |
50 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T24 |
5 |
|
T17 |
4 |
|
T97 |
14 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1663 |
1 |
|
|
T24 |
13 |
|
T17 |
12 |
|
T97 |
52 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
754 |
1 |
|
|
T24 |
8 |
|
T17 |
6 |
|
T97 |
16 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1635 |
1 |
|
|
T24 |
11 |
|
T17 |
10 |
|
T97 |
48 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T24 |
5 |
|
T17 |
4 |
|
T97 |
14 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1627 |
1 |
|
|
T24 |
13 |
|
T17 |
12 |
|
T97 |
49 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T24 |
8 |
|
T17 |
6 |
|
T97 |
16 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1604 |
1 |
|
|
T24 |
10 |
|
T17 |
10 |
|
T97 |
47 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T24 |
5 |
|
T17 |
4 |
|
T97 |
14 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1596 |
1 |
|
|
T24 |
13 |
|
T17 |
11 |
|
T97 |
49 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T24 |
8 |
|
T17 |
6 |
|
T97 |
16 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1582 |
1 |
|
|
T24 |
9 |
|
T17 |
10 |
|
T97 |
47 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T24 |
5 |
|
T17 |
4 |
|
T97 |
14 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1573 |
1 |
|
|
T24 |
13 |
|
T17 |
11 |
|
T97 |
49 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T24 |
8 |
|
T17 |
6 |
|
T97 |
16 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1551 |
1 |
|
|
T24 |
9 |
|
T17 |
10 |
|
T97 |
45 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T24 |
5 |
|
T17 |
4 |
|
T97 |
14 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1540 |
1 |
|
|
T24 |
13 |
|
T17 |
11 |
|
T97 |
49 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T24 |
8 |
|
T17 |
6 |
|
T97 |
16 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1524 |
1 |
|
|
T24 |
9 |
|
T17 |
10 |
|
T97 |
43 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T24 |
5 |
|
T17 |
4 |
|
T97 |
14 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1503 |
1 |
|
|
T24 |
13 |
|
T17 |
10 |
|
T97 |
47 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T24 |
8 |
|
T17 |
6 |
|
T97 |
16 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1480 |
1 |
|
|
T24 |
8 |
|
T17 |
10 |
|
T97 |
40 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T24 |
5 |
|
T17 |
4 |
|
T97 |
14 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1473 |
1 |
|
|
T24 |
12 |
|
T17 |
10 |
|
T97 |
47 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T24 |
8 |
|
T17 |
6 |
|
T97 |
16 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1450 |
1 |
|
|
T24 |
8 |
|
T17 |
10 |
|
T97 |
40 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T24 |
5 |
|
T17 |
4 |
|
T97 |
14 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1446 |
1 |
|
|
T24 |
12 |
|
T17 |
10 |
|
T97 |
47 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T24 |
8 |
|
T17 |
6 |
|
T97 |
16 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1412 |
1 |
|
|
T24 |
8 |
|
T17 |
10 |
|
T97 |
38 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T24 |
5 |
|
T17 |
4 |
|
T97 |
14 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1414 |
1 |
|
|
T24 |
12 |
|
T17 |
10 |
|
T97 |
43 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T24 |
8 |
|
T17 |
6 |
|
T97 |
16 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1373 |
1 |
|
|
T24 |
8 |
|
T17 |
10 |
|
T97 |
38 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T24 |
5 |
|
T17 |
4 |
|
T97 |
14 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1376 |
1 |
|
|
T24 |
12 |
|
T17 |
9 |
|
T97 |
43 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T24 |
7 |
|
T17 |
6 |
|
T97 |
16 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1336 |
1 |
|
|
T24 |
8 |
|
T17 |
10 |
|
T97 |
35 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T24 |
5 |
|
T17 |
4 |
|
T97 |
14 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1345 |
1 |
|
|
T24 |
12 |
|
T17 |
9 |
|
T97 |
42 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T24 |
7 |
|
T17 |
6 |
|
T97 |
16 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1302 |
1 |
|
|
T24 |
8 |
|
T17 |
8 |
|
T97 |
35 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T24 |
5 |
|
T17 |
4 |
|
T97 |
14 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1313 |
1 |
|
|
T24 |
12 |
|
T17 |
9 |
|
T97 |
42 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T24 |
7 |
|
T17 |
6 |
|
T97 |
16 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1264 |
1 |
|
|
T24 |
6 |
|
T17 |
8 |
|
T97 |
34 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T24 |
5 |
|
T17 |
4 |
|
T97 |
14 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1281 |
1 |
|
|
T24 |
12 |
|
T17 |
9 |
|
T97 |
41 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T24 |
7 |
|
T17 |
6 |
|
T97 |
16 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1228 |
1 |
|
|
T24 |
6 |
|
T17 |
7 |
|
T97 |
33 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T24 |
5 |
|
T17 |
4 |
|
T97 |
14 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1260 |
1 |
|
|
T24 |
12 |
|
T17 |
9 |
|
T97 |
41 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T24 |
7 |
|
T17 |
6 |
|
T97 |
16 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1199 |
1 |
|
|
T24 |
6 |
|
T17 |
7 |
|
T97 |
33 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T24 |
5 |
|
T17 |
4 |
|
T97 |
14 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1221 |
1 |
|
|
T24 |
12 |
|
T17 |
9 |
|
T97 |
40 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[0] |
auto[0] |
60311 |
1 |
|
|
T24 |
1826 |
|
T17 |
307 |
|
T97 |
1637 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47755 |
1 |
|
|
T24 |
248 |
|
T17 |
213 |
|
T97 |
1894 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56896 |
1 |
|
|
T24 |
348 |
|
T17 |
1124 |
|
T97 |
704 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[1] |
auto[1] |
50088 |
1 |
|
|
T24 |
309 |
|
T17 |
194 |
|
T97 |
1040 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T24 |
10 |
|
T17 |
5 |
|
T97 |
19 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1697 |
1 |
|
|
T24 |
11 |
|
T17 |
9 |
|
T97 |
50 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T24 |
5 |
|
T17 |
6 |
|
T97 |
15 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1706 |
1 |
|
|
T24 |
15 |
|
T17 |
8 |
|
T97 |
54 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T24 |
10 |
|
T17 |
5 |
|
T97 |
19 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1655 |
1 |
|
|
T24 |
11 |
|
T17 |
8 |
|
T97 |
49 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T24 |
5 |
|
T17 |
6 |
|
T97 |
15 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1674 |
1 |
|
|
T24 |
15 |
|
T17 |
8 |
|
T97 |
51 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T24 |
10 |
|
T17 |
5 |
|
T97 |
19 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1616 |
1 |
|
|
T24 |
10 |
|
T17 |
8 |
|
T97 |
48 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T24 |
5 |
|
T17 |
6 |
|
T97 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1643 |
1 |
|
|
T24 |
14 |
|
T17 |
8 |
|
T97 |
52 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T24 |
10 |
|
T17 |
5 |
|
T97 |
19 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1587 |
1 |
|
|
T24 |
10 |
|
T17 |
8 |
|
T97 |
48 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T24 |
5 |
|
T17 |
6 |
|
T97 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1609 |
1 |
|
|
T24 |
14 |
|
T17 |
8 |
|
T97 |
52 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T24 |
10 |
|
T17 |
5 |
|
T97 |
19 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1559 |
1 |
|
|
T24 |
10 |
|
T17 |
8 |
|
T97 |
48 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T24 |
5 |
|
T17 |
6 |
|
T97 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1581 |
1 |
|
|
T24 |
14 |
|
T17 |
8 |
|
T97 |
51 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T24 |
10 |
|
T17 |
5 |
|
T97 |
19 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1533 |
1 |
|
|
T24 |
9 |
|
T17 |
8 |
|
T97 |
48 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T24 |
5 |
|
T17 |
6 |
|
T97 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1549 |
1 |
|
|
T24 |
14 |
|
T17 |
8 |
|
T97 |
49 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T24 |
9 |
|
T17 |
4 |
|
T97 |
19 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1498 |
1 |
|
|
T24 |
10 |
|
T17 |
9 |
|
T97 |
47 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T24 |
5 |
|
T17 |
6 |
|
T97 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1524 |
1 |
|
|
T24 |
13 |
|
T17 |
8 |
|
T97 |
48 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T24 |
9 |
|
T17 |
4 |
|
T97 |
19 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1467 |
1 |
|
|
T24 |
10 |
|
T17 |
9 |
|
T97 |
46 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T24 |
5 |
|
T17 |
6 |
|
T97 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1495 |
1 |
|
|
T24 |
13 |
|
T17 |
8 |
|
T97 |
47 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T24 |
9 |
|
T17 |
4 |
|
T97 |
19 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1426 |
1 |
|
|
T24 |
10 |
|
T17 |
8 |
|
T97 |
42 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T24 |
5 |
|
T17 |
6 |
|
T97 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1463 |
1 |
|
|
T24 |
13 |
|
T17 |
8 |
|
T97 |
45 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T24 |
9 |
|
T17 |
4 |
|
T97 |
19 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1390 |
1 |
|
|
T24 |
10 |
|
T17 |
8 |
|
T97 |
41 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T24 |
5 |
|
T17 |
6 |
|
T97 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1430 |
1 |
|
|
T24 |
13 |
|
T17 |
8 |
|
T97 |
43 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T24 |
9 |
|
T17 |
4 |
|
T97 |
19 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1345 |
1 |
|
|
T24 |
10 |
|
T17 |
7 |
|
T97 |
38 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T24 |
5 |
|
T17 |
6 |
|
T97 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1399 |
1 |
|
|
T24 |
13 |
|
T17 |
8 |
|
T97 |
43 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T24 |
9 |
|
T17 |
4 |
|
T97 |
19 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1314 |
1 |
|
|
T24 |
10 |
|
T17 |
7 |
|
T97 |
38 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T24 |
5 |
|
T17 |
6 |
|
T97 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1366 |
1 |
|
|
T24 |
13 |
|
T17 |
8 |
|
T97 |
42 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T24 |
9 |
|
T17 |
4 |
|
T97 |
19 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1273 |
1 |
|
|
T24 |
9 |
|
T17 |
7 |
|
T97 |
36 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T24 |
5 |
|
T17 |
6 |
|
T97 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1328 |
1 |
|
|
T24 |
12 |
|
T17 |
7 |
|
T97 |
42 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T24 |
9 |
|
T17 |
4 |
|
T97 |
19 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1247 |
1 |
|
|
T24 |
8 |
|
T17 |
6 |
|
T97 |
36 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T24 |
5 |
|
T17 |
6 |
|
T97 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1295 |
1 |
|
|
T24 |
12 |
|
T17 |
7 |
|
T97 |
40 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T24 |
9 |
|
T17 |
4 |
|
T97 |
19 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1218 |
1 |
|
|
T24 |
8 |
|
T17 |
6 |
|
T97 |
34 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T24 |
5 |
|
T17 |
6 |
|
T97 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1265 |
1 |
|
|
T24 |
11 |
|
T17 |
7 |
|
T97 |
40 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[0] |
auto[0] |
60213 |
1 |
|
|
T24 |
662 |
|
T17 |
400 |
|
T97 |
1428 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44073 |
1 |
|
|
T24 |
468 |
|
T17 |
137 |
|
T97 |
1316 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[1] |
auto[0] |
58171 |
1 |
|
|
T24 |
301 |
|
T17 |
418 |
|
T97 |
1787 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[1] |
auto[1] |
52386 |
1 |
|
|
T24 |
1388 |
|
T17 |
841 |
|
T97 |
832 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T24 |
5 |
|
T17 |
7 |
|
T97 |
21 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1700 |
1 |
|
|
T24 |
13 |
|
T17 |
9 |
|
T97 |
41 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T24 |
5 |
|
T17 |
5 |
|
T97 |
22 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1717 |
1 |
|
|
T24 |
13 |
|
T17 |
11 |
|
T97 |
41 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T24 |
5 |
|
T17 |
7 |
|
T97 |
21 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1678 |
1 |
|
|
T24 |
13 |
|
T17 |
9 |
|
T97 |
41 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T24 |
5 |
|
T17 |
5 |
|
T97 |
22 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1677 |
1 |
|
|
T24 |
12 |
|
T17 |
11 |
|
T97 |
39 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T24 |
5 |
|
T17 |
7 |
|
T97 |
21 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1649 |
1 |
|
|
T24 |
13 |
|
T17 |
9 |
|
T97 |
40 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T24 |
5 |
|
T17 |
5 |
|
T97 |
21 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1652 |
1 |
|
|
T24 |
12 |
|
T17 |
11 |
|
T97 |
40 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T24 |
5 |
|
T17 |
7 |
|
T97 |
21 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1611 |
1 |
|
|
T24 |
13 |
|
T17 |
9 |
|
T97 |
39 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T24 |
5 |
|
T17 |
5 |
|
T97 |
21 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1611 |
1 |
|
|
T24 |
9 |
|
T17 |
10 |
|
T97 |
39 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T24 |
5 |
|
T17 |
7 |
|
T97 |
21 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1580 |
1 |
|
|
T24 |
13 |
|
T17 |
9 |
|
T97 |
39 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T24 |
5 |
|
T17 |
5 |
|
T97 |
21 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1579 |
1 |
|
|
T24 |
9 |
|
T17 |
10 |
|
T97 |
39 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T24 |
5 |
|
T17 |
7 |
|
T97 |
21 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1533 |
1 |
|
|
T24 |
13 |
|
T17 |
8 |
|
T97 |
39 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T24 |
5 |
|
T17 |
5 |
|
T97 |
21 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1549 |
1 |
|
|
T24 |
9 |
|
T17 |
10 |
|
T97 |
38 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T24 |
5 |
|
T17 |
6 |
|
T97 |
21 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1503 |
1 |
|
|
T24 |
13 |
|
T17 |
8 |
|
T97 |
39 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T24 |
5 |
|
T17 |
5 |
|
T97 |
21 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1514 |
1 |
|
|
T24 |
9 |
|
T17 |
9 |
|
T97 |
37 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T24 |
5 |
|
T17 |
6 |
|
T97 |
21 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1458 |
1 |
|
|
T24 |
12 |
|
T17 |
8 |
|
T97 |
38 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T24 |
5 |
|
T17 |
5 |
|
T97 |
21 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1477 |
1 |
|
|
T24 |
9 |
|
T17 |
9 |
|
T97 |
37 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T24 |
5 |
|
T17 |
6 |
|
T97 |
21 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1426 |
1 |
|
|
T24 |
12 |
|
T17 |
8 |
|
T97 |
38 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T24 |
5 |
|
T17 |
5 |
|
T97 |
21 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1448 |
1 |
|
|
T24 |
9 |
|
T17 |
9 |
|
T97 |
37 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T24 |
5 |
|
T17 |
6 |
|
T97 |
21 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1392 |
1 |
|
|
T24 |
12 |
|
T17 |
8 |
|
T97 |
37 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T24 |
5 |
|
T17 |
5 |
|
T97 |
21 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1410 |
1 |
|
|
T24 |
9 |
|
T17 |
9 |
|
T97 |
37 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T24 |
5 |
|
T17 |
6 |
|
T97 |
21 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1358 |
1 |
|
|
T24 |
11 |
|
T17 |
7 |
|
T97 |
37 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T24 |
5 |
|
T17 |
5 |
|
T97 |
21 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1376 |
1 |
|
|
T24 |
9 |
|
T17 |
9 |
|
T97 |
36 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T24 |
5 |
|
T17 |
6 |
|
T97 |
21 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1330 |
1 |
|
|
T24 |
11 |
|
T17 |
7 |
|
T97 |
37 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T24 |
5 |
|
T17 |
5 |
|
T97 |
21 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1336 |
1 |
|
|
T24 |
9 |
|
T17 |
9 |
|
T97 |
34 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T24 |
5 |
|
T17 |
6 |
|
T97 |
21 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1294 |
1 |
|
|
T24 |
11 |
|
T17 |
6 |
|
T97 |
37 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T24 |
5 |
|
T17 |
5 |
|
T97 |
21 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1308 |
1 |
|
|
T24 |
8 |
|
T17 |
9 |
|
T97 |
34 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T24 |
5 |
|
T17 |
6 |
|
T97 |
21 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1264 |
1 |
|
|
T24 |
11 |
|
T17 |
6 |
|
T97 |
36 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T24 |
5 |
|
T17 |
5 |
|
T97 |
21 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1268 |
1 |
|
|
T24 |
8 |
|
T17 |
9 |
|
T97 |
32 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T24 |
5 |
|
T17 |
6 |
|
T97 |
21 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1234 |
1 |
|
|
T24 |
10 |
|
T17 |
6 |
|
T97 |
36 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T24 |
5 |
|
T17 |
5 |
|
T97 |
21 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1229 |
1 |
|
|
T24 |
8 |
|
T17 |
8 |
|
T97 |
31 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58397 |
1 |
|
|
T24 |
318 |
|
T17 |
403 |
|
T97 |
1012 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46831 |
1 |
|
|
T24 |
394 |
|
T17 |
114 |
|
T97 |
1295 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[1] |
auto[0] |
61803 |
1 |
|
|
T24 |
1636 |
|
T17 |
449 |
|
T97 |
1092 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47547 |
1 |
|
|
T24 |
260 |
|
T17 |
849 |
|
T97 |
1944 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
769 |
1 |
|
|
T24 |
9 |
|
T17 |
8 |
|
T97 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1689 |
1 |
|
|
T24 |
16 |
|
T17 |
7 |
|
T97 |
49 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T24 |
9 |
|
T17 |
8 |
|
T97 |
16 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1698 |
1 |
|
|
T24 |
16 |
|
T17 |
7 |
|
T97 |
48 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
769 |
1 |
|
|
T24 |
9 |
|
T17 |
8 |
|
T97 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1654 |
1 |
|
|
T24 |
16 |
|
T17 |
7 |
|
T97 |
49 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T24 |
9 |
|
T17 |
8 |
|
T97 |
16 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1663 |
1 |
|
|
T24 |
15 |
|
T17 |
7 |
|
T97 |
48 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
767 |
1 |
|
|
T24 |
9 |
|
T17 |
8 |
|
T97 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1627 |
1 |
|
|
T24 |
16 |
|
T17 |
7 |
|
T97 |
49 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
759 |
1 |
|
|
T24 |
9 |
|
T17 |
8 |
|
T97 |
15 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1643 |
1 |
|
|
T24 |
15 |
|
T17 |
7 |
|
T97 |
49 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
767 |
1 |
|
|
T24 |
9 |
|
T17 |
8 |
|
T97 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1583 |
1 |
|
|
T24 |
15 |
|
T17 |
7 |
|
T97 |
49 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
759 |
1 |
|
|
T24 |
9 |
|
T17 |
8 |
|
T97 |
15 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1612 |
1 |
|
|
T24 |
15 |
|
T17 |
7 |
|
T97 |
48 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
764 |
1 |
|
|
T24 |
9 |
|
T17 |
8 |
|
T97 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1545 |
1 |
|
|
T24 |
14 |
|
T17 |
6 |
|
T97 |
47 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T24 |
9 |
|
T17 |
8 |
|
T97 |
15 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1576 |
1 |
|
|
T24 |
15 |
|
T17 |
7 |
|
T97 |
48 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
764 |
1 |
|
|
T24 |
9 |
|
T17 |
8 |
|
T97 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1514 |
1 |
|
|
T24 |
14 |
|
T17 |
6 |
|
T97 |
45 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T24 |
9 |
|
T17 |
8 |
|
T97 |
15 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1549 |
1 |
|
|
T24 |
15 |
|
T17 |
6 |
|
T97 |
48 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
762 |
1 |
|
|
T24 |
8 |
|
T17 |
8 |
|
T97 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1476 |
1 |
|
|
T24 |
15 |
|
T17 |
5 |
|
T97 |
45 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T24 |
9 |
|
T17 |
8 |
|
T97 |
15 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1503 |
1 |
|
|
T24 |
13 |
|
T17 |
6 |
|
T97 |
47 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
762 |
1 |
|
|
T24 |
8 |
|
T17 |
8 |
|
T97 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1439 |
1 |
|
|
T24 |
15 |
|
T17 |
5 |
|
T97 |
45 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T24 |
9 |
|
T17 |
8 |
|
T97 |
15 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1474 |
1 |
|
|
T24 |
13 |
|
T17 |
5 |
|
T97 |
47 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T24 |
8 |
|
T17 |
8 |
|
T97 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1407 |
1 |
|
|
T24 |
15 |
|
T17 |
5 |
|
T97 |
45 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T24 |
9 |
|
T17 |
8 |
|
T97 |
15 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1439 |
1 |
|
|
T24 |
13 |
|
T17 |
5 |
|
T97 |
45 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T24 |
8 |
|
T17 |
8 |
|
T97 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1378 |
1 |
|
|
T24 |
15 |
|
T17 |
5 |
|
T97 |
44 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T24 |
9 |
|
T17 |
8 |
|
T97 |
15 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1416 |
1 |
|
|
T24 |
13 |
|
T17 |
5 |
|
T97 |
44 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T24 |
8 |
|
T17 |
8 |
|
T97 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1341 |
1 |
|
|
T24 |
14 |
|
T17 |
5 |
|
T97 |
43 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T24 |
9 |
|
T17 |
8 |
|
T97 |
15 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1381 |
1 |
|
|
T24 |
13 |
|
T17 |
5 |
|
T97 |
42 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T24 |
8 |
|
T17 |
8 |
|
T97 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1307 |
1 |
|
|
T24 |
14 |
|
T17 |
5 |
|
T97 |
42 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T24 |
9 |
|
T17 |
8 |
|
T97 |
15 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1344 |
1 |
|
|
T24 |
13 |
|
T17 |
5 |
|
T97 |
40 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T24 |
8 |
|
T17 |
8 |
|
T97 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1276 |
1 |
|
|
T24 |
14 |
|
T17 |
5 |
|
T97 |
41 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T24 |
9 |
|
T17 |
8 |
|
T97 |
15 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1313 |
1 |
|
|
T24 |
13 |
|
T17 |
5 |
|
T97 |
38 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T24 |
8 |
|
T17 |
8 |
|
T97 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1245 |
1 |
|
|
T24 |
14 |
|
T17 |
5 |
|
T97 |
41 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T24 |
9 |
|
T17 |
8 |
|
T97 |
15 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1273 |
1 |
|
|
T24 |
11 |
|
T17 |
5 |
|
T97 |
37 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T24 |
8 |
|
T17 |
8 |
|
T97 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1219 |
1 |
|
|
T24 |
13 |
|
T17 |
5 |
|
T97 |
41 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T24 |
9 |
|
T17 |
8 |
|
T97 |
15 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1246 |
1 |
|
|
T24 |
10 |
|
T17 |
5 |
|
T97 |
36 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[0] |
auto[0] |
50884 |
1 |
|
|
T24 |
564 |
|
T17 |
227 |
|
T97 |
1242 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48098 |
1 |
|
|
T24 |
246 |
|
T17 |
956 |
|
T97 |
873 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[1] |
auto[0] |
63753 |
1 |
|
|
T24 |
484 |
|
T17 |
457 |
|
T97 |
2191 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[1] |
auto[1] |
51659 |
1 |
|
|
T24 |
1427 |
|
T17 |
202 |
|
T97 |
885 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
779 |
1 |
|
|
T24 |
11 |
|
T17 |
2 |
|
T97 |
26 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1685 |
1 |
|
|
T24 |
10 |
|
T17 |
13 |
|
T97 |
44 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
773 |
1 |
|
|
T24 |
11 |
|
T17 |
4 |
|
T97 |
26 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1698 |
1 |
|
|
T24 |
10 |
|
T17 |
10 |
|
T97 |
45 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
779 |
1 |
|
|
T24 |
11 |
|
T17 |
2 |
|
T97 |
26 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1648 |
1 |
|
|
T24 |
10 |
|
T17 |
13 |
|
T97 |
44 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
773 |
1 |
|
|
T24 |
11 |
|
T17 |
4 |
|
T97 |
26 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1661 |
1 |
|
|
T24 |
9 |
|
T17 |
10 |
|
T97 |
45 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
778 |
1 |
|
|
T24 |
11 |
|
T17 |
2 |
|
T97 |
26 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1615 |
1 |
|
|
T24 |
9 |
|
T17 |
13 |
|
T97 |
44 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
772 |
1 |
|
|
T24 |
11 |
|
T17 |
4 |
|
T97 |
25 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1626 |
1 |
|
|
T24 |
9 |
|
T17 |
9 |
|
T97 |
44 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
778 |
1 |
|
|
T24 |
11 |
|
T17 |
2 |
|
T97 |
26 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1584 |
1 |
|
|
T24 |
9 |
|
T17 |
13 |
|
T97 |
42 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
772 |
1 |
|
|
T24 |
11 |
|
T17 |
4 |
|
T97 |
25 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1593 |
1 |
|
|
T24 |
9 |
|
T17 |
8 |
|
T97 |
44 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
775 |
1 |
|
|
T24 |
11 |
|
T17 |
2 |
|
T97 |
26 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1553 |
1 |
|
|
T24 |
9 |
|
T17 |
13 |
|
T97 |
42 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
770 |
1 |
|
|
T24 |
11 |
|
T17 |
4 |
|
T97 |
25 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1560 |
1 |
|
|
T24 |
8 |
|
T17 |
8 |
|
T97 |
43 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
775 |
1 |
|
|
T24 |
11 |
|
T17 |
2 |
|
T97 |
26 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1521 |
1 |
|
|
T24 |
9 |
|
T17 |
12 |
|
T97 |
40 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
770 |
1 |
|
|
T24 |
11 |
|
T17 |
4 |
|
T97 |
25 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1529 |
1 |
|
|
T24 |
8 |
|
T17 |
8 |
|
T97 |
43 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
771 |
1 |
|
|
T24 |
10 |
|
T17 |
2 |
|
T97 |
26 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1483 |
1 |
|
|
T24 |
10 |
|
T17 |
11 |
|
T97 |
37 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T24 |
11 |
|
T17 |
4 |
|
T97 |
25 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1493 |
1 |
|
|
T24 |
7 |
|
T17 |
8 |
|
T97 |
43 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
771 |
1 |
|
|
T24 |
10 |
|
T17 |
2 |
|
T97 |
26 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1446 |
1 |
|
|
T24 |
10 |
|
T17 |
11 |
|
T97 |
34 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T24 |
11 |
|
T17 |
4 |
|
T97 |
25 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1462 |
1 |
|
|
T24 |
7 |
|
T17 |
8 |
|
T97 |
42 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
768 |
1 |
|
|
T24 |
10 |
|
T17 |
2 |
|
T97 |
26 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1421 |
1 |
|
|
T24 |
10 |
|
T17 |
11 |
|
T97 |
34 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T24 |
11 |
|
T17 |
4 |
|
T97 |
25 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1434 |
1 |
|
|
T24 |
7 |
|
T17 |
8 |
|
T97 |
40 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
768 |
1 |
|
|
T24 |
10 |
|
T17 |
2 |
|
T97 |
26 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1379 |
1 |
|
|
T24 |
10 |
|
T17 |
10 |
|
T97 |
33 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T24 |
11 |
|
T17 |
4 |
|
T97 |
25 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1400 |
1 |
|
|
T24 |
6 |
|
T17 |
8 |
|
T97 |
39 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
764 |
1 |
|
|
T24 |
10 |
|
T17 |
2 |
|
T97 |
26 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1345 |
1 |
|
|
T24 |
9 |
|
T17 |
10 |
|
T97 |
33 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T24 |
11 |
|
T17 |
4 |
|
T97 |
25 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1363 |
1 |
|
|
T24 |
6 |
|
T17 |
8 |
|
T97 |
39 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
764 |
1 |
|
|
T24 |
10 |
|
T17 |
2 |
|
T97 |
26 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1311 |
1 |
|
|
T24 |
9 |
|
T17 |
10 |
|
T97 |
33 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T24 |
11 |
|
T17 |
4 |
|
T97 |
25 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1337 |
1 |
|
|
T24 |
6 |
|
T17 |
8 |
|
T97 |
39 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
764 |
1 |
|
|
T24 |
10 |
|
T17 |
2 |
|
T97 |
26 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1273 |
1 |
|
|
T24 |
9 |
|
T17 |
10 |
|
T97 |
32 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T24 |
11 |
|
T17 |
4 |
|
T97 |
25 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1303 |
1 |
|
|
T24 |
6 |
|
T17 |
8 |
|
T97 |
35 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
764 |
1 |
|
|
T24 |
10 |
|
T17 |
2 |
|
T97 |
26 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1233 |
1 |
|
|
T24 |
9 |
|
T17 |
10 |
|
T97 |
32 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T24 |
11 |
|
T17 |
4 |
|
T97 |
25 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1273 |
1 |
|
|
T24 |
6 |
|
T17 |
8 |
|
T97 |
34 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
764 |
1 |
|
|
T24 |
10 |
|
T17 |
2 |
|
T97 |
26 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1194 |
1 |
|
|
T24 |
9 |
|
T17 |
10 |
|
T97 |
30 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T24 |
11 |
|
T17 |
4 |
|
T97 |
25 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1240 |
1 |
|
|
T24 |
5 |
|
T17 |
8 |
|
T97 |
33 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58654 |
1 |
|
|
T24 |
1796 |
|
T17 |
481 |
|
T97 |
1224 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[0] |
auto[1] |
50608 |
1 |
|
|
T24 |
135 |
|
T17 |
95 |
|
T97 |
752 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57497 |
1 |
|
|
T24 |
446 |
|
T17 |
1111 |
|
T97 |
1821 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47067 |
1 |
|
|
T24 |
349 |
|
T17 |
169 |
|
T97 |
1570 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T24 |
10 |
|
T17 |
8 |
|
T97 |
21 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1762 |
1 |
|
|
T24 |
11 |
|
T17 |
5 |
|
T97 |
43 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T24 |
8 |
|
T17 |
7 |
|
T97 |
26 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1752 |
1 |
|
|
T24 |
12 |
|
T17 |
6 |
|
T97 |
39 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T24 |
10 |
|
T17 |
8 |
|
T97 |
21 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1726 |
1 |
|
|
T24 |
10 |
|
T17 |
5 |
|
T97 |
41 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T24 |
8 |
|
T17 |
7 |
|
T97 |
26 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1704 |
1 |
|
|
T24 |
12 |
|
T17 |
6 |
|
T97 |
38 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T24 |
10 |
|
T17 |
8 |
|
T97 |
21 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1694 |
1 |
|
|
T24 |
10 |
|
T17 |
5 |
|
T97 |
40 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T24 |
8 |
|
T17 |
7 |
|
T97 |
26 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1665 |
1 |
|
|
T24 |
12 |
|
T17 |
6 |
|
T97 |
37 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T24 |
10 |
|
T17 |
8 |
|
T97 |
21 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1659 |
1 |
|
|
T24 |
10 |
|
T17 |
5 |
|
T97 |
40 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T24 |
8 |
|
T17 |
7 |
|
T97 |
26 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1627 |
1 |
|
|
T24 |
12 |
|
T17 |
6 |
|
T97 |
36 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T24 |
10 |
|
T17 |
8 |
|
T97 |
21 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1626 |
1 |
|
|
T24 |
9 |
|
T17 |
5 |
|
T97 |
39 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T24 |
8 |
|
T17 |
7 |
|
T97 |
26 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1598 |
1 |
|
|
T24 |
12 |
|
T17 |
6 |
|
T97 |
35 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T24 |
10 |
|
T17 |
8 |
|
T97 |
21 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1595 |
1 |
|
|
T24 |
9 |
|
T17 |
4 |
|
T97 |
39 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T24 |
8 |
|
T17 |
7 |
|
T97 |
26 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1563 |
1 |
|
|
T24 |
12 |
|
T17 |
6 |
|
T97 |
34 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T24 |
10 |
|
T17 |
8 |
|
T97 |
21 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1567 |
1 |
|
|
T24 |
8 |
|
T17 |
4 |
|
T97 |
38 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T24 |
8 |
|
T17 |
7 |
|
T97 |
26 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1523 |
1 |
|
|
T24 |
12 |
|
T17 |
6 |
|
T97 |
33 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T24 |
10 |
|
T17 |
8 |
|
T97 |
21 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1541 |
1 |
|
|
T24 |
8 |
|
T17 |
4 |
|
T97 |
37 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T24 |
8 |
|
T17 |
7 |
|
T97 |
26 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1486 |
1 |
|
|
T24 |
12 |
|
T17 |
6 |
|
T97 |
33 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T24 |
10 |
|
T17 |
8 |
|
T97 |
21 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1510 |
1 |
|
|
T24 |
8 |
|
T17 |
3 |
|
T97 |
35 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T24 |
8 |
|
T17 |
7 |
|
T97 |
26 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1458 |
1 |
|
|
T24 |
12 |
|
T17 |
6 |
|
T97 |
32 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T24 |
10 |
|
T17 |
8 |
|
T97 |
21 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1475 |
1 |
|
|
T24 |
7 |
|
T17 |
3 |
|
T97 |
35 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T24 |
8 |
|
T17 |
7 |
|
T97 |
26 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1430 |
1 |
|
|
T24 |
12 |
|
T17 |
6 |
|
T97 |
32 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T24 |
10 |
|
T17 |
8 |
|
T97 |
21 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1432 |
1 |
|
|
T24 |
7 |
|
T17 |
3 |
|
T97 |
35 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T24 |
8 |
|
T17 |
7 |
|
T97 |
26 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1391 |
1 |
|
|
T24 |
11 |
|
T17 |
6 |
|
T97 |
30 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T24 |
10 |
|
T17 |
8 |
|
T97 |
21 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1412 |
1 |
|
|
T24 |
7 |
|
T17 |
3 |
|
T97 |
35 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T24 |
8 |
|
T17 |
7 |
|
T97 |
26 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1353 |
1 |
|
|
T24 |
11 |
|
T17 |
6 |
|
T97 |
29 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T24 |
10 |
|
T17 |
8 |
|
T97 |
21 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1368 |
1 |
|
|
T24 |
6 |
|
T17 |
3 |
|
T97 |
35 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T24 |
8 |
|
T17 |
7 |
|
T97 |
26 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1315 |
1 |
|
|
T24 |
11 |
|
T17 |
6 |
|
T97 |
27 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T24 |
10 |
|
T17 |
8 |
|
T97 |
21 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1336 |
1 |
|
|
T24 |
6 |
|
T17 |
2 |
|
T97 |
35 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T24 |
8 |
|
T17 |
7 |
|
T97 |
26 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1284 |
1 |
|
|
T24 |
11 |
|
T17 |
6 |
|
T97 |
26 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T24 |
10 |
|
T17 |
8 |
|
T97 |
21 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1300 |
1 |
|
|
T24 |
5 |
|
T17 |
2 |
|
T97 |
35 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T24 |
8 |
|
T17 |
7 |
|
T97 |
26 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1253 |
1 |
|
|
T24 |
11 |
|
T17 |
6 |
|
T97 |
25 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[0] |
auto[0] |
59833 |
1 |
|
|
T24 |
252 |
|
T17 |
407 |
|
T97 |
2119 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[0] |
auto[1] |
43571 |
1 |
|
|
T24 |
505 |
|
T17 |
278 |
|
T97 |
928 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[1] |
auto[0] |
60161 |
1 |
|
|
T24 |
1660 |
|
T17 |
938 |
|
T97 |
1112 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[1] |
auto[1] |
49637 |
1 |
|
|
T24 |
236 |
|
T17 |
184 |
|
T97 |
970 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
775 |
1 |
|
|
T24 |
6 |
|
T17 |
8 |
|
T97 |
21 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1729 |
1 |
|
|
T24 |
19 |
|
T17 |
7 |
|
T97 |
52 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
773 |
1 |
|
|
T24 |
5 |
|
T17 |
7 |
|
T97 |
27 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1733 |
1 |
|
|
T24 |
20 |
|
T17 |
8 |
|
T97 |
46 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
775 |
1 |
|
|
T24 |
6 |
|
T17 |
8 |
|
T97 |
21 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1700 |
1 |
|
|
T24 |
19 |
|
T17 |
7 |
|
T97 |
51 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
773 |
1 |
|
|
T24 |
5 |
|
T17 |
7 |
|
T97 |
27 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1707 |
1 |
|
|
T24 |
20 |
|
T17 |
7 |
|
T97 |
45 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
774 |
1 |
|
|
T24 |
6 |
|
T17 |
8 |
|
T97 |
21 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1667 |
1 |
|
|
T24 |
18 |
|
T17 |
7 |
|
T97 |
51 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
771 |
1 |
|
|
T24 |
5 |
|
T17 |
7 |
|
T97 |
26 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1679 |
1 |
|
|
T24 |
19 |
|
T17 |
7 |
|
T97 |
43 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
774 |
1 |
|
|
T24 |
6 |
|
T17 |
8 |
|
T97 |
21 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1632 |
1 |
|
|
T24 |
18 |
|
T17 |
7 |
|
T97 |
51 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
771 |
1 |
|
|
T24 |
5 |
|
T17 |
7 |
|
T97 |
26 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1635 |
1 |
|
|
T24 |
17 |
|
T17 |
6 |
|
T97 |
42 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
771 |
1 |
|
|
T24 |
6 |
|
T17 |
8 |
|
T97 |
21 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1601 |
1 |
|
|
T24 |
18 |
|
T17 |
7 |
|
T97 |
49 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
770 |
1 |
|
|
T24 |
5 |
|
T17 |
7 |
|
T97 |
26 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1608 |
1 |
|
|
T24 |
17 |
|
T17 |
6 |
|
T97 |
40 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
771 |
1 |
|
|
T24 |
6 |
|
T17 |
8 |
|
T97 |
21 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1568 |
1 |
|
|
T24 |
18 |
|
T17 |
7 |
|
T97 |
49 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
770 |
1 |
|
|
T24 |
5 |
|
T17 |
7 |
|
T97 |
26 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1569 |
1 |
|
|
T24 |
15 |
|
T17 |
6 |
|
T97 |
40 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
767 |
1 |
|
|
T24 |
5 |
|
T17 |
7 |
|
T97 |
21 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1536 |
1 |
|
|
T24 |
19 |
|
T17 |
8 |
|
T97 |
48 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
765 |
1 |
|
|
T24 |
5 |
|
T17 |
7 |
|
T97 |
26 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1532 |
1 |
|
|
T24 |
14 |
|
T17 |
6 |
|
T97 |
39 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
767 |
1 |
|
|
T24 |
5 |
|
T17 |
7 |
|
T97 |
21 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1504 |
1 |
|
|
T24 |
18 |
|
T17 |
8 |
|
T97 |
47 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
765 |
1 |
|
|
T24 |
5 |
|
T17 |
7 |
|
T97 |
26 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1499 |
1 |
|
|
T24 |
14 |
|
T17 |
6 |
|
T97 |
39 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
760 |
1 |
|
|
T24 |
5 |
|
T17 |
7 |
|
T97 |
21 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1469 |
1 |
|
|
T24 |
18 |
|
T17 |
8 |
|
T97 |
46 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T24 |
5 |
|
T17 |
7 |
|
T97 |
26 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1471 |
1 |
|
|
T24 |
13 |
|
T17 |
6 |
|
T97 |
38 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
760 |
1 |
|
|
T24 |
5 |
|
T17 |
7 |
|
T97 |
21 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1424 |
1 |
|
|
T24 |
18 |
|
T17 |
8 |
|
T97 |
45 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T24 |
5 |
|
T17 |
7 |
|
T97 |
26 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1430 |
1 |
|
|
T24 |
12 |
|
T17 |
6 |
|
T97 |
38 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T24 |
5 |
|
T17 |
7 |
|
T97 |
21 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1383 |
1 |
|
|
T24 |
18 |
|
T17 |
8 |
|
T97 |
44 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T24 |
5 |
|
T17 |
7 |
|
T97 |
26 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1399 |
1 |
|
|
T24 |
12 |
|
T17 |
6 |
|
T97 |
38 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T24 |
5 |
|
T17 |
7 |
|
T97 |
21 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1342 |
1 |
|
|
T24 |
17 |
|
T17 |
8 |
|
T97 |
43 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T24 |
5 |
|
T17 |
7 |
|
T97 |
26 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1370 |
1 |
|
|
T24 |
11 |
|
T17 |
5 |
|
T97 |
38 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T24 |
5 |
|
T17 |
7 |
|
T97 |
21 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1308 |
1 |
|
|
T24 |
17 |
|
T17 |
8 |
|
T97 |
39 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T24 |
5 |
|
T17 |
7 |
|
T97 |
26 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1346 |
1 |
|
|
T24 |
10 |
|
T17 |
5 |
|
T97 |
37 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T24 |
5 |
|
T17 |
7 |
|
T97 |
21 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1277 |
1 |
|
|
T24 |
17 |
|
T17 |
8 |
|
T97 |
37 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T24 |
5 |
|
T17 |
7 |
|
T97 |
26 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1315 |
1 |
|
|
T24 |
10 |
|
T17 |
5 |
|
T97 |
37 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T24 |
5 |
|
T17 |
7 |
|
T97 |
21 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1240 |
1 |
|
|
T24 |
17 |
|
T17 |
8 |
|
T97 |
36 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T24 |
5 |
|
T17 |
7 |
|
T97 |
26 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1281 |
1 |
|
|
T24 |
10 |
|
T17 |
5 |
|
T97 |
36 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57410 |
1 |
|
|
T24 |
308 |
|
T17 |
520 |
|
T97 |
1684 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[0] |
auto[1] |
39194 |
1 |
|
|
T24 |
225 |
|
T17 |
92 |
|
T97 |
657 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[1] |
auto[0] |
60435 |
1 |
|
|
T24 |
568 |
|
T17 |
1048 |
|
T97 |
2076 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[1] |
auto[1] |
56279 |
1 |
|
|
T24 |
1618 |
|
T17 |
198 |
|
T97 |
1020 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
764 |
1 |
|
|
T24 |
8 |
|
T17 |
8 |
|
T97 |
25 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1730 |
1 |
|
|
T24 |
13 |
|
T17 |
6 |
|
T97 |
37 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
775 |
1 |
|
|
T24 |
7 |
|
T17 |
6 |
|
T97 |
22 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1729 |
1 |
|
|
T24 |
14 |
|
T17 |
8 |
|
T97 |
41 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
764 |
1 |
|
|
T24 |
8 |
|
T17 |
8 |
|
T97 |
25 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1693 |
1 |
|
|
T24 |
13 |
|
T17 |
5 |
|
T97 |
36 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
775 |
1 |
|
|
T24 |
7 |
|
T17 |
6 |
|
T97 |
22 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1697 |
1 |
|
|
T24 |
14 |
|
T17 |
8 |
|
T97 |
41 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
763 |
1 |
|
|
T24 |
8 |
|
T17 |
8 |
|
T97 |
25 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1667 |
1 |
|
|
T24 |
12 |
|
T17 |
5 |
|
T97 |
35 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
774 |
1 |
|
|
T24 |
7 |
|
T17 |
6 |
|
T97 |
22 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1673 |
1 |
|
|
T24 |
14 |
|
T17 |
7 |
|
T97 |
40 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
763 |
1 |
|
|
T24 |
8 |
|
T17 |
8 |
|
T97 |
25 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1631 |
1 |
|
|
T24 |
11 |
|
T17 |
3 |
|
T97 |
35 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
774 |
1 |
|
|
T24 |
7 |
|
T17 |
6 |
|
T97 |
22 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1636 |
1 |
|
|
T24 |
14 |
|
T17 |
7 |
|
T97 |
38 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T24 |
8 |
|
T17 |
8 |
|
T97 |
25 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1588 |
1 |
|
|
T24 |
11 |
|
T17 |
3 |
|
T97 |
34 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
774 |
1 |
|
|
T24 |
7 |
|
T17 |
6 |
|
T97 |
22 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1601 |
1 |
|
|
T24 |
14 |
|
T17 |
7 |
|
T97 |
37 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T24 |
8 |
|
T17 |
8 |
|
T97 |
25 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1552 |
1 |
|
|
T24 |
10 |
|
T17 |
3 |
|
T97 |
33 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
774 |
1 |
|
|
T24 |
7 |
|
T17 |
6 |
|
T97 |
22 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1568 |
1 |
|
|
T24 |
14 |
|
T17 |
7 |
|
T97 |
36 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T24 |
8 |
|
T17 |
7 |
|
T97 |
25 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1522 |
1 |
|
|
T24 |
10 |
|
T17 |
4 |
|
T97 |
31 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
770 |
1 |
|
|
T24 |
7 |
|
T17 |
6 |
|
T97 |
21 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1546 |
1 |
|
|
T24 |
14 |
|
T17 |
7 |
|
T97 |
35 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T24 |
8 |
|
T17 |
7 |
|
T97 |
25 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1484 |
1 |
|
|
T24 |
10 |
|
T17 |
4 |
|
T97 |
30 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
770 |
1 |
|
|
T24 |
7 |
|
T17 |
6 |
|
T97 |
21 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1513 |
1 |
|
|
T24 |
14 |
|
T17 |
7 |
|
T97 |
34 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T24 |
8 |
|
T17 |
7 |
|
T97 |
25 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1449 |
1 |
|
|
T24 |
9 |
|
T17 |
4 |
|
T97 |
30 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
764 |
1 |
|
|
T24 |
7 |
|
T17 |
6 |
|
T97 |
21 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1478 |
1 |
|
|
T24 |
14 |
|
T17 |
7 |
|
T97 |
33 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T24 |
8 |
|
T17 |
7 |
|
T97 |
25 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1410 |
1 |
|
|
T24 |
9 |
|
T17 |
4 |
|
T97 |
28 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
764 |
1 |
|
|
T24 |
7 |
|
T17 |
6 |
|
T97 |
21 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1448 |
1 |
|
|
T24 |
14 |
|
T17 |
7 |
|
T97 |
33 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T24 |
7 |
|
T17 |
7 |
|
T97 |
25 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1375 |
1 |
|
|
T24 |
9 |
|
T17 |
4 |
|
T97 |
27 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T24 |
7 |
|
T17 |
6 |
|
T97 |
21 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1417 |
1 |
|
|
T24 |
13 |
|
T17 |
7 |
|
T97 |
33 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T24 |
7 |
|
T17 |
7 |
|
T97 |
25 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1342 |
1 |
|
|
T24 |
9 |
|
T17 |
4 |
|
T97 |
27 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T24 |
7 |
|
T17 |
6 |
|
T97 |
21 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1384 |
1 |
|
|
T24 |
13 |
|
T17 |
7 |
|
T97 |
32 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T24 |
7 |
|
T17 |
7 |
|
T97 |
25 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1312 |
1 |
|
|
T24 |
9 |
|
T17 |
4 |
|
T97 |
26 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T24 |
7 |
|
T17 |
6 |
|
T97 |
21 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1345 |
1 |
|
|
T24 |
12 |
|
T17 |
7 |
|
T97 |
32 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T24 |
7 |
|
T17 |
7 |
|
T97 |
25 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1276 |
1 |
|
|
T24 |
9 |
|
T17 |
4 |
|
T97 |
26 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T24 |
7 |
|
T17 |
6 |
|
T97 |
21 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1314 |
1 |
|
|
T24 |
12 |
|
T17 |
7 |
|
T97 |
31 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T24 |
7 |
|
T17 |
7 |
|
T97 |
25 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1244 |
1 |
|
|
T24 |
7 |
|
T17 |
4 |
|
T97 |
26 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T24 |
7 |
|
T17 |
6 |
|
T97 |
21 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1277 |
1 |
|
|
T24 |
12 |
|
T17 |
7 |
|
T97 |
30 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58571 |
1 |
|
|
T24 |
283 |
|
T17 |
282 |
|
T97 |
1421 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[0] |
auto[1] |
50717 |
1 |
|
|
T24 |
1665 |
|
T17 |
302 |
|
T97 |
877 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[1] |
auto[0] |
54989 |
1 |
|
|
T24 |
432 |
|
T17 |
115 |
|
T97 |
1064 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48864 |
1 |
|
|
T24 |
338 |
|
T17 |
998 |
|
T97 |
1875 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T24 |
6 |
|
T17 |
4 |
|
T97 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1761 |
1 |
|
|
T24 |
16 |
|
T17 |
16 |
|
T97 |
50 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T24 |
4 |
|
T17 |
3 |
|
T97 |
13 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1785 |
1 |
|
|
T24 |
17 |
|
T17 |
17 |
|
T97 |
56 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T24 |
6 |
|
T17 |
4 |
|
T97 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1728 |
1 |
|
|
T24 |
15 |
|
T17 |
16 |
|
T97 |
50 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T24 |
4 |
|
T17 |
3 |
|
T97 |
13 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1751 |
1 |
|
|
T24 |
16 |
|
T17 |
17 |
|
T97 |
56 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T24 |
6 |
|
T17 |
4 |
|
T97 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1690 |
1 |
|
|
T24 |
15 |
|
T17 |
16 |
|
T97 |
49 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T24 |
4 |
|
T17 |
3 |
|
T97 |
13 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1716 |
1 |
|
|
T24 |
16 |
|
T17 |
17 |
|
T97 |
56 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T24 |
6 |
|
T17 |
4 |
|
T97 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1655 |
1 |
|
|
T24 |
14 |
|
T17 |
14 |
|
T97 |
49 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T24 |
4 |
|
T17 |
3 |
|
T97 |
13 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1683 |
1 |
|
|
T24 |
16 |
|
T17 |
17 |
|
T97 |
56 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T24 |
6 |
|
T17 |
4 |
|
T97 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1629 |
1 |
|
|
T24 |
14 |
|
T17 |
14 |
|
T97 |
48 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T24 |
4 |
|
T17 |
3 |
|
T97 |
13 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1653 |
1 |
|
|
T24 |
15 |
|
T17 |
17 |
|
T97 |
54 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T24 |
6 |
|
T17 |
4 |
|
T97 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1601 |
1 |
|
|
T24 |
14 |
|
T17 |
14 |
|
T97 |
48 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T24 |
4 |
|
T17 |
3 |
|
T97 |
13 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1622 |
1 |
|
|
T24 |
15 |
|
T17 |
17 |
|
T97 |
51 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T24 |
6 |
|
T17 |
3 |
|
T97 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1570 |
1 |
|
|
T24 |
14 |
|
T17 |
14 |
|
T97 |
47 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T24 |
4 |
|
T17 |
3 |
|
T97 |
13 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1590 |
1 |
|
|
T24 |
15 |
|
T17 |
17 |
|
T97 |
50 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T24 |
6 |
|
T17 |
3 |
|
T97 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1531 |
1 |
|
|
T24 |
14 |
|
T17 |
12 |
|
T97 |
45 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T24 |
4 |
|
T17 |
3 |
|
T97 |
13 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1558 |
1 |
|
|
T24 |
14 |
|
T17 |
17 |
|
T97 |
50 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T24 |
6 |
|
T17 |
3 |
|
T97 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1497 |
1 |
|
|
T24 |
14 |
|
T17 |
12 |
|
T97 |
41 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T24 |
4 |
|
T17 |
3 |
|
T97 |
13 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1519 |
1 |
|
|
T24 |
14 |
|
T17 |
17 |
|
T97 |
50 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T24 |
6 |
|
T17 |
3 |
|
T97 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1467 |
1 |
|
|
T24 |
14 |
|
T17 |
12 |
|
T97 |
41 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T24 |
4 |
|
T17 |
3 |
|
T97 |
13 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1484 |
1 |
|
|
T24 |
14 |
|
T17 |
16 |
|
T97 |
50 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T24 |
6 |
|
T17 |
3 |
|
T97 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1432 |
1 |
|
|
T24 |
13 |
|
T17 |
12 |
|
T97 |
39 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T24 |
4 |
|
T17 |
3 |
|
T97 |
13 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1459 |
1 |
|
|
T24 |
14 |
|
T17 |
15 |
|
T97 |
50 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T24 |
6 |
|
T17 |
3 |
|
T97 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1399 |
1 |
|
|
T24 |
13 |
|
T17 |
12 |
|
T97 |
39 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T24 |
4 |
|
T17 |
3 |
|
T97 |
13 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1419 |
1 |
|
|
T24 |
14 |
|
T17 |
13 |
|
T97 |
48 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T24 |
6 |
|
T17 |
3 |
|
T97 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1364 |
1 |
|
|
T24 |
13 |
|
T17 |
12 |
|
T97 |
38 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T24 |
4 |
|
T17 |
3 |
|
T97 |
13 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1386 |
1 |
|
|
T24 |
13 |
|
T17 |
13 |
|
T97 |
47 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T24 |
6 |
|
T17 |
3 |
|
T97 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1326 |
1 |
|
|
T24 |
11 |
|
T17 |
12 |
|
T97 |
36 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T24 |
4 |
|
T17 |
3 |
|
T97 |
13 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1350 |
1 |
|
|
T24 |
13 |
|
T17 |
13 |
|
T97 |
45 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T24 |
6 |
|
T17 |
3 |
|
T97 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1291 |
1 |
|
|
T24 |
11 |
|
T17 |
11 |
|
T97 |
35 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T24 |
4 |
|
T17 |
3 |
|
T97 |
13 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1322 |
1 |
|
|
T24 |
13 |
|
T17 |
12 |
|
T97 |
44 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[0] |
auto[0] |
55463 |
1 |
|
|
T24 |
592 |
|
T17 |
824 |
|
T97 |
1326 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[0] |
auto[1] |
52277 |
1 |
|
|
T24 |
282 |
|
T17 |
173 |
|
T97 |
1872 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[1] |
auto[0] |
58067 |
1 |
|
|
T24 |
1412 |
|
T17 |
465 |
|
T97 |
972 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46819 |
1 |
|
|
T24 |
341 |
|
T17 |
252 |
|
T97 |
919 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T24 |
8 |
|
T17 |
6 |
|
T97 |
21 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1782 |
1 |
|
|
T24 |
17 |
|
T17 |
14 |
|
T97 |
54 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
759 |
1 |
|
|
T24 |
6 |
|
T17 |
6 |
|
T97 |
19 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1770 |
1 |
|
|
T24 |
19 |
|
T17 |
13 |
|
T97 |
56 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T24 |
8 |
|
T17 |
6 |
|
T97 |
21 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1749 |
1 |
|
|
T24 |
17 |
|
T17 |
13 |
|
T97 |
52 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
759 |
1 |
|
|
T24 |
6 |
|
T17 |
6 |
|
T97 |
19 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1735 |
1 |
|
|
T24 |
19 |
|
T17 |
13 |
|
T97 |
56 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T24 |
8 |
|
T17 |
6 |
|
T97 |
21 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1715 |
1 |
|
|
T24 |
17 |
|
T17 |
12 |
|
T97 |
49 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T24 |
6 |
|
T17 |
6 |
|
T97 |
19 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1691 |
1 |
|
|
T24 |
18 |
|
T17 |
12 |
|
T97 |
54 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T24 |
8 |
|
T17 |
6 |
|
T97 |
21 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1685 |
1 |
|
|
T24 |
16 |
|
T17 |
12 |
|
T97 |
49 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T24 |
6 |
|
T17 |
6 |
|
T97 |
19 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1664 |
1 |
|
|
T24 |
17 |
|
T17 |
12 |
|
T97 |
54 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T24 |
8 |
|
T17 |
6 |
|
T97 |
21 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1651 |
1 |
|
|
T24 |
14 |
|
T17 |
12 |
|
T97 |
49 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T24 |
6 |
|
T17 |
6 |
|
T97 |
19 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1627 |
1 |
|
|
T24 |
17 |
|
T17 |
12 |
|
T97 |
53 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T24 |
8 |
|
T17 |
6 |
|
T97 |
21 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1614 |
1 |
|
|
T24 |
13 |
|
T17 |
12 |
|
T97 |
48 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T24 |
6 |
|
T17 |
6 |
|
T97 |
19 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1610 |
1 |
|
|
T24 |
17 |
|
T17 |
12 |
|
T97 |
51 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T24 |
8 |
|
T17 |
5 |
|
T97 |
21 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1586 |
1 |
|
|
T24 |
13 |
|
T17 |
13 |
|
T97 |
47 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T24 |
6 |
|
T17 |
6 |
|
T97 |
19 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1571 |
1 |
|
|
T24 |
17 |
|
T17 |
12 |
|
T97 |
50 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T24 |
8 |
|
T17 |
5 |
|
T97 |
21 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1559 |
1 |
|
|
T24 |
13 |
|
T17 |
13 |
|
T97 |
47 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T24 |
6 |
|
T17 |
6 |
|
T97 |
19 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1529 |
1 |
|
|
T24 |
17 |
|
T17 |
12 |
|
T97 |
48 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T24 |
8 |
|
T17 |
5 |
|
T97 |
21 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1529 |
1 |
|
|
T24 |
13 |
|
T17 |
13 |
|
T97 |
47 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T24 |
6 |
|
T17 |
6 |
|
T97 |
19 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1494 |
1 |
|
|
T24 |
17 |
|
T17 |
12 |
|
T97 |
47 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T24 |
8 |
|
T17 |
5 |
|
T97 |
21 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1488 |
1 |
|
|
T24 |
13 |
|
T17 |
12 |
|
T97 |
47 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T24 |
6 |
|
T17 |
6 |
|
T97 |
19 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1460 |
1 |
|
|
T24 |
16 |
|
T17 |
11 |
|
T97 |
46 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T24 |
8 |
|
T17 |
5 |
|
T97 |
21 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1449 |
1 |
|
|
T24 |
13 |
|
T17 |
11 |
|
T97 |
46 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T24 |
6 |
|
T17 |
6 |
|
T97 |
19 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1409 |
1 |
|
|
T24 |
15 |
|
T17 |
10 |
|
T97 |
45 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T24 |
8 |
|
T17 |
5 |
|
T97 |
21 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1419 |
1 |
|
|
T24 |
13 |
|
T17 |
11 |
|
T97 |
46 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T24 |
6 |
|
T17 |
6 |
|
T97 |
19 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1372 |
1 |
|
|
T24 |
15 |
|
T17 |
9 |
|
T97 |
43 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T24 |
8 |
|
T17 |
5 |
|
T97 |
21 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1386 |
1 |
|
|
T24 |
13 |
|
T17 |
10 |
|
T97 |
45 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T24 |
6 |
|
T17 |
6 |
|
T97 |
19 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1329 |
1 |
|
|
T24 |
15 |
|
T17 |
9 |
|
T97 |
40 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T24 |
8 |
|
T17 |
5 |
|
T97 |
21 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1351 |
1 |
|
|
T24 |
11 |
|
T17 |
9 |
|
T97 |
44 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T24 |
6 |
|
T17 |
6 |
|
T97 |
19 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1297 |
1 |
|
|
T24 |
15 |
|
T17 |
9 |
|
T97 |
38 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T24 |
8 |
|
T17 |
5 |
|
T97 |
21 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1317 |
1 |
|
|
T24 |
10 |
|
T17 |
8 |
|
T97 |
44 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T24 |
6 |
|
T17 |
6 |
|
T97 |
19 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1263 |
1 |
|
|
T24 |
15 |
|
T17 |
9 |
|
T97 |
36 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58313 |
1 |
|
|
T24 |
484 |
|
T17 |
244 |
|
T97 |
1325 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[0] |
auto[1] |
52270 |
1 |
|
|
T24 |
1590 |
|
T17 |
902 |
|
T97 |
941 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[1] |
auto[0] |
58077 |
1 |
|
|
T24 |
119 |
|
T17 |
263 |
|
T97 |
1792 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45524 |
1 |
|
|
T24 |
458 |
|
T17 |
308 |
|
T97 |
1470 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T24 |
7 |
|
T17 |
5 |
|
T97 |
20 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1735 |
1 |
|
|
T24 |
17 |
|
T17 |
15 |
|
T97 |
39 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T24 |
5 |
|
T17 |
4 |
|
T97 |
23 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1737 |
1 |
|
|
T24 |
18 |
|
T17 |
15 |
|
T97 |
37 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T24 |
7 |
|
T17 |
5 |
|
T97 |
20 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1703 |
1 |
|
|
T24 |
17 |
|
T17 |
15 |
|
T97 |
38 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T24 |
5 |
|
T17 |
4 |
|
T97 |
23 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1701 |
1 |
|
|
T24 |
18 |
|
T17 |
14 |
|
T97 |
37 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T24 |
7 |
|
T17 |
5 |
|
T97 |
20 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1672 |
1 |
|
|
T24 |
17 |
|
T17 |
15 |
|
T97 |
35 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T24 |
5 |
|
T17 |
4 |
|
T97 |
22 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1669 |
1 |
|
|
T24 |
18 |
|
T17 |
14 |
|
T97 |
37 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T24 |
7 |
|
T17 |
5 |
|
T97 |
20 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1637 |
1 |
|
|
T24 |
17 |
|
T17 |
14 |
|
T97 |
34 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T24 |
5 |
|
T17 |
4 |
|
T97 |
22 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1636 |
1 |
|
|
T24 |
18 |
|
T17 |
14 |
|
T97 |
36 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T24 |
7 |
|
T17 |
5 |
|
T97 |
20 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1598 |
1 |
|
|
T24 |
17 |
|
T17 |
14 |
|
T97 |
34 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T24 |
5 |
|
T17 |
4 |
|
T97 |
22 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1612 |
1 |
|
|
T24 |
18 |
|
T17 |
14 |
|
T97 |
34 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T24 |
7 |
|
T17 |
5 |
|
T97 |
20 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1569 |
1 |
|
|
T24 |
16 |
|
T17 |
14 |
|
T97 |
33 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T24 |
5 |
|
T17 |
4 |
|
T97 |
22 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1578 |
1 |
|
|
T24 |
17 |
|
T17 |
14 |
|
T97 |
34 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T24 |
7 |
|
T17 |
4 |
|
T97 |
20 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1540 |
1 |
|
|
T24 |
16 |
|
T17 |
15 |
|
T97 |
33 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T24 |
5 |
|
T17 |
4 |
|
T97 |
22 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1535 |
1 |
|
|
T24 |
17 |
|
T17 |
13 |
|
T97 |
32 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T24 |
7 |
|
T17 |
4 |
|
T97 |
20 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1488 |
1 |
|
|
T24 |
14 |
|
T17 |
13 |
|
T97 |
32 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T24 |
5 |
|
T17 |
4 |
|
T97 |
22 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1506 |
1 |
|
|
T24 |
16 |
|
T17 |
13 |
|
T97 |
32 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T24 |
7 |
|
T17 |
4 |
|
T97 |
20 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1459 |
1 |
|
|
T24 |
13 |
|
T17 |
12 |
|
T97 |
30 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T24 |
5 |
|
T17 |
4 |
|
T97 |
22 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1469 |
1 |
|
|
T24 |
15 |
|
T17 |
13 |
|
T97 |
31 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T24 |
7 |
|
T17 |
4 |
|
T97 |
20 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1423 |
1 |
|
|
T24 |
13 |
|
T17 |
12 |
|
T97 |
30 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T24 |
5 |
|
T17 |
4 |
|
T97 |
22 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1440 |
1 |
|
|
T24 |
14 |
|
T17 |
13 |
|
T97 |
31 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T24 |
7 |
|
T17 |
4 |
|
T97 |
20 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1385 |
1 |
|
|
T24 |
13 |
|
T17 |
10 |
|
T97 |
29 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T24 |
5 |
|
T17 |
4 |
|
T97 |
22 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1411 |
1 |
|
|
T24 |
14 |
|
T17 |
13 |
|
T97 |
29 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T24 |
7 |
|
T17 |
4 |
|
T97 |
20 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1356 |
1 |
|
|
T24 |
13 |
|
T17 |
9 |
|
T97 |
28 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T24 |
5 |
|
T17 |
4 |
|
T97 |
22 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1380 |
1 |
|
|
T24 |
14 |
|
T17 |
13 |
|
T97 |
28 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T24 |
7 |
|
T17 |
4 |
|
T97 |
20 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1327 |
1 |
|
|
T24 |
13 |
|
T17 |
8 |
|
T97 |
28 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T24 |
5 |
|
T17 |
4 |
|
T97 |
22 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1349 |
1 |
|
|
T24 |
14 |
|
T17 |
13 |
|
T97 |
28 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T24 |
7 |
|
T17 |
4 |
|
T97 |
20 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1293 |
1 |
|
|
T24 |
13 |
|
T17 |
8 |
|
T97 |
28 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T24 |
5 |
|
T17 |
4 |
|
T97 |
22 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1318 |
1 |
|
|
T24 |
14 |
|
T17 |
13 |
|
T97 |
28 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T24 |
7 |
|
T17 |
4 |
|
T97 |
20 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1255 |
1 |
|
|
T24 |
13 |
|
T17 |
8 |
|
T97 |
27 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T24 |
5 |
|
T17 |
4 |
|
T97 |
22 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1289 |
1 |
|
|
T24 |
14 |
|
T17 |
13 |
|
T97 |
28 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[0] |
auto[0] |
65523 |
1 |
|
|
T24 |
381 |
|
T17 |
1125 |
|
T97 |
1496 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47162 |
1 |
|
|
T24 |
460 |
|
T17 |
244 |
|
T97 |
1949 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57116 |
1 |
|
|
T24 |
1560 |
|
T17 |
217 |
|
T97 |
1155 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45574 |
1 |
|
|
T24 |
282 |
|
T17 |
111 |
|
T97 |
763 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T24 |
6 |
|
T17 |
8 |
|
T97 |
19 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1684 |
1 |
|
|
T24 |
17 |
|
T17 |
12 |
|
T97 |
46 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T24 |
5 |
|
T17 |
8 |
|
T97 |
22 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1681 |
1 |
|
|
T24 |
18 |
|
T17 |
11 |
|
T97 |
43 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T24 |
6 |
|
T17 |
8 |
|
T97 |
19 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1662 |
1 |
|
|
T24 |
17 |
|
T17 |
12 |
|
T97 |
45 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T24 |
5 |
|
T17 |
8 |
|
T97 |
22 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1645 |
1 |
|
|
T24 |
16 |
|
T17 |
11 |
|
T97 |
42 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T24 |
6 |
|
T17 |
8 |
|
T97 |
19 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1627 |
1 |
|
|
T24 |
17 |
|
T17 |
12 |
|
T97 |
45 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T24 |
5 |
|
T17 |
8 |
|
T97 |
21 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1610 |
1 |
|
|
T24 |
15 |
|
T17 |
10 |
|
T97 |
41 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T24 |
6 |
|
T17 |
8 |
|
T97 |
19 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1597 |
1 |
|
|
T24 |
17 |
|
T17 |
12 |
|
T97 |
45 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T24 |
5 |
|
T17 |
8 |
|
T97 |
21 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1572 |
1 |
|
|
T24 |
15 |
|
T17 |
10 |
|
T97 |
40 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T24 |
6 |
|
T17 |
8 |
|
T97 |
19 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1561 |
1 |
|
|
T24 |
17 |
|
T17 |
12 |
|
T97 |
45 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T24 |
5 |
|
T17 |
8 |
|
T97 |
21 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1548 |
1 |
|
|
T24 |
15 |
|
T17 |
9 |
|
T97 |
39 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T24 |
6 |
|
T17 |
8 |
|
T97 |
19 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1536 |
1 |
|
|
T24 |
17 |
|
T17 |
12 |
|
T97 |
45 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T24 |
5 |
|
T17 |
8 |
|
T97 |
21 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1515 |
1 |
|
|
T24 |
14 |
|
T17 |
9 |
|
T97 |
37 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T24 |
5 |
|
T17 |
7 |
|
T97 |
19 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1504 |
1 |
|
|
T24 |
17 |
|
T17 |
13 |
|
T97 |
43 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T24 |
5 |
|
T17 |
8 |
|
T97 |
21 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1491 |
1 |
|
|
T24 |
14 |
|
T17 |
9 |
|
T97 |
35 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T24 |
5 |
|
T17 |
7 |
|
T97 |
19 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1470 |
1 |
|
|
T24 |
17 |
|
T17 |
13 |
|
T97 |
42 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T24 |
5 |
|
T17 |
8 |
|
T97 |
21 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1455 |
1 |
|
|
T24 |
13 |
|
T17 |
8 |
|
T97 |
33 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T24 |
5 |
|
T17 |
7 |
|
T97 |
19 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1429 |
1 |
|
|
T24 |
17 |
|
T17 |
13 |
|
T97 |
42 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T24 |
5 |
|
T17 |
8 |
|
T97 |
21 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1421 |
1 |
|
|
T24 |
13 |
|
T17 |
8 |
|
T97 |
33 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T24 |
5 |
|
T17 |
7 |
|
T97 |
19 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1397 |
1 |
|
|
T24 |
17 |
|
T17 |
13 |
|
T97 |
42 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T24 |
5 |
|
T17 |
8 |
|
T97 |
21 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1393 |
1 |
|
|
T24 |
12 |
|
T17 |
8 |
|
T97 |
31 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T24 |
5 |
|
T17 |
7 |
|
T97 |
19 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1370 |
1 |
|
|
T24 |
17 |
|
T17 |
11 |
|
T97 |
42 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T24 |
5 |
|
T17 |
8 |
|
T97 |
21 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1352 |
1 |
|
|
T24 |
12 |
|
T17 |
8 |
|
T97 |
29 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T24 |
5 |
|
T17 |
7 |
|
T97 |
19 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1328 |
1 |
|
|
T24 |
17 |
|
T17 |
11 |
|
T97 |
42 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T24 |
5 |
|
T17 |
8 |
|
T97 |
21 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1318 |
1 |
|
|
T24 |
11 |
|
T17 |
6 |
|
T97 |
29 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T24 |
5 |
|
T17 |
7 |
|
T97 |
19 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1295 |
1 |
|
|
T24 |
17 |
|
T17 |
10 |
|
T97 |
41 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T24 |
5 |
|
T17 |
8 |
|
T97 |
21 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1275 |
1 |
|
|
T24 |
11 |
|
T17 |
6 |
|
T97 |
28 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T24 |
5 |
|
T17 |
7 |
|
T97 |
19 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1255 |
1 |
|
|
T24 |
16 |
|
T17 |
10 |
|
T97 |
40 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T24 |
5 |
|
T17 |
8 |
|
T97 |
21 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1242 |
1 |
|
|
T24 |
11 |
|
T17 |
6 |
|
T97 |
25 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T24 |
5 |
|
T17 |
7 |
|
T97 |
19 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1231 |
1 |
|
|
T24 |
16 |
|
T17 |
10 |
|
T97 |
40 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T24 |
5 |
|
T17 |
8 |
|
T97 |
21 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1201 |
1 |
|
|
T24 |
10 |
|
T17 |
4 |
|
T97 |
25 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57838 |
1 |
|
|
T24 |
499 |
|
T17 |
171 |
|
T97 |
1477 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[0] |
auto[1] |
49430 |
1 |
|
|
T24 |
1590 |
|
T17 |
288 |
|
T97 |
935 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[1] |
auto[0] |
60675 |
1 |
|
|
T24 |
242 |
|
T17 |
940 |
|
T97 |
2076 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46896 |
1 |
|
|
T24 |
355 |
|
T17 |
280 |
|
T97 |
906 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T24 |
10 |
|
T17 |
3 |
|
T97 |
19 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1686 |
1 |
|
|
T24 |
12 |
|
T17 |
19 |
|
T97 |
43 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T24 |
4 |
|
T17 |
4 |
|
T97 |
21 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1674 |
1 |
|
|
T24 |
17 |
|
T17 |
18 |
|
T97 |
42 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T24 |
10 |
|
T17 |
3 |
|
T97 |
19 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1657 |
1 |
|
|
T24 |
12 |
|
T17 |
18 |
|
T97 |
43 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T24 |
4 |
|
T17 |
4 |
|
T97 |
21 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1641 |
1 |
|
|
T24 |
17 |
|
T17 |
17 |
|
T97 |
42 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T24 |
10 |
|
T17 |
3 |
|
T97 |
19 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1618 |
1 |
|
|
T24 |
11 |
|
T17 |
18 |
|
T97 |
43 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
759 |
1 |
|
|
T24 |
4 |
|
T17 |
4 |
|
T97 |
21 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1604 |
1 |
|
|
T24 |
17 |
|
T17 |
17 |
|
T97 |
41 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T24 |
10 |
|
T17 |
3 |
|
T97 |
19 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1595 |
1 |
|
|
T24 |
11 |
|
T17 |
18 |
|
T97 |
43 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
759 |
1 |
|
|
T24 |
4 |
|
T17 |
4 |
|
T97 |
21 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1577 |
1 |
|
|
T24 |
17 |
|
T17 |
15 |
|
T97 |
41 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T24 |
10 |
|
T17 |
3 |
|
T97 |
19 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1571 |
1 |
|
|
T24 |
11 |
|
T17 |
18 |
|
T97 |
42 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T24 |
4 |
|
T17 |
4 |
|
T97 |
21 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1548 |
1 |
|
|
T24 |
16 |
|
T17 |
15 |
|
T97 |
36 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T24 |
10 |
|
T17 |
3 |
|
T97 |
19 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1547 |
1 |
|
|
T24 |
11 |
|
T17 |
17 |
|
T97 |
42 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T24 |
4 |
|
T17 |
4 |
|
T97 |
21 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1513 |
1 |
|
|
T24 |
16 |
|
T17 |
15 |
|
T97 |
36 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T24 |
9 |
|
T17 |
2 |
|
T97 |
19 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1521 |
1 |
|
|
T24 |
12 |
|
T17 |
18 |
|
T97 |
42 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T24 |
4 |
|
T17 |
4 |
|
T97 |
21 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1480 |
1 |
|
|
T24 |
16 |
|
T17 |
13 |
|
T97 |
34 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T24 |
9 |
|
T17 |
2 |
|
T97 |
19 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1495 |
1 |
|
|
T24 |
11 |
|
T17 |
17 |
|
T97 |
42 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T24 |
4 |
|
T17 |
4 |
|
T97 |
21 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1449 |
1 |
|
|
T24 |
16 |
|
T17 |
13 |
|
T97 |
33 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T24 |
9 |
|
T17 |
2 |
|
T97 |
19 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1462 |
1 |
|
|
T24 |
11 |
|
T17 |
17 |
|
T97 |
42 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T24 |
4 |
|
T17 |
4 |
|
T97 |
21 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1411 |
1 |
|
|
T24 |
16 |
|
T17 |
13 |
|
T97 |
31 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T24 |
9 |
|
T17 |
2 |
|
T97 |
19 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1434 |
1 |
|
|
T24 |
11 |
|
T17 |
16 |
|
T97 |
41 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T24 |
4 |
|
T17 |
4 |
|
T97 |
21 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1380 |
1 |
|
|
T24 |
16 |
|
T17 |
12 |
|
T97 |
31 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T24 |
9 |
|
T17 |
2 |
|
T97 |
19 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1400 |
1 |
|
|
T24 |
11 |
|
T17 |
15 |
|
T97 |
41 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T24 |
4 |
|
T17 |
4 |
|
T97 |
21 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1347 |
1 |
|
|
T24 |
16 |
|
T17 |
11 |
|
T97 |
30 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T24 |
9 |
|
T17 |
2 |
|
T97 |
19 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1367 |
1 |
|
|
T24 |
11 |
|
T17 |
15 |
|
T97 |
39 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T24 |
4 |
|
T17 |
4 |
|
T97 |
21 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1309 |
1 |
|
|
T24 |
15 |
|
T17 |
11 |
|
T97 |
30 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T24 |
9 |
|
T17 |
2 |
|
T97 |
19 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1338 |
1 |
|
|
T24 |
11 |
|
T17 |
15 |
|
T97 |
39 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T24 |
4 |
|
T17 |
4 |
|
T97 |
21 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1267 |
1 |
|
|
T24 |
15 |
|
T17 |
11 |
|
T97 |
28 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T24 |
9 |
|
T17 |
2 |
|
T97 |
19 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1302 |
1 |
|
|
T24 |
10 |
|
T17 |
15 |
|
T97 |
37 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T24 |
4 |
|
T17 |
4 |
|
T97 |
21 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1241 |
1 |
|
|
T24 |
15 |
|
T17 |
11 |
|
T97 |
28 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T24 |
9 |
|
T17 |
2 |
|
T97 |
19 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1274 |
1 |
|
|
T24 |
9 |
|
T17 |
15 |
|
T97 |
36 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T24 |
4 |
|
T17 |
4 |
|
T97 |
21 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1197 |
1 |
|
|
T24 |
15 |
|
T17 |
9 |
|
T97 |
28 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[0] |
auto[0] |
60269 |
1 |
|
|
T24 |
396 |
|
T17 |
322 |
|
T97 |
1487 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48296 |
1 |
|
|
T24 |
356 |
|
T17 |
229 |
|
T97 |
1072 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[1] |
auto[0] |
55469 |
1 |
|
|
T24 |
385 |
|
T17 |
108 |
|
T97 |
1241 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48928 |
1 |
|
|
T24 |
1526 |
|
T17 |
1046 |
|
T97 |
1339 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
771 |
1 |
|
|
T24 |
8 |
|
T17 |
4 |
|
T97 |
15 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1753 |
1 |
|
|
T24 |
15 |
|
T17 |
15 |
|
T97 |
59 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T24 |
7 |
|
T17 |
4 |
|
T97 |
16 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1762 |
1 |
|
|
T24 |
16 |
|
T17 |
15 |
|
T97 |
58 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
771 |
1 |
|
|
T24 |
8 |
|
T17 |
4 |
|
T97 |
15 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1719 |
1 |
|
|
T24 |
15 |
|
T17 |
15 |
|
T97 |
59 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T24 |
7 |
|
T17 |
4 |
|
T97 |
16 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1735 |
1 |
|
|
T24 |
16 |
|
T17 |
15 |
|
T97 |
58 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T24 |
8 |
|
T17 |
4 |
|
T97 |
15 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1683 |
1 |
|
|
T24 |
15 |
|
T17 |
14 |
|
T97 |
58 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T24 |
7 |
|
T17 |
4 |
|
T97 |
16 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1706 |
1 |
|
|
T24 |
15 |
|
T17 |
15 |
|
T97 |
57 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T24 |
8 |
|
T17 |
4 |
|
T97 |
15 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1653 |
1 |
|
|
T24 |
15 |
|
T17 |
13 |
|
T97 |
56 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T24 |
7 |
|
T17 |
4 |
|
T97 |
16 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1663 |
1 |
|
|
T24 |
15 |
|
T17 |
15 |
|
T97 |
56 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
767 |
1 |
|
|
T24 |
8 |
|
T17 |
4 |
|
T97 |
15 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1630 |
1 |
|
|
T24 |
15 |
|
T17 |
13 |
|
T97 |
54 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T24 |
7 |
|
T17 |
4 |
|
T97 |
16 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1633 |
1 |
|
|
T24 |
15 |
|
T17 |
15 |
|
T97 |
54 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
767 |
1 |
|
|
T24 |
8 |
|
T17 |
4 |
|
T97 |
15 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1591 |
1 |
|
|
T24 |
15 |
|
T17 |
13 |
|
T97 |
53 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T24 |
7 |
|
T17 |
4 |
|
T97 |
16 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1597 |
1 |
|
|
T24 |
14 |
|
T17 |
15 |
|
T97 |
54 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
765 |
1 |
|
|
T24 |
7 |
|
T17 |
4 |
|
T97 |
15 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1545 |
1 |
|
|
T24 |
16 |
|
T17 |
13 |
|
T97 |
52 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T24 |
7 |
|
T17 |
4 |
|
T97 |
15 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1559 |
1 |
|
|
T24 |
13 |
|
T17 |
15 |
|
T97 |
53 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
765 |
1 |
|
|
T24 |
7 |
|
T17 |
4 |
|
T97 |
15 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1504 |
1 |
|
|
T24 |
16 |
|
T17 |
13 |
|
T97 |
49 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T24 |
7 |
|
T17 |
4 |
|
T97 |
15 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1523 |
1 |
|
|
T24 |
13 |
|
T17 |
15 |
|
T97 |
53 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T24 |
7 |
|
T17 |
4 |
|
T97 |
15 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1462 |
1 |
|
|
T24 |
16 |
|
T17 |
11 |
|
T97 |
48 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T24 |
7 |
|
T17 |
4 |
|
T97 |
15 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1490 |
1 |
|
|
T24 |
13 |
|
T17 |
15 |
|
T97 |
52 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T24 |
7 |
|
T17 |
4 |
|
T97 |
15 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1425 |
1 |
|
|
T24 |
16 |
|
T17 |
11 |
|
T97 |
45 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T24 |
7 |
|
T17 |
4 |
|
T97 |
15 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1448 |
1 |
|
|
T24 |
13 |
|
T17 |
14 |
|
T97 |
52 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
760 |
1 |
|
|
T24 |
7 |
|
T17 |
4 |
|
T97 |
15 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1398 |
1 |
|
|
T24 |
15 |
|
T17 |
11 |
|
T97 |
42 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T24 |
7 |
|
T17 |
4 |
|
T97 |
15 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1400 |
1 |
|
|
T24 |
10 |
|
T17 |
14 |
|
T97 |
51 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
760 |
1 |
|
|
T24 |
7 |
|
T17 |
4 |
|
T97 |
15 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1367 |
1 |
|
|
T24 |
14 |
|
T17 |
11 |
|
T97 |
42 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T24 |
7 |
|
T17 |
4 |
|
T97 |
15 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1376 |
1 |
|
|
T24 |
10 |
|
T17 |
14 |
|
T97 |
50 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
760 |
1 |
|
|
T24 |
7 |
|
T17 |
4 |
|
T97 |
15 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1328 |
1 |
|
|
T24 |
14 |
|
T17 |
11 |
|
T97 |
40 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T24 |
7 |
|
T17 |
4 |
|
T97 |
15 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1332 |
1 |
|
|
T24 |
9 |
|
T17 |
13 |
|
T97 |
47 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
760 |
1 |
|
|
T24 |
7 |
|
T17 |
4 |
|
T97 |
15 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1293 |
1 |
|
|
T24 |
14 |
|
T17 |
11 |
|
T97 |
40 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T24 |
7 |
|
T17 |
4 |
|
T97 |
15 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1303 |
1 |
|
|
T24 |
9 |
|
T17 |
13 |
|
T97 |
47 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T24 |
7 |
|
T17 |
4 |
|
T97 |
15 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1250 |
1 |
|
|
T24 |
14 |
|
T17 |
11 |
|
T97 |
39 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T24 |
7 |
|
T17 |
4 |
|
T97 |
15 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1274 |
1 |
|
|
T24 |
7 |
|
T17 |
13 |
|
T97 |
47 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[0] |
auto[0] |
66281 |
1 |
|
|
T24 |
172 |
|
T17 |
1150 |
|
T97 |
2032 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45887 |
1 |
|
|
T24 |
261 |
|
T17 |
123 |
|
T97 |
716 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56633 |
1 |
|
|
T24 |
1934 |
|
T17 |
339 |
|
T97 |
1739 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45430 |
1 |
|
|
T24 |
371 |
|
T17 |
203 |
|
T97 |
885 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
773 |
1 |
|
|
T24 |
4 |
|
T17 |
5 |
|
T97 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1701 |
1 |
|
|
T24 |
17 |
|
T17 |
10 |
|
T97 |
50 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T24 |
5 |
|
T17 |
5 |
|
T97 |
17 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1720 |
1 |
|
|
T24 |
16 |
|
T17 |
9 |
|
T97 |
48 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
773 |
1 |
|
|
T24 |
4 |
|
T17 |
5 |
|
T97 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1670 |
1 |
|
|
T24 |
17 |
|
T17 |
10 |
|
T97 |
49 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T24 |
5 |
|
T17 |
5 |
|
T97 |
17 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1697 |
1 |
|
|
T24 |
16 |
|
T17 |
9 |
|
T97 |
47 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
772 |
1 |
|
|
T24 |
4 |
|
T17 |
5 |
|
T97 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1632 |
1 |
|
|
T24 |
16 |
|
T17 |
10 |
|
T97 |
49 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T24 |
5 |
|
T17 |
5 |
|
T97 |
17 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1667 |
1 |
|
|
T24 |
16 |
|
T17 |
9 |
|
T97 |
47 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
772 |
1 |
|
|
T24 |
4 |
|
T17 |
5 |
|
T97 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1591 |
1 |
|
|
T24 |
13 |
|
T17 |
9 |
|
T97 |
49 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T24 |
5 |
|
T17 |
5 |
|
T97 |
17 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1636 |
1 |
|
|
T24 |
16 |
|
T17 |
9 |
|
T97 |
47 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
769 |
1 |
|
|
T24 |
4 |
|
T17 |
5 |
|
T97 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1553 |
1 |
|
|
T24 |
13 |
|
T17 |
9 |
|
T97 |
45 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T24 |
5 |
|
T17 |
5 |
|
T97 |
17 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1607 |
1 |
|
|
T24 |
16 |
|
T17 |
9 |
|
T97 |
47 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
769 |
1 |
|
|
T24 |
4 |
|
T17 |
5 |
|
T97 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1522 |
1 |
|
|
T24 |
13 |
|
T17 |
9 |
|
T97 |
43 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T24 |
5 |
|
T17 |
5 |
|
T97 |
17 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1573 |
1 |
|
|
T24 |
16 |
|
T17 |
9 |
|
T97 |
46 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
767 |
1 |
|
|
T24 |
3 |
|
T17 |
5 |
|
T97 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1488 |
1 |
|
|
T24 |
14 |
|
T17 |
9 |
|
T97 |
40 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T24 |
5 |
|
T17 |
5 |
|
T97 |
17 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1540 |
1 |
|
|
T24 |
16 |
|
T17 |
9 |
|
T97 |
46 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
767 |
1 |
|
|
T24 |
3 |
|
T17 |
5 |
|
T97 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1447 |
1 |
|
|
T24 |
12 |
|
T17 |
9 |
|
T97 |
40 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T24 |
5 |
|
T17 |
5 |
|
T97 |
17 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1508 |
1 |
|
|
T24 |
16 |
|
T17 |
9 |
|
T97 |
46 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
762 |
1 |
|
|
T24 |
3 |
|
T17 |
5 |
|
T97 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1411 |
1 |
|
|
T24 |
12 |
|
T17 |
9 |
|
T97 |
39 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T24 |
5 |
|
T17 |
5 |
|
T97 |
17 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1483 |
1 |
|
|
T24 |
16 |
|
T17 |
9 |
|
T97 |
46 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
762 |
1 |
|
|
T24 |
3 |
|
T17 |
5 |
|
T97 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1378 |
1 |
|
|
T24 |
11 |
|
T17 |
9 |
|
T97 |
39 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T24 |
5 |
|
T17 |
5 |
|
T97 |
17 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1449 |
1 |
|
|
T24 |
16 |
|
T17 |
9 |
|
T97 |
42 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T24 |
3 |
|
T17 |
5 |
|
T97 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1339 |
1 |
|
|
T24 |
11 |
|
T17 |
8 |
|
T97 |
37 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T24 |
5 |
|
T17 |
5 |
|
T97 |
17 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1405 |
1 |
|
|
T24 |
16 |
|
T17 |
9 |
|
T97 |
42 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T24 |
3 |
|
T17 |
5 |
|
T97 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1302 |
1 |
|
|
T24 |
11 |
|
T17 |
8 |
|
T97 |
36 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T24 |
5 |
|
T17 |
5 |
|
T97 |
17 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1372 |
1 |
|
|
T24 |
16 |
|
T17 |
9 |
|
T97 |
40 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T24 |
3 |
|
T17 |
5 |
|
T97 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1264 |
1 |
|
|
T24 |
11 |
|
T17 |
8 |
|
T97 |
34 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T24 |
5 |
|
T17 |
5 |
|
T97 |
17 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1340 |
1 |
|
|
T24 |
15 |
|
T17 |
8 |
|
T97 |
39 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T24 |
3 |
|
T17 |
5 |
|
T97 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1225 |
1 |
|
|
T24 |
11 |
|
T17 |
7 |
|
T97 |
32 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T24 |
5 |
|
T17 |
5 |
|
T97 |
17 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1312 |
1 |
|
|
T24 |
15 |
|
T17 |
8 |
|
T97 |
36 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T24 |
3 |
|
T17 |
5 |
|
T97 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1193 |
1 |
|
|
T24 |
11 |
|
T17 |
6 |
|
T97 |
32 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T24 |
5 |
|
T17 |
5 |
|
T97 |
17 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1276 |
1 |
|
|
T24 |
13 |
|
T17 |
8 |
|
T97 |
35 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[0] |
auto[0] |
59300 |
1 |
|
|
T24 |
1743 |
|
T17 |
425 |
|
T97 |
1563 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[0] |
auto[1] |
43626 |
1 |
|
|
T24 |
298 |
|
T17 |
269 |
|
T97 |
782 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[1] |
auto[0] |
66697 |
1 |
|
|
T24 |
452 |
|
T17 |
108 |
|
T97 |
2439 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45449 |
1 |
|
|
T24 |
285 |
|
T17 |
938 |
|
T97 |
764 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
782 |
1 |
|
|
T24 |
5 |
|
T17 |
6 |
|
T97 |
21 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1655 |
1 |
|
|
T24 |
14 |
|
T17 |
12 |
|
T97 |
35 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
774 |
1 |
|
|
T24 |
5 |
|
T17 |
1 |
|
T97 |
23 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1670 |
1 |
|
|
T24 |
13 |
|
T17 |
17 |
|
T97 |
34 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
782 |
1 |
|
|
T24 |
5 |
|
T17 |
6 |
|
T97 |
21 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1619 |
1 |
|
|
T24 |
14 |
|
T17 |
12 |
|
T97 |
35 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
774 |
1 |
|
|
T24 |
5 |
|
T17 |
1 |
|
T97 |
23 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1637 |
1 |
|
|
T24 |
12 |
|
T17 |
17 |
|
T97 |
34 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
780 |
1 |
|
|
T24 |
5 |
|
T17 |
6 |
|
T97 |
21 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1588 |
1 |
|
|
T24 |
14 |
|
T17 |
12 |
|
T97 |
35 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
773 |
1 |
|
|
T24 |
5 |
|
T17 |
1 |
|
T97 |
22 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1598 |
1 |
|
|
T24 |
12 |
|
T17 |
16 |
|
T97 |
35 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
780 |
1 |
|
|
T24 |
5 |
|
T17 |
6 |
|
T97 |
21 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1553 |
1 |
|
|
T24 |
14 |
|
T17 |
12 |
|
T97 |
34 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
773 |
1 |
|
|
T24 |
5 |
|
T17 |
1 |
|
T97 |
22 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1566 |
1 |
|
|
T24 |
11 |
|
T17 |
16 |
|
T97 |
35 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
776 |
1 |
|
|
T24 |
5 |
|
T17 |
6 |
|
T97 |
21 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1520 |
1 |
|
|
T24 |
14 |
|
T17 |
12 |
|
T97 |
33 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
770 |
1 |
|
|
T24 |
5 |
|
T17 |
1 |
|
T97 |
22 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1530 |
1 |
|
|
T24 |
11 |
|
T17 |
16 |
|
T97 |
35 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
776 |
1 |
|
|
T24 |
5 |
|
T17 |
6 |
|
T97 |
21 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1487 |
1 |
|
|
T24 |
14 |
|
T17 |
12 |
|
T97 |
32 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
770 |
1 |
|
|
T24 |
5 |
|
T17 |
1 |
|
T97 |
22 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1507 |
1 |
|
|
T24 |
11 |
|
T17 |
15 |
|
T97 |
35 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
773 |
1 |
|
|
T24 |
5 |
|
T17 |
5 |
|
T97 |
21 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1450 |
1 |
|
|
T24 |
14 |
|
T17 |
13 |
|
T97 |
31 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T24 |
5 |
|
T17 |
1 |
|
T97 |
22 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1487 |
1 |
|
|
T24 |
11 |
|
T17 |
14 |
|
T97 |
35 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
773 |
1 |
|
|
T24 |
5 |
|
T17 |
5 |
|
T97 |
21 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1426 |
1 |
|
|
T24 |
14 |
|
T17 |
13 |
|
T97 |
29 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T24 |
5 |
|
T17 |
1 |
|
T97 |
22 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1465 |
1 |
|
|
T24 |
11 |
|
T17 |
13 |
|
T97 |
34 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
767 |
1 |
|
|
T24 |
5 |
|
T17 |
5 |
|
T97 |
21 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1387 |
1 |
|
|
T24 |
14 |
|
T17 |
13 |
|
T97 |
29 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T24 |
5 |
|
T17 |
1 |
|
T97 |
22 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1422 |
1 |
|
|
T24 |
11 |
|
T17 |
13 |
|
T97 |
33 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
767 |
1 |
|
|
T24 |
5 |
|
T17 |
5 |
|
T97 |
21 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1355 |
1 |
|
|
T24 |
14 |
|
T17 |
13 |
|
T97 |
28 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T24 |
5 |
|
T17 |
1 |
|
T97 |
22 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1396 |
1 |
|
|
T24 |
10 |
|
T17 |
13 |
|
T97 |
31 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
765 |
1 |
|
|
T24 |
5 |
|
T17 |
5 |
|
T97 |
21 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1319 |
1 |
|
|
T24 |
13 |
|
T17 |
12 |
|
T97 |
26 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T24 |
5 |
|
T17 |
1 |
|
T97 |
22 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1337 |
1 |
|
|
T24 |
10 |
|
T17 |
12 |
|
T97 |
29 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
765 |
1 |
|
|
T24 |
5 |
|
T17 |
5 |
|
T97 |
21 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1282 |
1 |
|
|
T24 |
13 |
|
T17 |
12 |
|
T97 |
24 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T24 |
5 |
|
T17 |
1 |
|
T97 |
22 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1312 |
1 |
|
|
T24 |
10 |
|
T17 |
12 |
|
T97 |
29 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
765 |
1 |
|
|
T24 |
5 |
|
T17 |
5 |
|
T97 |
21 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1261 |
1 |
|
|
T24 |
13 |
|
T17 |
12 |
|
T97 |
24 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T24 |
5 |
|
T17 |
1 |
|
T97 |
22 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1266 |
1 |
|
|
T24 |
10 |
|
T17 |
11 |
|
T97 |
29 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
765 |
1 |
|
|
T24 |
5 |
|
T17 |
5 |
|
T97 |
21 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1232 |
1 |
|
|
T24 |
13 |
|
T17 |
12 |
|
T97 |
23 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T24 |
5 |
|
T17 |
1 |
|
T97 |
22 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1230 |
1 |
|
|
T24 |
8 |
|
T17 |
11 |
|
T97 |
28 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
765 |
1 |
|
|
T24 |
5 |
|
T17 |
5 |
|
T97 |
21 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1198 |
1 |
|
|
T24 |
13 |
|
T17 |
12 |
|
T97 |
23 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T24 |
5 |
|
T17 |
1 |
|
T97 |
22 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1196 |
1 |
|
|
T24 |
8 |
|
T17 |
11 |
|
T97 |
28 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[0] |
auto[0] |
63136 |
1 |
|
|
T24 |
374 |
|
T17 |
395 |
|
T97 |
1274 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[0] |
auto[1] |
41233 |
1 |
|
|
T24 |
1758 |
|
T17 |
791 |
|
T97 |
756 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[1] |
auto[0] |
63194 |
1 |
|
|
T24 |
322 |
|
T17 |
426 |
|
T97 |
2082 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46777 |
1 |
|
|
T24 |
201 |
|
T17 |
211 |
|
T97 |
1082 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
771 |
1 |
|
|
T24 |
6 |
|
T17 |
6 |
|
T97 |
18 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1702 |
1 |
|
|
T24 |
18 |
|
T17 |
9 |
|
T97 |
53 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
778 |
1 |
|
|
T24 |
6 |
|
T17 |
6 |
|
T97 |
22 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1698 |
1 |
|
|
T24 |
17 |
|
T17 |
8 |
|
T97 |
50 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
771 |
1 |
|
|
T24 |
6 |
|
T17 |
6 |
|
T97 |
18 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1656 |
1 |
|
|
T24 |
18 |
|
T17 |
9 |
|
T97 |
50 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
778 |
1 |
|
|
T24 |
6 |
|
T17 |
6 |
|
T97 |
22 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1657 |
1 |
|
|
T24 |
17 |
|
T17 |
8 |
|
T97 |
50 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
771 |
1 |
|
|
T24 |
6 |
|
T17 |
6 |
|
T97 |
18 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1626 |
1 |
|
|
T24 |
18 |
|
T17 |
9 |
|
T97 |
50 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
776 |
1 |
|
|
T24 |
6 |
|
T17 |
6 |
|
T97 |
22 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1625 |
1 |
|
|
T24 |
17 |
|
T17 |
8 |
|
T97 |
50 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
771 |
1 |
|
|
T24 |
6 |
|
T17 |
6 |
|
T97 |
18 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1601 |
1 |
|
|
T24 |
18 |
|
T17 |
9 |
|
T97 |
50 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
776 |
1 |
|
|
T24 |
6 |
|
T17 |
6 |
|
T97 |
22 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1600 |
1 |
|
|
T24 |
17 |
|
T17 |
8 |
|
T97 |
50 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
768 |
1 |
|
|
T24 |
6 |
|
T17 |
6 |
|
T97 |
18 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1572 |
1 |
|
|
T24 |
18 |
|
T17 |
9 |
|
T97 |
49 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
774 |
1 |
|
|
T24 |
6 |
|
T17 |
6 |
|
T97 |
22 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1564 |
1 |
|
|
T24 |
16 |
|
T17 |
8 |
|
T97 |
50 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
768 |
1 |
|
|
T24 |
6 |
|
T17 |
6 |
|
T97 |
18 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1533 |
1 |
|
|
T24 |
18 |
|
T17 |
8 |
|
T97 |
45 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
774 |
1 |
|
|
T24 |
6 |
|
T17 |
6 |
|
T97 |
22 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1537 |
1 |
|
|
T24 |
15 |
|
T17 |
8 |
|
T97 |
50 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
763 |
1 |
|
|
T24 |
5 |
|
T17 |
5 |
|
T97 |
18 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1487 |
1 |
|
|
T24 |
19 |
|
T17 |
9 |
|
T97 |
43 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
769 |
1 |
|
|
T24 |
6 |
|
T17 |
6 |
|
T97 |
21 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1496 |
1 |
|
|
T24 |
12 |
|
T17 |
8 |
|
T97 |
46 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
763 |
1 |
|
|
T24 |
5 |
|
T17 |
5 |
|
T97 |
18 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1442 |
1 |
|
|
T24 |
19 |
|
T17 |
9 |
|
T97 |
40 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
769 |
1 |
|
|
T24 |
6 |
|
T17 |
6 |
|
T97 |
21 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1452 |
1 |
|
|
T24 |
12 |
|
T17 |
8 |
|
T97 |
46 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T24 |
5 |
|
T17 |
5 |
|
T97 |
18 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1416 |
1 |
|
|
T24 |
18 |
|
T17 |
9 |
|
T97 |
40 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
764 |
1 |
|
|
T24 |
6 |
|
T17 |
6 |
|
T97 |
21 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1424 |
1 |
|
|
T24 |
12 |
|
T17 |
8 |
|
T97 |
46 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T24 |
5 |
|
T17 |
5 |
|
T97 |
18 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1387 |
1 |
|
|
T24 |
18 |
|
T17 |
9 |
|
T97 |
39 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
764 |
1 |
|
|
T24 |
6 |
|
T17 |
6 |
|
T97 |
21 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1398 |
1 |
|
|
T24 |
12 |
|
T17 |
7 |
|
T97 |
46 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T24 |
5 |
|
T17 |
5 |
|
T97 |
18 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1350 |
1 |
|
|
T24 |
17 |
|
T17 |
6 |
|
T97 |
39 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T24 |
6 |
|
T17 |
6 |
|
T97 |
21 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1370 |
1 |
|
|
T24 |
11 |
|
T17 |
7 |
|
T97 |
45 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T24 |
5 |
|
T17 |
5 |
|
T97 |
18 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1314 |
1 |
|
|
T24 |
17 |
|
T17 |
6 |
|
T97 |
37 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T24 |
6 |
|
T17 |
6 |
|
T97 |
21 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1337 |
1 |
|
|
T24 |
11 |
|
T17 |
7 |
|
T97 |
44 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T24 |
5 |
|
T17 |
5 |
|
T97 |
18 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1277 |
1 |
|
|
T24 |
17 |
|
T17 |
6 |
|
T97 |
34 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T24 |
6 |
|
T17 |
6 |
|
T97 |
21 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1304 |
1 |
|
|
T24 |
10 |
|
T17 |
7 |
|
T97 |
44 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T24 |
5 |
|
T17 |
5 |
|
T97 |
18 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1241 |
1 |
|
|
T24 |
17 |
|
T17 |
6 |
|
T97 |
34 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T24 |
6 |
|
T17 |
6 |
|
T97 |
21 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1262 |
1 |
|
|
T24 |
10 |
|
T17 |
7 |
|
T97 |
42 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T24 |
5 |
|
T17 |
5 |
|
T97 |
18 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1195 |
1 |
|
|
T24 |
17 |
|
T17 |
6 |
|
T97 |
31 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T24 |
6 |
|
T17 |
6 |
|
T97 |
21 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1244 |
1 |
|
|
T24 |
10 |
|
T17 |
7 |
|
T97 |
42 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[0] |
auto[0] |
61048 |
1 |
|
|
T24 |
664 |
|
T17 |
478 |
|
T97 |
1215 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45594 |
1 |
|
|
T24 |
1462 |
|
T17 |
932 |
|
T97 |
1121 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57742 |
1 |
|
|
T24 |
239 |
|
T17 |
285 |
|
T97 |
1844 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[1] |
auto[1] |
50771 |
1 |
|
|
T24 |
358 |
|
T17 |
122 |
|
T97 |
1075 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
783 |
1 |
|
|
T24 |
8 |
|
T17 |
7 |
|
T97 |
22 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1637 |
1 |
|
|
T24 |
14 |
|
T17 |
9 |
|
T97 |
47 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
769 |
1 |
|
|
T24 |
6 |
|
T17 |
6 |
|
T97 |
19 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1653 |
1 |
|
|
T24 |
15 |
|
T17 |
9 |
|
T97 |
51 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
783 |
1 |
|
|
T24 |
8 |
|
T17 |
7 |
|
T97 |
22 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1596 |
1 |
|
|
T24 |
11 |
|
T17 |
9 |
|
T97 |
46 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
769 |
1 |
|
|
T24 |
6 |
|
T17 |
6 |
|
T97 |
19 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1638 |
1 |
|
|
T24 |
14 |
|
T17 |
9 |
|
T97 |
50 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
783 |
1 |
|
|
T24 |
8 |
|
T17 |
7 |
|
T97 |
22 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1561 |
1 |
|
|
T24 |
11 |
|
T17 |
9 |
|
T97 |
44 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T24 |
6 |
|
T17 |
6 |
|
T97 |
18 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1602 |
1 |
|
|
T24 |
14 |
|
T17 |
8 |
|
T97 |
51 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
783 |
1 |
|
|
T24 |
8 |
|
T17 |
7 |
|
T97 |
22 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1529 |
1 |
|
|
T24 |
11 |
|
T17 |
9 |
|
T97 |
43 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T24 |
6 |
|
T17 |
6 |
|
T97 |
18 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1568 |
1 |
|
|
T24 |
14 |
|
T17 |
7 |
|
T97 |
50 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
780 |
1 |
|
|
T24 |
8 |
|
T17 |
7 |
|
T97 |
22 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1499 |
1 |
|
|
T24 |
11 |
|
T17 |
9 |
|
T97 |
41 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
765 |
1 |
|
|
T24 |
6 |
|
T17 |
6 |
|
T97 |
18 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1534 |
1 |
|
|
T24 |
14 |
|
T17 |
6 |
|
T97 |
49 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
780 |
1 |
|
|
T24 |
8 |
|
T17 |
7 |
|
T97 |
22 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1469 |
1 |
|
|
T24 |
11 |
|
T17 |
9 |
|
T97 |
41 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
765 |
1 |
|
|
T24 |
6 |
|
T17 |
6 |
|
T97 |
18 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1507 |
1 |
|
|
T24 |
14 |
|
T17 |
6 |
|
T97 |
49 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
777 |
1 |
|
|
T24 |
7 |
|
T17 |
7 |
|
T97 |
22 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1439 |
1 |
|
|
T24 |
12 |
|
T17 |
9 |
|
T97 |
38 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
759 |
1 |
|
|
T24 |
6 |
|
T17 |
6 |
|
T97 |
18 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1478 |
1 |
|
|
T24 |
14 |
|
T17 |
6 |
|
T97 |
48 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
777 |
1 |
|
|
T24 |
7 |
|
T17 |
7 |
|
T97 |
22 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1411 |
1 |
|
|
T24 |
12 |
|
T17 |
9 |
|
T97 |
36 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
759 |
1 |
|
|
T24 |
6 |
|
T17 |
6 |
|
T97 |
18 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1446 |
1 |
|
|
T24 |
13 |
|
T17 |
6 |
|
T97 |
47 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
772 |
1 |
|
|
T24 |
7 |
|
T17 |
7 |
|
T97 |
22 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1383 |
1 |
|
|
T24 |
12 |
|
T17 |
8 |
|
T97 |
35 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T24 |
6 |
|
T17 |
6 |
|
T97 |
18 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1420 |
1 |
|
|
T24 |
13 |
|
T17 |
5 |
|
T97 |
46 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
772 |
1 |
|
|
T24 |
7 |
|
T17 |
7 |
|
T97 |
22 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1361 |
1 |
|
|
T24 |
12 |
|
T17 |
8 |
|
T97 |
33 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T24 |
6 |
|
T17 |
6 |
|
T97 |
18 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1394 |
1 |
|
|
T24 |
13 |
|
T17 |
5 |
|
T97 |
46 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
769 |
1 |
|
|
T24 |
7 |
|
T17 |
6 |
|
T97 |
22 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1332 |
1 |
|
|
T24 |
12 |
|
T17 |
8 |
|
T97 |
32 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T24 |
6 |
|
T17 |
6 |
|
T97 |
18 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1351 |
1 |
|
|
T24 |
12 |
|
T17 |
5 |
|
T97 |
45 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
769 |
1 |
|
|
T24 |
7 |
|
T17 |
6 |
|
T97 |
22 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1300 |
1 |
|
|
T24 |
11 |
|
T17 |
8 |
|
T97 |
32 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T24 |
6 |
|
T17 |
6 |
|
T97 |
18 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1329 |
1 |
|
|
T24 |
12 |
|
T17 |
5 |
|
T97 |
44 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
768 |
1 |
|
|
T24 |
7 |
|
T17 |
6 |
|
T97 |
22 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1266 |
1 |
|
|
T24 |
10 |
|
T17 |
8 |
|
T97 |
32 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T24 |
6 |
|
T17 |
6 |
|
T97 |
18 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1296 |
1 |
|
|
T24 |
12 |
|
T17 |
5 |
|
T97 |
43 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
768 |
1 |
|
|
T24 |
7 |
|
T17 |
6 |
|
T97 |
22 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1233 |
1 |
|
|
T24 |
10 |
|
T17 |
8 |
|
T97 |
32 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T24 |
6 |
|
T17 |
6 |
|
T97 |
18 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1263 |
1 |
|
|
T24 |
12 |
|
T17 |
5 |
|
T97 |
42 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
768 |
1 |
|
|
T24 |
7 |
|
T17 |
6 |
|
T97 |
22 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1190 |
1 |
|
|
T24 |
10 |
|
T17 |
8 |
|
T97 |
29 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T24 |
6 |
|
T17 |
6 |
|
T97 |
18 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1232 |
1 |
|
|
T24 |
12 |
|
T17 |
5 |
|
T97 |
41 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58965 |
1 |
|
|
T24 |
554 |
|
T17 |
325 |
|
T97 |
1474 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[0] |
auto[1] |
49063 |
1 |
|
|
T24 |
1431 |
|
T17 |
253 |
|
T97 |
1579 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[1] |
auto[0] |
54322 |
1 |
|
|
T24 |
423 |
|
T17 |
306 |
|
T97 |
1514 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[1] |
auto[1] |
50731 |
1 |
|
|
T24 |
285 |
|
T17 |
902 |
|
T97 |
736 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
785 |
1 |
|
|
T24 |
11 |
|
T17 |
4 |
|
T97 |
24 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1725 |
1 |
|
|
T24 |
11 |
|
T17 |
13 |
|
T97 |
43 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
776 |
1 |
|
|
T24 |
10 |
|
T17 |
3 |
|
T97 |
27 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1734 |
1 |
|
|
T24 |
11 |
|
T17 |
14 |
|
T97 |
40 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
785 |
1 |
|
|
T24 |
11 |
|
T17 |
4 |
|
T97 |
24 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1694 |
1 |
|
|
T24 |
11 |
|
T17 |
13 |
|
T97 |
41 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
776 |
1 |
|
|
T24 |
10 |
|
T17 |
3 |
|
T97 |
27 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1707 |
1 |
|
|
T24 |
10 |
|
T17 |
13 |
|
T97 |
40 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
784 |
1 |
|
|
T24 |
11 |
|
T17 |
4 |
|
T97 |
24 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1660 |
1 |
|
|
T24 |
10 |
|
T17 |
12 |
|
T97 |
39 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
775 |
1 |
|
|
T24 |
10 |
|
T17 |
3 |
|
T97 |
27 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1675 |
1 |
|
|
T24 |
10 |
|
T17 |
13 |
|
T97 |
40 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
784 |
1 |
|
|
T24 |
11 |
|
T17 |
4 |
|
T97 |
24 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1630 |
1 |
|
|
T24 |
10 |
|
T17 |
12 |
|
T97 |
38 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
775 |
1 |
|
|
T24 |
10 |
|
T17 |
3 |
|
T97 |
27 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1647 |
1 |
|
|
T24 |
10 |
|
T17 |
13 |
|
T97 |
40 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
781 |
1 |
|
|
T24 |
11 |
|
T17 |
4 |
|
T97 |
24 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1595 |
1 |
|
|
T24 |
10 |
|
T17 |
12 |
|
T97 |
37 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
774 |
1 |
|
|
T24 |
10 |
|
T17 |
3 |
|
T97 |
27 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1613 |
1 |
|
|
T24 |
10 |
|
T17 |
11 |
|
T97 |
39 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
781 |
1 |
|
|
T24 |
11 |
|
T17 |
4 |
|
T97 |
24 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1568 |
1 |
|
|
T24 |
10 |
|
T17 |
12 |
|
T97 |
37 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
774 |
1 |
|
|
T24 |
10 |
|
T17 |
3 |
|
T97 |
27 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1568 |
1 |
|
|
T24 |
10 |
|
T17 |
11 |
|
T97 |
38 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
779 |
1 |
|
|
T24 |
10 |
|
T17 |
4 |
|
T97 |
24 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1539 |
1 |
|
|
T24 |
11 |
|
T17 |
11 |
|
T97 |
36 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
767 |
1 |
|
|
T24 |
10 |
|
T17 |
3 |
|
T97 |
27 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1534 |
1 |
|
|
T24 |
10 |
|
T17 |
11 |
|
T97 |
38 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
779 |
1 |
|
|
T24 |
10 |
|
T17 |
4 |
|
T97 |
24 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1493 |
1 |
|
|
T24 |
11 |
|
T17 |
11 |
|
T97 |
35 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
767 |
1 |
|
|
T24 |
10 |
|
T17 |
3 |
|
T97 |
27 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1495 |
1 |
|
|
T24 |
10 |
|
T17 |
11 |
|
T97 |
36 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
772 |
1 |
|
|
T24 |
10 |
|
T17 |
4 |
|
T97 |
24 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1460 |
1 |
|
|
T24 |
11 |
|
T17 |
11 |
|
T97 |
33 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
764 |
1 |
|
|
T24 |
10 |
|
T17 |
3 |
|
T97 |
27 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1459 |
1 |
|
|
T24 |
9 |
|
T17 |
11 |
|
T97 |
36 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
772 |
1 |
|
|
T24 |
10 |
|
T17 |
4 |
|
T97 |
24 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1429 |
1 |
|
|
T24 |
11 |
|
T17 |
11 |
|
T97 |
33 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
764 |
1 |
|
|
T24 |
10 |
|
T17 |
3 |
|
T97 |
27 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1416 |
1 |
|
|
T24 |
9 |
|
T17 |
11 |
|
T97 |
34 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
771 |
1 |
|
|
T24 |
10 |
|
T17 |
4 |
|
T97 |
24 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1392 |
1 |
|
|
T24 |
9 |
|
T17 |
11 |
|
T97 |
32 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T24 |
10 |
|
T17 |
3 |
|
T97 |
27 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1378 |
1 |
|
|
T24 |
9 |
|
T17 |
10 |
|
T97 |
33 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
771 |
1 |
|
|
T24 |
10 |
|
T17 |
4 |
|
T97 |
24 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1368 |
1 |
|
|
T24 |
9 |
|
T17 |
11 |
|
T97 |
32 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T24 |
10 |
|
T17 |
3 |
|
T97 |
27 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1339 |
1 |
|
|
T24 |
9 |
|
T17 |
9 |
|
T97 |
30 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
771 |
1 |
|
|
T24 |
10 |
|
T17 |
4 |
|
T97 |
24 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1332 |
1 |
|
|
T24 |
9 |
|
T17 |
11 |
|
T97 |
30 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T24 |
10 |
|
T17 |
3 |
|
T97 |
27 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1306 |
1 |
|
|
T24 |
9 |
|
T17 |
9 |
|
T97 |
29 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
771 |
1 |
|
|
T24 |
10 |
|
T17 |
4 |
|
T97 |
24 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1297 |
1 |
|
|
T24 |
9 |
|
T17 |
10 |
|
T97 |
29 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T24 |
10 |
|
T17 |
3 |
|
T97 |
27 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1274 |
1 |
|
|
T24 |
9 |
|
T17 |
9 |
|
T97 |
28 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
771 |
1 |
|
|
T24 |
10 |
|
T17 |
4 |
|
T97 |
24 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1266 |
1 |
|
|
T24 |
9 |
|
T17 |
10 |
|
T97 |
28 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T24 |
10 |
|
T17 |
3 |
|
T97 |
27 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1241 |
1 |
|
|
T24 |
7 |
|
T17 |
9 |
|
T97 |
28 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56959 |
1 |
|
|
T24 |
511 |
|
T17 |
217 |
|
T97 |
1514 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[0] |
auto[1] |
43579 |
1 |
|
|
T24 |
198 |
|
T17 |
1036 |
|
T97 |
1273 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[1] |
auto[0] |
63445 |
1 |
|
|
T24 |
1703 |
|
T17 |
167 |
|
T97 |
581 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[1] |
auto[1] |
49103 |
1 |
|
|
T24 |
312 |
|
T17 |
184 |
|
T97 |
1768 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
757 |
1 |
|
|
T24 |
8 |
|
T17 |
6 |
|
T97 |
17 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1749 |
1 |
|
|
T24 |
13 |
|
T17 |
18 |
|
T97 |
57 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
768 |
1 |
|
|
T24 |
9 |
|
T17 |
5 |
|
T97 |
14 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1745 |
1 |
|
|
T24 |
12 |
|
T17 |
18 |
|
T97 |
61 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
757 |
1 |
|
|
T24 |
8 |
|
T17 |
6 |
|
T97 |
17 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1715 |
1 |
|
|
T24 |
13 |
|
T17 |
18 |
|
T97 |
55 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
768 |
1 |
|
|
T24 |
9 |
|
T17 |
5 |
|
T97 |
14 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1714 |
1 |
|
|
T24 |
11 |
|
T17 |
17 |
|
T97 |
60 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T24 |
8 |
|
T17 |
6 |
|
T97 |
17 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1675 |
1 |
|
|
T24 |
12 |
|
T17 |
18 |
|
T97 |
54 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T24 |
9 |
|
T17 |
5 |
|
T97 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1681 |
1 |
|
|
T24 |
11 |
|
T17 |
17 |
|
T97 |
60 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T24 |
8 |
|
T17 |
6 |
|
T97 |
17 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1652 |
1 |
|
|
T24 |
12 |
|
T17 |
18 |
|
T97 |
53 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T24 |
9 |
|
T17 |
5 |
|
T97 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1638 |
1 |
|
|
T24 |
10 |
|
T17 |
14 |
|
T97 |
59 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T24 |
8 |
|
T17 |
6 |
|
T97 |
17 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1615 |
1 |
|
|
T24 |
12 |
|
T17 |
17 |
|
T97 |
51 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
765 |
1 |
|
|
T24 |
9 |
|
T17 |
5 |
|
T97 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1608 |
1 |
|
|
T24 |
10 |
|
T17 |
14 |
|
T97 |
59 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T24 |
8 |
|
T17 |
6 |
|
T97 |
17 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1576 |
1 |
|
|
T24 |
12 |
|
T17 |
17 |
|
T97 |
51 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
765 |
1 |
|
|
T24 |
9 |
|
T17 |
5 |
|
T97 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1580 |
1 |
|
|
T24 |
9 |
|
T17 |
14 |
|
T97 |
59 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T24 |
7 |
|
T17 |
6 |
|
T97 |
17 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1538 |
1 |
|
|
T24 |
13 |
|
T17 |
17 |
|
T97 |
48 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T24 |
9 |
|
T17 |
5 |
|
T97 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1550 |
1 |
|
|
T24 |
9 |
|
T17 |
14 |
|
T97 |
55 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T24 |
7 |
|
T17 |
6 |
|
T97 |
17 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1500 |
1 |
|
|
T24 |
13 |
|
T17 |
17 |
|
T97 |
47 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T24 |
9 |
|
T17 |
5 |
|
T97 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1528 |
1 |
|
|
T24 |
9 |
|
T17 |
14 |
|
T97 |
55 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T24 |
7 |
|
T17 |
6 |
|
T97 |
17 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1456 |
1 |
|
|
T24 |
12 |
|
T17 |
17 |
|
T97 |
46 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T24 |
9 |
|
T17 |
5 |
|
T97 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1497 |
1 |
|
|
T24 |
9 |
|
T17 |
14 |
|
T97 |
53 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T24 |
7 |
|
T17 |
6 |
|
T97 |
17 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1427 |
1 |
|
|
T24 |
12 |
|
T17 |
17 |
|
T97 |
45 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T24 |
9 |
|
T17 |
5 |
|
T97 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1467 |
1 |
|
|
T24 |
9 |
|
T17 |
13 |
|
T97 |
53 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T24 |
7 |
|
T17 |
6 |
|
T97 |
17 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1394 |
1 |
|
|
T24 |
12 |
|
T17 |
17 |
|
T97 |
45 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T24 |
9 |
|
T17 |
5 |
|
T97 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1438 |
1 |
|
|
T24 |
9 |
|
T17 |
12 |
|
T97 |
52 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T24 |
7 |
|
T17 |
6 |
|
T97 |
17 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1352 |
1 |
|
|
T24 |
12 |
|
T17 |
17 |
|
T97 |
43 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T24 |
9 |
|
T17 |
5 |
|
T97 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1407 |
1 |
|
|
T24 |
8 |
|
T17 |
11 |
|
T97 |
52 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T24 |
7 |
|
T17 |
6 |
|
T97 |
17 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1323 |
1 |
|
|
T24 |
12 |
|
T17 |
17 |
|
T97 |
41 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T24 |
9 |
|
T17 |
5 |
|
T97 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1379 |
1 |
|
|
T24 |
8 |
|
T17 |
11 |
|
T97 |
48 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T24 |
7 |
|
T17 |
6 |
|
T97 |
17 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1284 |
1 |
|
|
T24 |
11 |
|
T17 |
16 |
|
T97 |
41 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T24 |
9 |
|
T17 |
5 |
|
T97 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1338 |
1 |
|
|
T24 |
8 |
|
T17 |
10 |
|
T97 |
45 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T24 |
7 |
|
T17 |
6 |
|
T97 |
17 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1252 |
1 |
|
|
T24 |
11 |
|
T17 |
16 |
|
T97 |
39 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T24 |
9 |
|
T17 |
5 |
|
T97 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1306 |
1 |
|
|
T24 |
8 |
|
T17 |
8 |
|
T97 |
45 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[0] |
auto[0] |
59025 |
1 |
|
|
T24 |
290 |
|
T17 |
423 |
|
T97 |
1422 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46042 |
1 |
|
|
T24 |
1480 |
|
T17 |
158 |
|
T97 |
1536 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[1] |
auto[0] |
61571 |
1 |
|
|
T24 |
527 |
|
T17 |
1136 |
|
T97 |
1317 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47518 |
1 |
|
|
T24 |
389 |
|
T17 |
143 |
|
T97 |
940 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
782 |
1 |
|
|
T24 |
7 |
|
T17 |
5 |
|
T97 |
23 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1697 |
1 |
|
|
T24 |
15 |
|
T17 |
9 |
|
T97 |
46 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
775 |
1 |
|
|
T24 |
6 |
|
T17 |
5 |
|
T97 |
28 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1705 |
1 |
|
|
T24 |
15 |
|
T17 |
9 |
|
T97 |
41 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
782 |
1 |
|
|
T24 |
7 |
|
T17 |
5 |
|
T97 |
23 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1657 |
1 |
|
|
T24 |
15 |
|
T17 |
9 |
|
T97 |
46 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
775 |
1 |
|
|
T24 |
6 |
|
T17 |
5 |
|
T97 |
28 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1666 |
1 |
|
|
T24 |
15 |
|
T17 |
8 |
|
T97 |
41 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
780 |
1 |
|
|
T24 |
7 |
|
T17 |
5 |
|
T97 |
23 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1623 |
1 |
|
|
T24 |
15 |
|
T17 |
8 |
|
T97 |
45 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
774 |
1 |
|
|
T24 |
6 |
|
T17 |
5 |
|
T97 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1631 |
1 |
|
|
T24 |
15 |
|
T17 |
8 |
|
T97 |
40 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
780 |
1 |
|
|
T24 |
7 |
|
T17 |
5 |
|
T97 |
23 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1593 |
1 |
|
|
T24 |
15 |
|
T17 |
8 |
|
T97 |
45 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
774 |
1 |
|
|
T24 |
6 |
|
T17 |
5 |
|
T97 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1607 |
1 |
|
|
T24 |
15 |
|
T17 |
8 |
|
T97 |
39 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
775 |
1 |
|
|
T24 |
7 |
|
T17 |
5 |
|
T97 |
23 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1551 |
1 |
|
|
T24 |
15 |
|
T17 |
8 |
|
T97 |
43 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
772 |
1 |
|
|
T24 |
6 |
|
T17 |
5 |
|
T97 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1570 |
1 |
|
|
T24 |
15 |
|
T17 |
8 |
|
T97 |
38 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
775 |
1 |
|
|
T24 |
7 |
|
T17 |
5 |
|
T97 |
23 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1518 |
1 |
|
|
T24 |
15 |
|
T17 |
8 |
|
T97 |
43 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
772 |
1 |
|
|
T24 |
6 |
|
T17 |
5 |
|
T97 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1533 |
1 |
|
|
T24 |
15 |
|
T17 |
7 |
|
T97 |
38 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
771 |
1 |
|
|
T24 |
6 |
|
T17 |
4 |
|
T97 |
23 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1482 |
1 |
|
|
T24 |
15 |
|
T17 |
9 |
|
T97 |
42 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
765 |
1 |
|
|
T24 |
6 |
|
T17 |
5 |
|
T97 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1500 |
1 |
|
|
T24 |
15 |
|
T17 |
7 |
|
T97 |
38 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
771 |
1 |
|
|
T24 |
6 |
|
T17 |
4 |
|
T97 |
23 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1437 |
1 |
|
|
T24 |
15 |
|
T17 |
9 |
|
T97 |
40 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
765 |
1 |
|
|
T24 |
6 |
|
T17 |
5 |
|
T97 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1474 |
1 |
|
|
T24 |
14 |
|
T17 |
7 |
|
T97 |
36 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
768 |
1 |
|
|
T24 |
6 |
|
T17 |
4 |
|
T97 |
23 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1400 |
1 |
|
|
T24 |
15 |
|
T17 |
8 |
|
T97 |
39 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T24 |
6 |
|
T17 |
5 |
|
T97 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1457 |
1 |
|
|
T24 |
14 |
|
T17 |
7 |
|
T97 |
36 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
768 |
1 |
|
|
T24 |
6 |
|
T17 |
4 |
|
T97 |
23 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1370 |
1 |
|
|
T24 |
15 |
|
T17 |
8 |
|
T97 |
38 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T24 |
6 |
|
T17 |
5 |
|
T97 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1429 |
1 |
|
|
T24 |
12 |
|
T17 |
7 |
|
T97 |
35 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
766 |
1 |
|
|
T24 |
6 |
|
T17 |
4 |
|
T97 |
23 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1340 |
1 |
|
|
T24 |
15 |
|
T17 |
7 |
|
T97 |
38 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T24 |
6 |
|
T17 |
5 |
|
T97 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1403 |
1 |
|
|
T24 |
12 |
|
T17 |
7 |
|
T97 |
35 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
766 |
1 |
|
|
T24 |
6 |
|
T17 |
4 |
|
T97 |
23 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1292 |
1 |
|
|
T24 |
13 |
|
T17 |
7 |
|
T97 |
37 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T24 |
6 |
|
T17 |
5 |
|
T97 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1373 |
1 |
|
|
T24 |
12 |
|
T17 |
7 |
|
T97 |
34 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
766 |
1 |
|
|
T24 |
6 |
|
T17 |
4 |
|
T97 |
23 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1247 |
1 |
|
|
T24 |
13 |
|
T17 |
6 |
|
T97 |
34 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T24 |
6 |
|
T17 |
5 |
|
T97 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1332 |
1 |
|
|
T24 |
12 |
|
T17 |
7 |
|
T97 |
34 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
766 |
1 |
|
|
T24 |
6 |
|
T17 |
4 |
|
T97 |
23 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1217 |
1 |
|
|
T24 |
13 |
|
T17 |
6 |
|
T97 |
34 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T24 |
6 |
|
T17 |
5 |
|
T97 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1305 |
1 |
|
|
T24 |
12 |
|
T17 |
7 |
|
T97 |
33 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
766 |
1 |
|
|
T24 |
6 |
|
T17 |
4 |
|
T97 |
23 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1179 |
1 |
|
|
T24 |
12 |
|
T17 |
6 |
|
T97 |
34 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T24 |
6 |
|
T17 |
5 |
|
T97 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1270 |
1 |
|
|
T24 |
11 |
|
T17 |
6 |
|
T97 |
31 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57422 |
1 |
|
|
T24 |
595 |
|
T17 |
602 |
|
T97 |
1479 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48304 |
1 |
|
|
T24 |
1509 |
|
T17 |
194 |
|
T97 |
1227 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[1] |
auto[0] |
54784 |
1 |
|
|
T24 |
437 |
|
T17 |
192 |
|
T97 |
1134 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[1] |
auto[1] |
52715 |
1 |
|
|
T24 |
360 |
|
T17 |
805 |
|
T97 |
1405 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T24 |
5 |
|
T17 |
7 |
|
T97 |
19 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1766 |
1 |
|
|
T24 |
10 |
|
T17 |
9 |
|
T97 |
50 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T24 |
4 |
|
T17 |
6 |
|
T97 |
22 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1749 |
1 |
|
|
T24 |
10 |
|
T17 |
10 |
|
T97 |
48 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T24 |
5 |
|
T17 |
7 |
|
T97 |
19 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1734 |
1 |
|
|
T24 |
10 |
|
T17 |
9 |
|
T97 |
48 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T24 |
4 |
|
T17 |
6 |
|
T97 |
22 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1721 |
1 |
|
|
T24 |
10 |
|
T17 |
10 |
|
T97 |
47 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T24 |
5 |
|
T17 |
7 |
|
T97 |
19 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1697 |
1 |
|
|
T24 |
10 |
|
T17 |
9 |
|
T97 |
48 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T24 |
4 |
|
T17 |
6 |
|
T97 |
22 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1694 |
1 |
|
|
T24 |
9 |
|
T17 |
9 |
|
T97 |
46 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T24 |
5 |
|
T17 |
7 |
|
T97 |
19 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1665 |
1 |
|
|
T24 |
10 |
|
T17 |
9 |
|
T97 |
47 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T24 |
4 |
|
T17 |
6 |
|
T97 |
22 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1654 |
1 |
|
|
T24 |
9 |
|
T17 |
8 |
|
T97 |
44 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T24 |
5 |
|
T17 |
7 |
|
T97 |
19 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1634 |
1 |
|
|
T24 |
10 |
|
T17 |
9 |
|
T97 |
47 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T24 |
4 |
|
T17 |
6 |
|
T97 |
22 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1622 |
1 |
|
|
T24 |
9 |
|
T17 |
8 |
|
T97 |
44 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T24 |
5 |
|
T17 |
7 |
|
T97 |
19 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1595 |
1 |
|
|
T24 |
9 |
|
T17 |
8 |
|
T97 |
47 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T24 |
4 |
|
T17 |
6 |
|
T97 |
22 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1587 |
1 |
|
|
T24 |
9 |
|
T17 |
8 |
|
T97 |
42 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T24 |
5 |
|
T17 |
7 |
|
T97 |
19 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1547 |
1 |
|
|
T24 |
9 |
|
T17 |
8 |
|
T97 |
47 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T24 |
4 |
|
T17 |
6 |
|
T97 |
21 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1565 |
1 |
|
|
T24 |
9 |
|
T17 |
8 |
|
T97 |
42 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T24 |
5 |
|
T17 |
7 |
|
T97 |
19 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1526 |
1 |
|
|
T24 |
9 |
|
T17 |
8 |
|
T97 |
47 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T24 |
4 |
|
T17 |
6 |
|
T97 |
21 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1529 |
1 |
|
|
T24 |
9 |
|
T17 |
8 |
|
T97 |
41 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T24 |
5 |
|
T17 |
7 |
|
T97 |
19 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1490 |
1 |
|
|
T24 |
8 |
|
T17 |
8 |
|
T97 |
47 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T24 |
4 |
|
T17 |
6 |
|
T97 |
21 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1490 |
1 |
|
|
T24 |
9 |
|
T17 |
8 |
|
T97 |
36 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T24 |
5 |
|
T17 |
7 |
|
T97 |
19 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1457 |
1 |
|
|
T24 |
8 |
|
T17 |
8 |
|
T97 |
47 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T24 |
4 |
|
T17 |
6 |
|
T97 |
21 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1456 |
1 |
|
|
T24 |
9 |
|
T17 |
8 |
|
T97 |
34 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T24 |
4 |
|
T17 |
6 |
|
T97 |
19 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1428 |
1 |
|
|
T24 |
7 |
|
T17 |
8 |
|
T97 |
46 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T24 |
4 |
|
T17 |
6 |
|
T97 |
21 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1426 |
1 |
|
|
T24 |
9 |
|
T17 |
8 |
|
T97 |
33 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T24 |
4 |
|
T17 |
6 |
|
T97 |
19 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1392 |
1 |
|
|
T24 |
6 |
|
T17 |
7 |
|
T97 |
44 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T24 |
4 |
|
T17 |
6 |
|
T97 |
21 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1397 |
1 |
|
|
T24 |
9 |
|
T17 |
8 |
|
T97 |
33 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T24 |
4 |
|
T17 |
6 |
|
T97 |
19 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1347 |
1 |
|
|
T24 |
6 |
|
T17 |
7 |
|
T97 |
42 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T24 |
4 |
|
T17 |
6 |
|
T97 |
21 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1360 |
1 |
|
|
T24 |
9 |
|
T17 |
8 |
|
T97 |
30 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T24 |
4 |
|
T17 |
6 |
|
T97 |
19 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1300 |
1 |
|
|
T24 |
6 |
|
T17 |
7 |
|
T97 |
42 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T24 |
4 |
|
T17 |
6 |
|
T97 |
21 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1327 |
1 |
|
|
T24 |
9 |
|
T17 |
7 |
|
T97 |
29 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T24 |
4 |
|
T17 |
6 |
|
T97 |
19 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1262 |
1 |
|
|
T24 |
6 |
|
T17 |
7 |
|
T97 |
42 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T24 |
4 |
|
T17 |
6 |
|
T97 |
21 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1302 |
1 |
|
|
T24 |
9 |
|
T17 |
7 |
|
T97 |
29 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58396 |
1 |
|
|
T24 |
240 |
|
T17 |
966 |
|
T97 |
1232 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45732 |
1 |
|
|
T24 |
302 |
|
T17 |
244 |
|
T97 |
1875 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57187 |
1 |
|
|
T24 |
1859 |
|
T17 |
375 |
|
T97 |
1125 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[1] |
auto[1] |
53093 |
1 |
|
|
T24 |
305 |
|
T17 |
205 |
|
T97 |
1092 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T24 |
5 |
|
T17 |
9 |
|
T97 |
17 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1760 |
1 |
|
|
T24 |
17 |
|
T17 |
7 |
|
T97 |
50 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T24 |
6 |
|
T17 |
4 |
|
T97 |
19 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1747 |
1 |
|
|
T24 |
16 |
|
T17 |
11 |
|
T97 |
48 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T24 |
5 |
|
T17 |
9 |
|
T97 |
17 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1722 |
1 |
|
|
T24 |
17 |
|
T17 |
7 |
|
T97 |
48 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T24 |
6 |
|
T17 |
4 |
|
T97 |
19 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1711 |
1 |
|
|
T24 |
16 |
|
T17 |
10 |
|
T97 |
46 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T24 |
5 |
|
T17 |
9 |
|
T97 |
17 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1682 |
1 |
|
|
T24 |
17 |
|
T17 |
7 |
|
T97 |
47 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T24 |
6 |
|
T17 |
4 |
|
T97 |
19 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1678 |
1 |
|
|
T24 |
15 |
|
T17 |
10 |
|
T97 |
45 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T24 |
5 |
|
T17 |
9 |
|
T97 |
17 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1645 |
1 |
|
|
T24 |
17 |
|
T17 |
7 |
|
T97 |
46 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T24 |
6 |
|
T17 |
4 |
|
T97 |
19 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1640 |
1 |
|
|
T24 |
15 |
|
T17 |
10 |
|
T97 |
44 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T24 |
5 |
|
T17 |
9 |
|
T97 |
17 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1613 |
1 |
|
|
T24 |
17 |
|
T17 |
7 |
|
T97 |
43 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T24 |
6 |
|
T17 |
4 |
|
T97 |
19 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1612 |
1 |
|
|
T24 |
14 |
|
T17 |
10 |
|
T97 |
44 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T24 |
5 |
|
T17 |
9 |
|
T97 |
17 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1581 |
1 |
|
|
T24 |
15 |
|
T17 |
7 |
|
T97 |
42 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T24 |
6 |
|
T17 |
4 |
|
T97 |
19 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1578 |
1 |
|
|
T24 |
14 |
|
T17 |
10 |
|
T97 |
44 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T24 |
5 |
|
T17 |
8 |
|
T97 |
17 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1545 |
1 |
|
|
T24 |
15 |
|
T17 |
8 |
|
T97 |
42 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T24 |
6 |
|
T17 |
4 |
|
T97 |
18 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1548 |
1 |
|
|
T24 |
14 |
|
T17 |
10 |
|
T97 |
44 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T24 |
5 |
|
T17 |
8 |
|
T97 |
17 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1508 |
1 |
|
|
T24 |
15 |
|
T17 |
7 |
|
T97 |
42 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T24 |
6 |
|
T17 |
4 |
|
T97 |
18 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1516 |
1 |
|
|
T24 |
14 |
|
T17 |
10 |
|
T97 |
43 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T24 |
5 |
|
T17 |
8 |
|
T97 |
17 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1470 |
1 |
|
|
T24 |
15 |
|
T17 |
7 |
|
T97 |
41 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T24 |
6 |
|
T17 |
4 |
|
T97 |
18 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1485 |
1 |
|
|
T24 |
14 |
|
T17 |
10 |
|
T97 |
43 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T24 |
5 |
|
T17 |
8 |
|
T97 |
17 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1423 |
1 |
|
|
T24 |
15 |
|
T17 |
7 |
|
T97 |
40 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T24 |
6 |
|
T17 |
4 |
|
T97 |
18 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1457 |
1 |
|
|
T24 |
14 |
|
T17 |
9 |
|
T97 |
42 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T24 |
4 |
|
T17 |
8 |
|
T97 |
17 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1397 |
1 |
|
|
T24 |
15 |
|
T17 |
7 |
|
T97 |
39 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T24 |
6 |
|
T17 |
4 |
|
T97 |
18 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1415 |
1 |
|
|
T24 |
12 |
|
T17 |
9 |
|
T97 |
42 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T24 |
4 |
|
T17 |
8 |
|
T97 |
17 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1364 |
1 |
|
|
T24 |
14 |
|
T17 |
7 |
|
T97 |
39 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T24 |
6 |
|
T17 |
4 |
|
T97 |
18 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1381 |
1 |
|
|
T24 |
11 |
|
T17 |
9 |
|
T97 |
40 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T24 |
4 |
|
T17 |
8 |
|
T97 |
17 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1322 |
1 |
|
|
T24 |
13 |
|
T17 |
7 |
|
T97 |
37 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T24 |
6 |
|
T17 |
4 |
|
T97 |
18 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1339 |
1 |
|
|
T24 |
10 |
|
T17 |
9 |
|
T97 |
40 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T24 |
4 |
|
T17 |
8 |
|
T97 |
17 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1289 |
1 |
|
|
T24 |
13 |
|
T17 |
7 |
|
T97 |
34 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T24 |
6 |
|
T17 |
4 |
|
T97 |
18 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1307 |
1 |
|
|
T24 |
10 |
|
T17 |
9 |
|
T97 |
40 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T24 |
4 |
|
T17 |
8 |
|
T97 |
17 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1242 |
1 |
|
|
T24 |
13 |
|
T17 |
7 |
|
T97 |
32 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T24 |
6 |
|
T17 |
4 |
|
T97 |
18 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1279 |
1 |
|
|
T24 |
9 |
|
T17 |
9 |
|
T97 |
38 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[0] |
auto[0] |
59948 |
1 |
|
|
T24 |
411 |
|
T17 |
302 |
|
T97 |
1455 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45980 |
1 |
|
|
T24 |
348 |
|
T17 |
250 |
|
T97 |
783 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[1] |
auto[0] |
61109 |
1 |
|
|
T24 |
1580 |
|
T17 |
276 |
|
T97 |
1959 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45610 |
1 |
|
|
T24 |
417 |
|
T17 |
877 |
|
T97 |
1110 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
783 |
1 |
|
|
T24 |
6 |
|
T17 |
5 |
|
T97 |
21 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1755 |
1 |
|
|
T24 |
14 |
|
T17 |
15 |
|
T97 |
45 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
783 |
1 |
|
|
T24 |
2 |
|
T17 |
8 |
|
T97 |
26 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1755 |
1 |
|
|
T24 |
18 |
|
T17 |
12 |
|
T97 |
41 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
783 |
1 |
|
|
T24 |
6 |
|
T17 |
5 |
|
T97 |
21 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1714 |
1 |
|
|
T24 |
14 |
|
T17 |
14 |
|
T97 |
44 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
783 |
1 |
|
|
T24 |
2 |
|
T17 |
8 |
|
T97 |
26 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1729 |
1 |
|
|
T24 |
18 |
|
T17 |
11 |
|
T97 |
41 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
783 |
1 |
|
|
T24 |
6 |
|
T17 |
5 |
|
T97 |
21 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1670 |
1 |
|
|
T24 |
14 |
|
T17 |
14 |
|
T97 |
44 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
780 |
1 |
|
|
T24 |
2 |
|
T17 |
8 |
|
T97 |
25 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1690 |
1 |
|
|
T24 |
17 |
|
T17 |
11 |
|
T97 |
41 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
783 |
1 |
|
|
T24 |
6 |
|
T17 |
5 |
|
T97 |
21 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1624 |
1 |
|
|
T24 |
13 |
|
T17 |
13 |
|
T97 |
42 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
780 |
1 |
|
|
T24 |
2 |
|
T17 |
8 |
|
T97 |
25 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1653 |
1 |
|
|
T24 |
17 |
|
T17 |
11 |
|
T97 |
40 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
781 |
1 |
|
|
T24 |
6 |
|
T17 |
5 |
|
T97 |
21 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1589 |
1 |
|
|
T24 |
13 |
|
T17 |
12 |
|
T97 |
40 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
778 |
1 |
|
|
T24 |
2 |
|
T17 |
8 |
|
T97 |
25 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1623 |
1 |
|
|
T24 |
17 |
|
T17 |
11 |
|
T97 |
40 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
781 |
1 |
|
|
T24 |
6 |
|
T17 |
5 |
|
T97 |
21 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1558 |
1 |
|
|
T24 |
12 |
|
T17 |
12 |
|
T97 |
39 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
778 |
1 |
|
|
T24 |
2 |
|
T17 |
8 |
|
T97 |
25 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1581 |
1 |
|
|
T24 |
16 |
|
T17 |
10 |
|
T97 |
40 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
778 |
1 |
|
|
T24 |
5 |
|
T17 |
5 |
|
T97 |
21 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1525 |
1 |
|
|
T24 |
13 |
|
T17 |
12 |
|
T97 |
38 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
774 |
1 |
|
|
T24 |
2 |
|
T17 |
8 |
|
T97 |
25 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1547 |
1 |
|
|
T24 |
16 |
|
T17 |
9 |
|
T97 |
39 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
778 |
1 |
|
|
T24 |
5 |
|
T17 |
5 |
|
T97 |
21 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1498 |
1 |
|
|
T24 |
13 |
|
T17 |
12 |
|
T97 |
38 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
774 |
1 |
|
|
T24 |
2 |
|
T17 |
8 |
|
T97 |
25 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1513 |
1 |
|
|
T24 |
16 |
|
T17 |
9 |
|
T97 |
38 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
774 |
1 |
|
|
T24 |
5 |
|
T17 |
5 |
|
T97 |
21 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1467 |
1 |
|
|
T24 |
13 |
|
T17 |
12 |
|
T97 |
37 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
768 |
1 |
|
|
T24 |
2 |
|
T17 |
8 |
|
T97 |
25 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1479 |
1 |
|
|
T24 |
16 |
|
T17 |
9 |
|
T97 |
37 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
774 |
1 |
|
|
T24 |
5 |
|
T17 |
5 |
|
T97 |
21 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1430 |
1 |
|
|
T24 |
13 |
|
T17 |
12 |
|
T97 |
36 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
768 |
1 |
|
|
T24 |
2 |
|
T17 |
8 |
|
T97 |
25 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1443 |
1 |
|
|
T24 |
15 |
|
T17 |
9 |
|
T97 |
34 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
772 |
1 |
|
|
T24 |
5 |
|
T17 |
5 |
|
T97 |
21 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1396 |
1 |
|
|
T24 |
12 |
|
T17 |
12 |
|
T97 |
35 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T24 |
2 |
|
T17 |
8 |
|
T97 |
25 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1412 |
1 |
|
|
T24 |
15 |
|
T17 |
9 |
|
T97 |
33 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
772 |
1 |
|
|
T24 |
5 |
|
T17 |
5 |
|
T97 |
21 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1357 |
1 |
|
|
T24 |
12 |
|
T17 |
12 |
|
T97 |
33 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T24 |
2 |
|
T17 |
8 |
|
T97 |
25 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1375 |
1 |
|
|
T24 |
13 |
|
T17 |
8 |
|
T97 |
33 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
772 |
1 |
|
|
T24 |
5 |
|
T17 |
5 |
|
T97 |
21 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1330 |
1 |
|
|
T24 |
12 |
|
T17 |
12 |
|
T97 |
33 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
765 |
1 |
|
|
T24 |
2 |
|
T17 |
8 |
|
T97 |
25 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1340 |
1 |
|
|
T24 |
13 |
|
T17 |
8 |
|
T97 |
33 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
772 |
1 |
|
|
T24 |
5 |
|
T17 |
5 |
|
T97 |
21 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1288 |
1 |
|
|
T24 |
12 |
|
T17 |
11 |
|
T97 |
32 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
765 |
1 |
|
|
T24 |
2 |
|
T17 |
8 |
|
T97 |
25 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1309 |
1 |
|
|
T24 |
13 |
|
T17 |
7 |
|
T97 |
33 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
772 |
1 |
|
|
T24 |
5 |
|
T17 |
5 |
|
T97 |
21 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1263 |
1 |
|
|
T24 |
12 |
|
T17 |
11 |
|
T97 |
30 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
765 |
1 |
|
|
T24 |
2 |
|
T17 |
8 |
|
T97 |
25 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1283 |
1 |
|
|
T24 |
13 |
|
T17 |
7 |
|
T97 |
32 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56107 |
1 |
|
|
T24 |
321 |
|
T17 |
265 |
|
T97 |
1318 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[0] |
auto[1] |
50781 |
1 |
|
|
T24 |
417 |
|
T17 |
1020 |
|
T97 |
1136 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59301 |
1 |
|
|
T24 |
1538 |
|
T17 |
238 |
|
T97 |
2340 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47755 |
1 |
|
|
T24 |
338 |
|
T17 |
222 |
|
T97 |
552 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T24 |
5 |
|
T17 |
3 |
|
T97 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1728 |
1 |
|
|
T24 |
21 |
|
T17 |
16 |
|
T97 |
42 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T24 |
6 |
|
T17 |
5 |
|
T97 |
25 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1716 |
1 |
|
|
T24 |
20 |
|
T17 |
13 |
|
T97 |
40 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T24 |
5 |
|
T17 |
3 |
|
T97 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1698 |
1 |
|
|
T24 |
20 |
|
T17 |
16 |
|
T97 |
42 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T24 |
6 |
|
T17 |
5 |
|
T97 |
25 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1681 |
1 |
|
|
T24 |
20 |
|
T17 |
13 |
|
T97 |
39 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T24 |
5 |
|
T17 |
3 |
|
T97 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1660 |
1 |
|
|
T24 |
19 |
|
T17 |
16 |
|
T97 |
42 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T24 |
6 |
|
T17 |
5 |
|
T97 |
25 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1654 |
1 |
|
|
T24 |
20 |
|
T17 |
13 |
|
T97 |
39 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T24 |
5 |
|
T17 |
3 |
|
T97 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1630 |
1 |
|
|
T24 |
19 |
|
T17 |
16 |
|
T97 |
42 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T24 |
6 |
|
T17 |
5 |
|
T97 |
25 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1620 |
1 |
|
|
T24 |
20 |
|
T17 |
11 |
|
T97 |
36 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T24 |
5 |
|
T17 |
3 |
|
T97 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1598 |
1 |
|
|
T24 |
19 |
|
T17 |
15 |
|
T97 |
40 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T24 |
6 |
|
T17 |
5 |
|
T97 |
25 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1589 |
1 |
|
|
T24 |
19 |
|
T17 |
11 |
|
T97 |
36 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T24 |
5 |
|
T17 |
3 |
|
T97 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1557 |
1 |
|
|
T24 |
19 |
|
T17 |
15 |
|
T97 |
40 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T24 |
6 |
|
T17 |
5 |
|
T97 |
25 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1566 |
1 |
|
|
T24 |
19 |
|
T17 |
10 |
|
T97 |
35 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T24 |
4 |
|
T17 |
3 |
|
T97 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1521 |
1 |
|
|
T24 |
19 |
|
T17 |
15 |
|
T97 |
40 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T24 |
6 |
|
T17 |
5 |
|
T97 |
24 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1536 |
1 |
|
|
T24 |
16 |
|
T17 |
10 |
|
T97 |
35 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T24 |
4 |
|
T17 |
3 |
|
T97 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1486 |
1 |
|
|
T24 |
19 |
|
T17 |
15 |
|
T97 |
40 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T24 |
6 |
|
T17 |
5 |
|
T97 |
24 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1504 |
1 |
|
|
T24 |
15 |
|
T17 |
10 |
|
T97 |
34 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T24 |
4 |
|
T17 |
3 |
|
T97 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1448 |
1 |
|
|
T24 |
18 |
|
T17 |
15 |
|
T97 |
39 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T24 |
6 |
|
T17 |
5 |
|
T97 |
24 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1476 |
1 |
|
|
T24 |
14 |
|
T17 |
9 |
|
T97 |
30 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T24 |
4 |
|
T17 |
3 |
|
T97 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1416 |
1 |
|
|
T24 |
18 |
|
T17 |
13 |
|
T97 |
39 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T24 |
6 |
|
T17 |
5 |
|
T97 |
24 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1437 |
1 |
|
|
T24 |
14 |
|
T17 |
9 |
|
T97 |
30 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T24 |
4 |
|
T17 |
3 |
|
T97 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1395 |
1 |
|
|
T24 |
18 |
|
T17 |
13 |
|
T97 |
39 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T24 |
6 |
|
T17 |
5 |
|
T97 |
24 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1402 |
1 |
|
|
T24 |
14 |
|
T17 |
9 |
|
T97 |
30 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T24 |
4 |
|
T17 |
3 |
|
T97 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1354 |
1 |
|
|
T24 |
18 |
|
T17 |
12 |
|
T97 |
39 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T24 |
6 |
|
T17 |
5 |
|
T97 |
24 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1364 |
1 |
|
|
T24 |
14 |
|
T17 |
9 |
|
T97 |
26 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T24 |
4 |
|
T17 |
3 |
|
T97 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1323 |
1 |
|
|
T24 |
18 |
|
T17 |
11 |
|
T97 |
38 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T24 |
6 |
|
T17 |
5 |
|
T97 |
24 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1325 |
1 |
|
|
T24 |
14 |
|
T17 |
9 |
|
T97 |
25 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T24 |
4 |
|
T17 |
3 |
|
T97 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1288 |
1 |
|
|
T24 |
17 |
|
T17 |
10 |
|
T97 |
38 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T24 |
6 |
|
T17 |
5 |
|
T97 |
24 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1291 |
1 |
|
|
T24 |
13 |
|
T17 |
9 |
|
T97 |
23 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T24 |
4 |
|
T17 |
3 |
|
T97 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1254 |
1 |
|
|
T24 |
17 |
|
T17 |
10 |
|
T97 |
37 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T24 |
6 |
|
T17 |
5 |
|
T97 |
24 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1258 |
1 |
|
|
T24 |
11 |
|
T17 |
9 |
|
T97 |
23 |