Unified Coverage Report :: Group :: gpio_env_pkg::gpio_env_cov::gpio_pins_data_in_cross_cg

Group : gpio_env_pkg::gpio_env_cov::gpio_pins_data_in_cross_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_gpio_env_0.1/gpio_env_cov.sv

---

Summary for Group gpio_env_pkg::gpio_env_cov::gpio_pins_data_in_cross_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	36	0	36	100.00
Crosses	128	0	128	100.00

Variables for Group gpio_env_pkg::gpio_env_cov::gpio_pins_data_in_cross_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_pin	32	0	32	100.00	100	1	1	0
data_in	2	0	2	100.00	100	1	1	2
gpio_value	2	0	2	100.00	100	1	1	2

Crosses for Group gpio_env_pkg::gpio_env_cov::gpio_pins_data_in_cross_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
cp_cross_pins_data_in	128	0	128	100.00	100	1	1	0

Summary for Variable cp_pin

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	32	0	32	100.00

User Defined Bins for cp_pin

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
bins_for_gpio_bits[0]	16666584	1			T20	316255		T21	580736		T22	225
bins_for_gpio_bits[1]	16666584	1			T20	316255		T21	580736		T22	225
bins_for_gpio_bits[2]	16666584	1			T20	316255		T21	580736		T22	225
bins_for_gpio_bits[3]	16666584	1			T20	316255		T21	580736		T22	225
bins_for_gpio_bits[4]	16666584	1			T20	316255		T21	580736		T22	225
bins_for_gpio_bits[5]	16666584	1			T20	316255		T21	580736		T22	225
bins_for_gpio_bits[6]	16666584	1			T20	316255		T21	580736		T22	225
bins_for_gpio_bits[7]	16666584	1			T20	316255		T21	580736		T22	225
bins_for_gpio_bits[8]	16666584	1			T20	316255		T21	580736		T22	225
bins_for_gpio_bits[9]	16666584	1			T20	316255		T21	580736		T22	225
bins_for_gpio_bits[10]	16666584	1			T20	316255		T21	580736		T22	225
bins_for_gpio_bits[11]	16666584	1			T20	316255		T21	580736		T22	225
bins_for_gpio_bits[12]	16666584	1			T20	316255		T21	580736		T22	225
bins_for_gpio_bits[13]	16666584	1			T20	316255		T21	580736		T22	225
bins_for_gpio_bits[14]	16666584	1			T20	316255		T21	580736		T22	225
bins_for_gpio_bits[15]	16666584	1			T20	316255		T21	580736		T22	225
bins_for_gpio_bits[16]	16666584	1			T20	316255		T21	580736		T22	225
bins_for_gpio_bits[17]	16666584	1			T20	316255		T21	580736		T22	225
bins_for_gpio_bits[18]	16666584	1			T20	316255		T21	580736		T22	225
bins_for_gpio_bits[19]	16666584	1			T20	316255		T21	580736		T22	225
bins_for_gpio_bits[20]	16666584	1			T20	316255		T21	580736		T22	225
bins_for_gpio_bits[21]	16666584	1			T20	316255		T21	580736		T22	225
bins_for_gpio_bits[22]	16666584	1			T20	316255		T21	580736		T22	225
bins_for_gpio_bits[23]	16666584	1			T20	316255		T21	580736		T22	225
bins_for_gpio_bits[24]	16666584	1			T20	316255		T21	580736		T22	225
bins_for_gpio_bits[25]	16666584	1			T20	316255		T21	580736		T22	225
bins_for_gpio_bits[26]	16666584	1			T20	316255		T21	580736		T22	225
bins_for_gpio_bits[27]	16666584	1			T20	316255		T21	580736		T22	225
bins_for_gpio_bits[28]	16666584	1			T20	316255		T21	580736		T22	225
bins_for_gpio_bits[29]	16666584	1			T20	316255		T21	580736		T22	225
bins_for_gpio_bits[30]	16666584	1			T20	316255		T21	580736		T22	225
bins_for_gpio_bits[31]	16666584	1			T20	316255		T21	580736		T22	225

---

Summary for Variable data_in

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for data_in

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

324393815

1

T20

674400

T21

120774

T22

3488

auto[1]

208936873

1

T20

337615

T21

650607

T22

3712

---

Summary for Variable gpio_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for gpio_value

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

324385471

1

T20

674399

T21

120774

T22

3486

auto[1]

208945217

1

T20

337616

T21

650612

T22

3714

---

Summary for Cross cp_cross_pins_data_in

Samples crossed: cp_pin gpio_value data_in

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	128	0	128	100.00

Automatically Generated Cross Bins for cp_cross_pins_data_in

Bins

cp_pin	gpio_value	data_in	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
bins_for_gpio_bits[0]	auto[0]	auto[0]	9832031	1			T20	203852		T21	366340		T22	110
bins_for_gpio_bits[0]	auto[0]	auto[1]	299079	1			T20	6732		T21	11224		T22	1
bins_for_gpio_bits[0]	auto[1]	auto[0]	299319	1			T20	6732		T21	11225		T22	1
bins_for_gpio_bits[0]	auto[1]	auto[1]	6236155	1			T20	98939		T21	191947		T22	113
bins_for_gpio_bits[1]	auto[0]	auto[0]	9819724	1			T20	203644		T21	366400		T22	77
bins_for_gpio_bits[1]	auto[0]	auto[1]	299825	1			T20	6654		T21	11204		T23	1105
bins_for_gpio_bits[1]	auto[1]	auto[0]	300119	1			T20	6654		T21	11205		T22	1
bins_for_gpio_bits[1]	auto[1]	auto[1]	6246916	1			T20	99303		T21	191927		T22	147
bins_for_gpio_bits[2]	auto[0]	auto[0]	9821511	1			T20	203541		T21	366389		T22	107
bins_for_gpio_bits[2]	auto[0]	auto[1]	299867	1			T20	6749		T21	11049		T23	1126
bins_for_gpio_bits[2]	auto[1]	auto[0]	300152	1			T20	6749		T21	11050		T23	1123
bins_for_gpio_bits[2]	auto[1]	auto[1]	6245054	1			T20	99216		T21	192248		T22	118
bins_for_gpio_bits[3]	auto[0]	auto[0]	9834628	1			T20	204668		T21	366028		T22	95
bins_for_gpio_bits[3]	auto[0]	auto[1]	299944	1			T20	6631		T21	11195		T23	1118
bins_for_gpio_bits[3]	auto[1]	auto[0]	300224	1			T20	6631		T21	11197		T23	1116
bins_for_gpio_bits[3]	auto[1]	auto[1]	6231788	1			T20	98325		T21	192316		T22	130
bins_for_gpio_bits[4]	auto[0]	auto[0]	9840446	1			T20	204349		T21	366355		T22	99
bins_for_gpio_bits[4]	auto[0]	auto[1]	299814	1			T20	6682		T21	11083		T23	1092
bins_for_gpio_bits[4]	auto[1]	auto[0]	300044	1			T20	6683		T21	11086		T23	1088
bins_for_gpio_bits[4]	auto[1]	auto[1]	6226280	1			T20	98541		T21	192212		T22	126
bins_for_gpio_bits[5]	auto[0]	auto[0]	9830463	1			T20	203876		T21	367378		T22	99
bins_for_gpio_bits[5]	auto[0]	auto[1]	300338	1			T20	6700		T21	11212		T23	1163
bins_for_gpio_bits[5]	auto[1]	auto[0]	300614	1			T20	6701		T21	11213		T23	1159
bins_for_gpio_bits[5]	auto[1]	auto[1]	6235169	1			T20	98978		T21	190933		T22	126
bins_for_gpio_bits[6]	auto[0]	auto[0]	9830254	1			T20	204099		T21	366403		T22	160
bins_for_gpio_bits[6]	auto[0]	auto[1]	299796	1			T20	6653		T21	11179		T23	1104
bins_for_gpio_bits[6]	auto[1]	auto[0]	300067	1			T20	6653		T21	11181		T23	1101
bins_for_gpio_bits[6]	auto[1]	auto[1]	6236467	1			T20	98850		T21	191973		T22	65
bins_for_gpio_bits[7]	auto[0]	auto[0]	9836442	1			T20	203746		T21	366304		T22	121
bins_for_gpio_bits[7]	auto[0]	auto[1]	299832	1			T20	6694		T21	11144		T23	1091
bins_for_gpio_bits[7]	auto[1]	auto[0]	300098	1			T20	6694		T21	11147		T23	1086
bins_for_gpio_bits[7]	auto[1]	auto[1]	6230212	1			T20	99121		T21	192141		T22	104
bins_for_gpio_bits[8]	auto[0]	auto[0]	9821441	1			T20	204325		T21	367092		T22	123
bins_for_gpio_bits[8]	auto[0]	auto[1]	299730	1			T20	6594		T21	10993		T23	1114
bins_for_gpio_bits[8]	auto[1]	auto[0]	300007	1			T20	6594		T21	10993		T23	1109
bins_for_gpio_bits[8]	auto[1]	auto[1]	6245406	1			T20	98742		T21	191658		T22	102
bins_for_gpio_bits[9]	auto[0]	auto[0]	9832463	1			T20	205201		T21	365240		T22	112
bins_for_gpio_bits[9]	auto[0]	auto[1]	299763	1			T20	6621		T21	11303		T23	1135
bins_for_gpio_bits[9]	auto[1]	auto[0]	300034	1			T20	6621		T21	11305		T23	1132
bins_for_gpio_bits[9]	auto[1]	auto[1]	6234324	1			T20	97812		T21	192888		T22	113
bins_for_gpio_bits[10]	auto[0]	auto[0]	9841573	1			T20	204587		T21	366212		T22	112
bins_for_gpio_bits[10]	auto[0]	auto[1]	299404	1			T20	6593		T21	11203		T23	1145
bins_for_gpio_bits[10]	auto[1]	auto[0]	299644	1			T20	6594		T21	11204		T23	1138
bins_for_gpio_bits[10]	auto[1]	auto[1]	6225963	1			T20	98481		T21	192117		T22	113
bins_for_gpio_bits[11]	auto[0]	auto[0]	9833453	1			T20	202786		T21	365229		T22	111
bins_for_gpio_bits[11]	auto[0]	auto[1]	298954	1			T20	6745		T21	11278		T23	1153
bins_for_gpio_bits[11]	auto[1]	auto[0]	299184	1			T20	6745		T21	11280		T23	1150
bins_for_gpio_bits[11]	auto[1]	auto[1]	6234993	1			T20	99979		T21	192949		T22	114
bins_for_gpio_bits[12]	auto[0]	auto[0]	9837027	1			T20	204039		T21	366316		T22	108
bins_for_gpio_bits[12]	auto[0]	auto[1]	298903	1			T20	6591		T21	11105		T23	1077
bins_for_gpio_bits[12]	auto[1]	auto[0]	299165	1			T20	6591		T21	11108		T23	1073
bins_for_gpio_bits[12]	auto[1]	auto[1]	6231489	1			T20	99034		T21	192207		T22	117
bins_for_gpio_bits[13]	auto[0]	auto[0]	9846174	1			T20	204101		T21	365990		T22	99
bins_for_gpio_bits[13]	auto[0]	auto[1]	299593	1			T20	6727		T21	11274		T22	2
bins_for_gpio_bits[13]	auto[1]	auto[0]	299801	1			T20	6727		T21	11275		T22	1
bins_for_gpio_bits[13]	auto[1]	auto[1]	6221016	1			T20	98700		T21	192197		T22	123
bins_for_gpio_bits[14]	auto[0]	auto[0]	9834733	1			T20	203097		T21	365971		T22	108
bins_for_gpio_bits[14]	auto[0]	auto[1]	299245	1			T20	6729		T21	11204		T23	1127
bins_for_gpio_bits[14]	auto[1]	auto[0]	299512	1			T20	6729		T21	11206		T23	1124
bins_for_gpio_bits[14]	auto[1]	auto[1]	6233094	1			T20	99700		T21	192355		T22	117
bins_for_gpio_bits[15]	auto[0]	auto[0]	9832726	1			T20	203402		T21	365658		T22	112
bins_for_gpio_bits[15]	auto[0]	auto[1]	299472	1			T20	6720		T21	11311		T23	1107
bins_for_gpio_bits[15]	auto[1]	auto[0]	299748	1			T20	6721		T21	11312		T23	1104
bins_for_gpio_bits[15]	auto[1]	auto[1]	6234638	1			T20	99412		T21	192455		T22	113
bins_for_gpio_bits[16]	auto[0]	auto[0]	9839467	1			T20	203978		T21	365287		T22	109
bins_for_gpio_bits[16]	auto[0]	auto[1]	299096	1			T20	6587		T21	11252		T23	1147
bins_for_gpio_bits[16]	auto[1]	auto[0]	299335	1			T20	6587		T21	11252		T23	1142
bins_for_gpio_bits[16]	auto[1]	auto[1]	6228686	1			T20	99103		T21	192945		T22	116
bins_for_gpio_bits[17]	auto[0]	auto[0]	9854454	1			T20	204435		T21	366518		T22	117
bins_for_gpio_bits[17]	auto[0]	auto[1]	299145	1			T20	6703		T21	11204		T23	1101
bins_for_gpio_bits[17]	auto[1]	auto[0]	299428	1			T20	6703		T21	11205		T23	1097
bins_for_gpio_bits[17]	auto[1]	auto[1]	6213557	1			T20	98414		T21	191809		T22	108
bins_for_gpio_bits[18]	auto[0]	auto[0]	9853644	1			T20	204486		T21	365739		T22	163
bins_for_gpio_bits[18]	auto[0]	auto[1]	299028	1			T20	6618		T21	11215		T23	1084
bins_for_gpio_bits[18]	auto[1]	auto[0]	299292	1			T20	6618		T21	11218		T22	1
bins_for_gpio_bits[18]	auto[1]	auto[1]	6214620	1			T20	98533		T21	192564		T22	61
bins_for_gpio_bits[19]	auto[0]	auto[0]	9842283	1			T20	203712		T21	366839		T22	59
bins_for_gpio_bits[19]	auto[0]	auto[1]	299423	1			T20	6618		T21	11191		T23	1158
bins_for_gpio_bits[19]	auto[1]	auto[0]	299692	1			T20	6618		T21	11192		T23	1155
bins_for_gpio_bits[19]	auto[1]	auto[1]	6225186	1			T20	99307		T21	191514		T22	166
bins_for_gpio_bits[20]	auto[0]	auto[0]	9856930	1			T20	204368		T21	368209		T22	115
bins_for_gpio_bits[20]	auto[0]	auto[1]	298921	1			T20	6609		T21	11068		T23	1144
bins_for_gpio_bits[20]	auto[1]	auto[0]	299191	1			T20	6610		T21	11070		T23	1139
bins_for_gpio_bits[20]	auto[1]	auto[1]	6211542	1			T20	98668		T21	190389		T22	110
bins_for_gpio_bits[21]	auto[0]	auto[0]	9838598	1			T20	204823		T21	366413		T22	151
bins_for_gpio_bits[21]	auto[0]	auto[1]	299288	1			T20	6596		T21	11090		T23	1168
bins_for_gpio_bits[21]	auto[1]	auto[0]	299515	1			T20	6597		T21	11091		T23	1164
bins_for_gpio_bits[21]	auto[1]	auto[1]	6229183	1			T20	98239		T21	192142		T22	74
bins_for_gpio_bits[22]	auto[0]	auto[0]	9836522	1			T20	203736		T21	366197		T22	98
bins_for_gpio_bits[22]	auto[0]	auto[1]	299252	1			T20	6729		T21	11111		T23	1127
bins_for_gpio_bits[22]	auto[1]	auto[0]	299525	1			T20	6730		T21	11113		T23	1123
bins_for_gpio_bits[22]	auto[1]	auto[1]	6231285	1			T20	99060		T21	192315		T22	127
bins_for_gpio_bits[23]	auto[0]	auto[0]	9844472	1			T20	205212		T21	367920		T22	144
bins_for_gpio_bits[23]	auto[0]	auto[1]	299226	1			T20	6626		T21	11083		T23	1170
bins_for_gpio_bits[23]	auto[1]	auto[0]	299496	1			T20	6627		T21	11084		T23	1166
bins_for_gpio_bits[23]	auto[1]	auto[1]	6223390	1			T20	97790		T21	190649		T22	81
bins_for_gpio_bits[24]	auto[0]	auto[0]	9837488	1			T20	203514		T21	366154		T22	80
bins_for_gpio_bits[24]	auto[0]	auto[1]	298745	1			T20	6709		T21	11155		T23	1092
bins_for_gpio_bits[24]	auto[1]	auto[0]	298989	1			T20	6709		T21	11156		T23	1089
bins_for_gpio_bits[24]	auto[1]	auto[1]	6231362	1			T20	99323		T21	192271		T22	145
bins_for_gpio_bits[25]	auto[0]	auto[0]	9845568	1			T20	203595		T21	365781		T22	80
bins_for_gpio_bits[25]	auto[0]	auto[1]	299093	1			T20	6748		T21	11248		T23	1162
bins_for_gpio_bits[25]	auto[1]	auto[0]	299339	1			T20	6748		T21	11249		T23	1160
bins_for_gpio_bits[25]	auto[1]	auto[1]	6222584	1			T20	99164		T21	192458		T22	145
bins_for_gpio_bits[26]	auto[0]	auto[0]	9849860	1			T20	204375		T21	366856		T22	112
bins_for_gpio_bits[26]	auto[0]	auto[1]	299448	1			T20	6577		T21	11138		T23	1136
bins_for_gpio_bits[26]	auto[1]	auto[0]	299725	1			T20	6577		T21	11139		T22	1
bins_for_gpio_bits[26]	auto[1]	auto[1]	6217551	1			T20	98726		T21	191603		T22	112
bins_for_gpio_bits[27]	auto[0]	auto[0]	9836796	1			T20	205137		T21	365623		T22	145
bins_for_gpio_bits[27]	auto[0]	auto[1]	299481	1			T20	6564		T21	11077		T23	1109
bins_for_gpio_bits[27]	auto[1]	auto[0]	299762	1			T20	6565		T21	11078		T23	1103
bins_for_gpio_bits[27]	auto[1]	auto[1]	6230545	1			T20	97989		T21	192958		T22	80
bins_for_gpio_bits[28]	auto[0]	auto[0]	9829353	1			T20	203792		T21	366072		T22	63
bins_for_gpio_bits[28]	auto[0]	auto[1]	299352	1			T20	6754		T21	11283		T23	1120
bins_for_gpio_bits[28]	auto[1]	auto[0]	299642	1			T20	6754		T21	11284		T23	1117
bins_for_gpio_bits[28]	auto[1]	auto[1]	6238237	1			T20	98955		T21	192097		T22	162
bins_for_gpio_bits[29]	auto[0]	auto[0]	9848423	1			T20	204102		T21	364748		T22	80
bins_for_gpio_bits[29]	auto[0]	auto[1]	299892	1			T20	6652		T21	11353		T23	1164
bins_for_gpio_bits[29]	auto[1]	auto[0]	300126	1			T20	6652		T21	11355		T23	1160
bins_for_gpio_bits[29]	auto[1]	auto[1]	6218143	1			T20	98849		T21	193280		T22	145
bins_for_gpio_bits[30]	auto[0]	auto[0]	9831700	1			T20	203487		T21	365846		T22	131
bins_for_gpio_bits[30]	auto[0]	auto[1]	299834	1			T20	6790		T21	11269		T23	1091
bins_for_gpio_bits[30]	auto[1]	auto[0]	300066	1			T20	6791		T21	11270		T23	1085
bins_for_gpio_bits[30]	auto[1]	auto[1]	6234984	1			T20	99187		T21	192351		T22	94
bins_for_gpio_bits[31]	auto[0]	auto[0]	9831837	1			T20	204667		T21	365921		T22	83
bins_for_gpio_bits[31]	auto[0]	auto[1]	300204	1			T20	6572		T21	11301		T23	1118
bins_for_gpio_bits[31]	auto[1]	auto[0]	300476	1			T20	6572		T21	11302		T23	1111
bins_for_gpio_bits[31]	auto[1]	auto[1]	6234067	1			T20	98444		T21	192212		T22	142