Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
9663970 |
1 |
|
|
T20 |
159127 |
|
T21 |
296109 |
|
T22 |
90 |
| auto[1] |
7254812 |
1 |
|
|
T20 |
161904 |
|
T21 |
296914 |
|
T22 |
44 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
13988651 |
1 |
|
|
T20 |
264209 |
|
T21 |
477522 |
|
T22 |
127 |
| auto[1] |
2930131 |
1 |
|
|
T20 |
56822 |
|
T21 |
115501 |
|
T22 |
7 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
9683018 |
1 |
|
|
T20 |
166663 |
|
T21 |
296728 |
|
T22 |
98 |
| auto[1] |
7235764 |
1 |
|
|
T20 |
154368 |
|
T21 |
296295 |
|
T22 |
36 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
2171530 |
1 |
|
|
T20 |
47876 |
|
T21 |
93078 |
|
T22 |
17 |
| auto[1] |
auto[0] |
auto[1] |
1472668 |
1 |
|
|
T20 |
27874 |
|
T21 |
57912 |
|
T23 |
7034 |
| auto[1] |
auto[1] |
auto[0] |
2134103 |
1 |
|
|
T20 |
49670 |
|
T21 |
87716 |
|
T22 |
12 |
| auto[1] |
auto[1] |
auto[1] |
1457463 |
1 |
|
|
T20 |
28948 |
|
T21 |
57589 |
|
T22 |
7 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |