cp_pins | cp_stable_cycles | cp_pin_value | cp_filter_en | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[0] |
auto[0] |
52380 |
1 |
|
|
T38 |
1143 |
|
T98 |
1841 |
|
T99 |
780 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[0] |
auto[1] |
40924 |
1 |
|
|
T38 |
568 |
|
T98 |
1841 |
|
T99 |
503 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56141 |
1 |
|
|
T38 |
2144 |
|
T98 |
1525 |
|
T99 |
1819 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[1] |
auto[1] |
42389 |
1 |
|
|
T38 |
823 |
|
T98 |
988 |
|
T99 |
345 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
692 |
1 |
|
|
T38 |
25 |
|
T98 |
22 |
|
T99 |
12 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1464 |
1 |
|
|
T38 |
34 |
|
T98 |
46 |
|
T99 |
20 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
662 |
1 |
|
|
T38 |
19 |
|
T98 |
27 |
|
T99 |
12 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1491 |
1 |
|
|
T38 |
40 |
|
T98 |
41 |
|
T99 |
20 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
692 |
1 |
|
|
T38 |
25 |
|
T98 |
22 |
|
T99 |
12 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1429 |
1 |
|
|
T38 |
34 |
|
T98 |
45 |
|
T99 |
19 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
662 |
1 |
|
|
T38 |
19 |
|
T98 |
27 |
|
T99 |
12 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1466 |
1 |
|
|
T38 |
37 |
|
T98 |
39 |
|
T99 |
20 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T38 |
24 |
|
T98 |
22 |
|
T99 |
12 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1398 |
1 |
|
|
T38 |
35 |
|
T98 |
43 |
|
T99 |
18 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
661 |
1 |
|
|
T38 |
19 |
|
T98 |
27 |
|
T99 |
12 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1442 |
1 |
|
|
T38 |
36 |
|
T98 |
39 |
|
T99 |
19 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T38 |
24 |
|
T98 |
22 |
|
T99 |
12 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1358 |
1 |
|
|
T38 |
35 |
|
T98 |
42 |
|
T99 |
18 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
661 |
1 |
|
|
T38 |
19 |
|
T98 |
27 |
|
T99 |
12 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1419 |
1 |
|
|
T38 |
36 |
|
T98 |
39 |
|
T99 |
19 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
685 |
1 |
|
|
T38 |
24 |
|
T98 |
22 |
|
T99 |
12 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1333 |
1 |
|
|
T38 |
33 |
|
T98 |
42 |
|
T99 |
18 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
658 |
1 |
|
|
T38 |
19 |
|
T98 |
27 |
|
T99 |
12 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1390 |
1 |
|
|
T38 |
33 |
|
T98 |
39 |
|
T99 |
19 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
685 |
1 |
|
|
T38 |
24 |
|
T98 |
22 |
|
T99 |
12 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1312 |
1 |
|
|
T38 |
32 |
|
T98 |
42 |
|
T99 |
18 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
658 |
1 |
|
|
T38 |
19 |
|
T98 |
27 |
|
T99 |
12 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1366 |
1 |
|
|
T38 |
33 |
|
T98 |
38 |
|
T99 |
19 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T38 |
24 |
|
T98 |
22 |
|
T99 |
12 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1278 |
1 |
|
|
T38 |
30 |
|
T98 |
39 |
|
T99 |
16 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
654 |
1 |
|
|
T38 |
19 |
|
T98 |
27 |
|
T99 |
12 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1341 |
1 |
|
|
T38 |
33 |
|
T98 |
38 |
|
T99 |
19 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T38 |
24 |
|
T98 |
22 |
|
T99 |
12 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1249 |
1 |
|
|
T38 |
30 |
|
T98 |
38 |
|
T99 |
15 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
654 |
1 |
|
|
T38 |
19 |
|
T98 |
27 |
|
T99 |
12 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1316 |
1 |
|
|
T38 |
32 |
|
T98 |
38 |
|
T99 |
19 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
675 |
1 |
|
|
T38 |
24 |
|
T98 |
22 |
|
T99 |
11 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1214 |
1 |
|
|
T38 |
29 |
|
T98 |
37 |
|
T99 |
15 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
649 |
1 |
|
|
T38 |
19 |
|
T98 |
26 |
|
T99 |
12 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1283 |
1 |
|
|
T38 |
32 |
|
T98 |
38 |
|
T99 |
18 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
675 |
1 |
|
|
T38 |
24 |
|
T98 |
22 |
|
T99 |
11 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1181 |
1 |
|
|
T38 |
26 |
|
T98 |
35 |
|
T99 |
15 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
649 |
1 |
|
|
T38 |
19 |
|
T98 |
26 |
|
T99 |
12 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1252 |
1 |
|
|
T38 |
32 |
|
T98 |
37 |
|
T99 |
18 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
671 |
1 |
|
|
T38 |
24 |
|
T98 |
22 |
|
T99 |
11 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1157 |
1 |
|
|
T38 |
26 |
|
T98 |
35 |
|
T99 |
15 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
649 |
1 |
|
|
T38 |
19 |
|
T98 |
26 |
|
T99 |
12 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1227 |
1 |
|
|
T38 |
32 |
|
T98 |
36 |
|
T99 |
17 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
671 |
1 |
|
|
T38 |
24 |
|
T98 |
22 |
|
T99 |
11 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1127 |
1 |
|
|
T38 |
25 |
|
T98 |
34 |
|
T99 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
649 |
1 |
|
|
T38 |
19 |
|
T98 |
26 |
|
T99 |
12 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1204 |
1 |
|
|
T38 |
31 |
|
T98 |
36 |
|
T99 |
17 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
671 |
1 |
|
|
T38 |
24 |
|
T98 |
22 |
|
T99 |
11 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1098 |
1 |
|
|
T38 |
23 |
|
T98 |
33 |
|
T99 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
649 |
1 |
|
|
T38 |
19 |
|
T98 |
26 |
|
T99 |
12 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1169 |
1 |
|
|
T38 |
31 |
|
T98 |
36 |
|
T99 |
17 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
671 |
1 |
|
|
T38 |
24 |
|
T98 |
22 |
|
T99 |
11 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1078 |
1 |
|
|
T38 |
23 |
|
T98 |
33 |
|
T99 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
649 |
1 |
|
|
T38 |
19 |
|
T98 |
26 |
|
T99 |
12 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1143 |
1 |
|
|
T38 |
31 |
|
T98 |
32 |
|
T99 |
16 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
671 |
1 |
|
|
T38 |
24 |
|
T98 |
22 |
|
T99 |
11 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1048 |
1 |
|
|
T38 |
20 |
|
T98 |
29 |
|
T99 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
649 |
1 |
|
|
T38 |
19 |
|
T98 |
26 |
|
T99 |
12 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1119 |
1 |
|
|
T38 |
31 |
|
T98 |
30 |
|
T99 |
15 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[0] |
auto[0] |
53234 |
1 |
|
|
T38 |
1034 |
|
T98 |
2441 |
|
T99 |
569 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45639 |
1 |
|
|
T38 |
2011 |
|
T98 |
1354 |
|
T99 |
431 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[1] |
auto[0] |
51323 |
1 |
|
|
T38 |
767 |
|
T98 |
1083 |
|
T99 |
894 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[1] |
auto[1] |
41566 |
1 |
|
|
T38 |
973 |
|
T98 |
1084 |
|
T99 |
1397 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
662 |
1 |
|
|
T38 |
18 |
|
T98 |
14 |
|
T99 |
15 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1498 |
1 |
|
|
T38 |
38 |
|
T98 |
64 |
|
T99 |
22 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
657 |
1 |
|
|
T38 |
16 |
|
T98 |
18 |
|
T99 |
13 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1496 |
1 |
|
|
T38 |
39 |
|
T98 |
60 |
|
T99 |
24 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
662 |
1 |
|
|
T38 |
18 |
|
T98 |
14 |
|
T99 |
15 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1475 |
1 |
|
|
T38 |
37 |
|
T98 |
64 |
|
T99 |
22 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
657 |
1 |
|
|
T38 |
16 |
|
T98 |
18 |
|
T99 |
13 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1464 |
1 |
|
|
T38 |
36 |
|
T98 |
59 |
|
T99 |
24 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
660 |
1 |
|
|
T38 |
17 |
|
T98 |
14 |
|
T99 |
15 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1440 |
1 |
|
|
T38 |
38 |
|
T98 |
63 |
|
T99 |
22 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
655 |
1 |
|
|
T38 |
16 |
|
T98 |
18 |
|
T99 |
13 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1435 |
1 |
|
|
T38 |
36 |
|
T98 |
59 |
|
T99 |
24 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
660 |
1 |
|
|
T38 |
17 |
|
T98 |
14 |
|
T99 |
15 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1413 |
1 |
|
|
T38 |
38 |
|
T98 |
61 |
|
T99 |
22 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
655 |
1 |
|
|
T38 |
16 |
|
T98 |
18 |
|
T99 |
13 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1405 |
1 |
|
|
T38 |
36 |
|
T98 |
59 |
|
T99 |
23 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
653 |
1 |
|
|
T38 |
17 |
|
T98 |
14 |
|
T99 |
14 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1389 |
1 |
|
|
T38 |
37 |
|
T98 |
61 |
|
T99 |
23 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
652 |
1 |
|
|
T38 |
16 |
|
T98 |
18 |
|
T99 |
13 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1386 |
1 |
|
|
T38 |
35 |
|
T98 |
58 |
|
T99 |
23 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
653 |
1 |
|
|
T38 |
17 |
|
T98 |
14 |
|
T99 |
14 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1361 |
1 |
|
|
T38 |
34 |
|
T98 |
60 |
|
T99 |
21 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
652 |
1 |
|
|
T38 |
16 |
|
T98 |
18 |
|
T99 |
13 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1361 |
1 |
|
|
T38 |
35 |
|
T98 |
54 |
|
T99 |
23 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
649 |
1 |
|
|
T38 |
17 |
|
T98 |
14 |
|
T99 |
14 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1329 |
1 |
|
|
T38 |
32 |
|
T98 |
58 |
|
T99 |
21 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
650 |
1 |
|
|
T38 |
16 |
|
T98 |
18 |
|
T99 |
13 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1325 |
1 |
|
|
T38 |
34 |
|
T98 |
52 |
|
T99 |
23 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
649 |
1 |
|
|
T38 |
17 |
|
T98 |
14 |
|
T99 |
14 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1301 |
1 |
|
|
T38 |
29 |
|
T98 |
58 |
|
T99 |
20 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
650 |
1 |
|
|
T38 |
16 |
|
T98 |
18 |
|
T99 |
13 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1287 |
1 |
|
|
T38 |
33 |
|
T98 |
48 |
|
T99 |
22 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
645 |
1 |
|
|
T38 |
17 |
|
T98 |
14 |
|
T99 |
14 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1277 |
1 |
|
|
T38 |
29 |
|
T98 |
57 |
|
T99 |
19 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
648 |
1 |
|
|
T38 |
16 |
|
T98 |
18 |
|
T99 |
13 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1258 |
1 |
|
|
T38 |
32 |
|
T98 |
46 |
|
T99 |
21 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
645 |
1 |
|
|
T38 |
17 |
|
T98 |
14 |
|
T99 |
14 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1257 |
1 |
|
|
T38 |
29 |
|
T98 |
57 |
|
T99 |
19 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
648 |
1 |
|
|
T38 |
16 |
|
T98 |
18 |
|
T99 |
13 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1230 |
1 |
|
|
T38 |
31 |
|
T98 |
46 |
|
T99 |
21 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
643 |
1 |
|
|
T38 |
17 |
|
T98 |
14 |
|
T99 |
14 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1237 |
1 |
|
|
T38 |
29 |
|
T98 |
55 |
|
T99 |
18 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
647 |
1 |
|
|
T38 |
16 |
|
T98 |
18 |
|
T99 |
13 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1199 |
1 |
|
|
T38 |
31 |
|
T98 |
44 |
|
T99 |
19 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
643 |
1 |
|
|
T38 |
17 |
|
T98 |
14 |
|
T99 |
14 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1206 |
1 |
|
|
T38 |
29 |
|
T98 |
54 |
|
T99 |
17 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
647 |
1 |
|
|
T38 |
16 |
|
T98 |
18 |
|
T99 |
13 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1164 |
1 |
|
|
T38 |
31 |
|
T98 |
42 |
|
T99 |
19 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
643 |
1 |
|
|
T38 |
17 |
|
T98 |
14 |
|
T99 |
14 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1174 |
1 |
|
|
T38 |
28 |
|
T98 |
54 |
|
T99 |
17 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
646 |
1 |
|
|
T38 |
16 |
|
T98 |
18 |
|
T99 |
13 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1138 |
1 |
|
|
T38 |
31 |
|
T98 |
42 |
|
T99 |
18 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
643 |
1 |
|
|
T38 |
17 |
|
T98 |
14 |
|
T99 |
14 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1136 |
1 |
|
|
T38 |
26 |
|
T98 |
51 |
|
T99 |
16 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
646 |
1 |
|
|
T38 |
16 |
|
T98 |
18 |
|
T99 |
13 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1105 |
1 |
|
|
T38 |
31 |
|
T98 |
39 |
|
T99 |
18 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
643 |
1 |
|
|
T38 |
17 |
|
T98 |
14 |
|
T99 |
14 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1112 |
1 |
|
|
T38 |
25 |
|
T98 |
48 |
|
T99 |
16 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
646 |
1 |
|
|
T38 |
16 |
|
T98 |
18 |
|
T99 |
13 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1073 |
1 |
|
|
T38 |
29 |
|
T98 |
37 |
|
T99 |
18 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[0] |
auto[0] |
54277 |
1 |
|
|
T38 |
1128 |
|
T98 |
1021 |
|
T99 |
689 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[0] |
auto[1] |
36750 |
1 |
|
|
T38 |
662 |
|
T98 |
1160 |
|
T99 |
416 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56641 |
1 |
|
|
T38 |
2091 |
|
T98 |
2812 |
|
T99 |
1844 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[1] |
auto[1] |
43539 |
1 |
|
|
T38 |
945 |
|
T98 |
1100 |
|
T99 |
603 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
640 |
1 |
|
|
T38 |
12 |
|
T98 |
17 |
|
T99 |
10 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1546 |
1 |
|
|
T38 |
43 |
|
T98 |
54 |
|
T99 |
17 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
650 |
1 |
|
|
T38 |
16 |
|
T98 |
20 |
|
T99 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1534 |
1 |
|
|
T38 |
39 |
|
T98 |
52 |
|
T99 |
18 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
640 |
1 |
|
|
T38 |
12 |
|
T98 |
17 |
|
T99 |
10 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1511 |
1 |
|
|
T38 |
41 |
|
T98 |
51 |
|
T99 |
17 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
650 |
1 |
|
|
T38 |
16 |
|
T98 |
20 |
|
T99 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1504 |
1 |
|
|
T38 |
38 |
|
T98 |
51 |
|
T99 |
18 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
638 |
1 |
|
|
T38 |
11 |
|
T98 |
17 |
|
T99 |
10 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1486 |
1 |
|
|
T38 |
40 |
|
T98 |
51 |
|
T99 |
16 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
650 |
1 |
|
|
T38 |
16 |
|
T98 |
20 |
|
T99 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1472 |
1 |
|
|
T38 |
37 |
|
T98 |
51 |
|
T99 |
18 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
638 |
1 |
|
|
T38 |
11 |
|
T98 |
17 |
|
T99 |
10 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1452 |
1 |
|
|
T38 |
39 |
|
T98 |
51 |
|
T99 |
15 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
650 |
1 |
|
|
T38 |
16 |
|
T98 |
20 |
|
T99 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1447 |
1 |
|
|
T38 |
36 |
|
T98 |
51 |
|
T99 |
18 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
629 |
1 |
|
|
T38 |
11 |
|
T98 |
17 |
|
T99 |
10 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1420 |
1 |
|
|
T38 |
37 |
|
T98 |
51 |
|
T99 |
15 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
646 |
1 |
|
|
T38 |
16 |
|
T98 |
20 |
|
T99 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1419 |
1 |
|
|
T38 |
35 |
|
T98 |
51 |
|
T99 |
18 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
629 |
1 |
|
|
T38 |
11 |
|
T98 |
17 |
|
T99 |
10 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1386 |
1 |
|
|
T38 |
37 |
|
T98 |
50 |
|
T99 |
15 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
646 |
1 |
|
|
T38 |
16 |
|
T98 |
20 |
|
T99 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1391 |
1 |
|
|
T38 |
35 |
|
T98 |
51 |
|
T99 |
18 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
625 |
1 |
|
|
T38 |
11 |
|
T98 |
17 |
|
T99 |
10 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1357 |
1 |
|
|
T38 |
34 |
|
T98 |
49 |
|
T99 |
15 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
642 |
1 |
|
|
T38 |
16 |
|
T98 |
20 |
|
T99 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1355 |
1 |
|
|
T38 |
35 |
|
T98 |
48 |
|
T99 |
18 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
625 |
1 |
|
|
T38 |
11 |
|
T98 |
17 |
|
T99 |
10 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1326 |
1 |
|
|
T38 |
34 |
|
T98 |
47 |
|
T99 |
15 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
642 |
1 |
|
|
T38 |
16 |
|
T98 |
20 |
|
T99 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1326 |
1 |
|
|
T38 |
35 |
|
T98 |
46 |
|
T99 |
18 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
621 |
1 |
|
|
T38 |
11 |
|
T98 |
17 |
|
T99 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1299 |
1 |
|
|
T38 |
32 |
|
T98 |
46 |
|
T99 |
15 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
640 |
1 |
|
|
T38 |
16 |
|
T98 |
19 |
|
T99 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1301 |
1 |
|
|
T38 |
35 |
|
T98 |
45 |
|
T99 |
18 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
621 |
1 |
|
|
T38 |
11 |
|
T98 |
17 |
|
T99 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1278 |
1 |
|
|
T38 |
30 |
|
T98 |
46 |
|
T99 |
15 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
640 |
1 |
|
|
T38 |
16 |
|
T98 |
19 |
|
T99 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1268 |
1 |
|
|
T38 |
34 |
|
T98 |
44 |
|
T99 |
17 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
621 |
1 |
|
|
T38 |
11 |
|
T98 |
17 |
|
T99 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1244 |
1 |
|
|
T38 |
29 |
|
T98 |
46 |
|
T99 |
15 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
639 |
1 |
|
|
T38 |
16 |
|
T98 |
19 |
|
T99 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1242 |
1 |
|
|
T38 |
34 |
|
T98 |
44 |
|
T99 |
16 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
621 |
1 |
|
|
T38 |
11 |
|
T98 |
17 |
|
T99 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1216 |
1 |
|
|
T38 |
28 |
|
T98 |
46 |
|
T99 |
15 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
639 |
1 |
|
|
T38 |
16 |
|
T98 |
19 |
|
T99 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1212 |
1 |
|
|
T38 |
34 |
|
T98 |
42 |
|
T99 |
16 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
621 |
1 |
|
|
T38 |
11 |
|
T98 |
17 |
|
T99 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1182 |
1 |
|
|
T38 |
27 |
|
T98 |
46 |
|
T99 |
15 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
638 |
1 |
|
|
T38 |
16 |
|
T98 |
19 |
|
T99 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1185 |
1 |
|
|
T38 |
33 |
|
T98 |
41 |
|
T99 |
16 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
621 |
1 |
|
|
T38 |
11 |
|
T98 |
17 |
|
T99 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1156 |
1 |
|
|
T38 |
26 |
|
T98 |
45 |
|
T99 |
14 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
638 |
1 |
|
|
T38 |
16 |
|
T98 |
19 |
|
T99 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1165 |
1 |
|
|
T38 |
32 |
|
T98 |
38 |
|
T99 |
16 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
621 |
1 |
|
|
T38 |
11 |
|
T98 |
17 |
|
T99 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1124 |
1 |
|
|
T38 |
26 |
|
T98 |
42 |
|
T99 |
13 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
638 |
1 |
|
|
T38 |
16 |
|
T98 |
19 |
|
T99 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1132 |
1 |
|
|
T38 |
32 |
|
T98 |
35 |
|
T99 |
15 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[0] |
auto[0] |
51854 |
1 |
|
|
T38 |
742 |
|
T98 |
1521 |
|
T99 |
450 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46133 |
1 |
|
|
T38 |
1011 |
|
T98 |
2183 |
|
T99 |
541 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[1] |
auto[0] |
48779 |
1 |
|
|
T38 |
2405 |
|
T98 |
1020 |
|
T99 |
756 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44725 |
1 |
|
|
T38 |
740 |
|
T98 |
1406 |
|
T99 |
1575 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
611 |
1 |
|
|
T38 |
13 |
|
T98 |
18 |
|
T99 |
7 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1566 |
1 |
|
|
T38 |
38 |
|
T98 |
52 |
|
T99 |
31 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
601 |
1 |
|
|
T38 |
11 |
|
T98 |
19 |
|
T99 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1567 |
1 |
|
|
T38 |
40 |
|
T98 |
51 |
|
T99 |
32 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
611 |
1 |
|
|
T38 |
13 |
|
T98 |
18 |
|
T99 |
7 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1538 |
1 |
|
|
T38 |
36 |
|
T98 |
51 |
|
T99 |
30 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
601 |
1 |
|
|
T38 |
11 |
|
T98 |
19 |
|
T99 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1539 |
1 |
|
|
T38 |
40 |
|
T98 |
50 |
|
T99 |
31 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
610 |
1 |
|
|
T38 |
12 |
|
T98 |
18 |
|
T99 |
7 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1506 |
1 |
|
|
T38 |
36 |
|
T98 |
50 |
|
T99 |
29 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
600 |
1 |
|
|
T38 |
11 |
|
T98 |
19 |
|
T99 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1518 |
1 |
|
|
T38 |
39 |
|
T98 |
50 |
|
T99 |
30 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
610 |
1 |
|
|
T38 |
12 |
|
T98 |
18 |
|
T99 |
7 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1474 |
1 |
|
|
T38 |
36 |
|
T98 |
50 |
|
T99 |
29 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
600 |
1 |
|
|
T38 |
11 |
|
T98 |
19 |
|
T99 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1488 |
1 |
|
|
T38 |
39 |
|
T98 |
49 |
|
T99 |
30 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
604 |
1 |
|
|
T38 |
12 |
|
T98 |
18 |
|
T99 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1439 |
1 |
|
|
T38 |
36 |
|
T98 |
47 |
|
T99 |
28 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
594 |
1 |
|
|
T38 |
11 |
|
T98 |
19 |
|
T99 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1464 |
1 |
|
|
T38 |
39 |
|
T98 |
49 |
|
T99 |
29 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
604 |
1 |
|
|
T38 |
12 |
|
T98 |
18 |
|
T99 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1407 |
1 |
|
|
T38 |
34 |
|
T98 |
46 |
|
T99 |
28 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
594 |
1 |
|
|
T38 |
11 |
|
T98 |
19 |
|
T99 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1427 |
1 |
|
|
T38 |
37 |
|
T98 |
49 |
|
T99 |
28 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
601 |
1 |
|
|
T38 |
12 |
|
T98 |
18 |
|
T99 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1372 |
1 |
|
|
T38 |
33 |
|
T98 |
45 |
|
T99 |
27 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
591 |
1 |
|
|
T38 |
11 |
|
T98 |
19 |
|
T99 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1405 |
1 |
|
|
T38 |
37 |
|
T98 |
48 |
|
T99 |
28 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
601 |
1 |
|
|
T38 |
12 |
|
T98 |
18 |
|
T99 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1338 |
1 |
|
|
T38 |
32 |
|
T98 |
44 |
|
T99 |
27 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
591 |
1 |
|
|
T38 |
11 |
|
T98 |
19 |
|
T99 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1373 |
1 |
|
|
T38 |
35 |
|
T98 |
48 |
|
T99 |
28 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
598 |
1 |
|
|
T38 |
12 |
|
T98 |
18 |
|
T99 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1305 |
1 |
|
|
T38 |
32 |
|
T98 |
44 |
|
T99 |
25 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
589 |
1 |
|
|
T38 |
11 |
|
T98 |
19 |
|
T99 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1348 |
1 |
|
|
T38 |
34 |
|
T98 |
47 |
|
T99 |
28 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
598 |
1 |
|
|
T38 |
12 |
|
T98 |
18 |
|
T99 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1280 |
1 |
|
|
T38 |
32 |
|
T98 |
43 |
|
T99 |
25 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
589 |
1 |
|
|
T38 |
11 |
|
T98 |
19 |
|
T99 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1321 |
1 |
|
|
T38 |
33 |
|
T98 |
47 |
|
T99 |
28 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
597 |
1 |
|
|
T38 |
12 |
|
T98 |
18 |
|
T99 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1251 |
1 |
|
|
T38 |
31 |
|
T98 |
41 |
|
T99 |
24 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
589 |
1 |
|
|
T38 |
11 |
|
T98 |
19 |
|
T99 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1293 |
1 |
|
|
T38 |
31 |
|
T98 |
44 |
|
T99 |
27 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
597 |
1 |
|
|
T38 |
12 |
|
T98 |
18 |
|
T99 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1208 |
1 |
|
|
T38 |
31 |
|
T98 |
39 |
|
T99 |
23 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
589 |
1 |
|
|
T38 |
11 |
|
T98 |
19 |
|
T99 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1281 |
1 |
|
|
T38 |
30 |
|
T98 |
44 |
|
T99 |
27 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
596 |
1 |
|
|
T38 |
12 |
|
T98 |
18 |
|
T99 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1173 |
1 |
|
|
T38 |
31 |
|
T98 |
39 |
|
T99 |
21 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
589 |
1 |
|
|
T38 |
11 |
|
T98 |
19 |
|
T99 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1257 |
1 |
|
|
T38 |
29 |
|
T98 |
43 |
|
T99 |
27 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
596 |
1 |
|
|
T38 |
12 |
|
T98 |
18 |
|
T99 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1137 |
1 |
|
|
T38 |
30 |
|
T98 |
37 |
|
T99 |
20 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
589 |
1 |
|
|
T38 |
11 |
|
T98 |
19 |
|
T99 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1230 |
1 |
|
|
T38 |
28 |
|
T98 |
42 |
|
T99 |
25 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
596 |
1 |
|
|
T38 |
12 |
|
T98 |
18 |
|
T99 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1097 |
1 |
|
|
T38 |
29 |
|
T98 |
37 |
|
T99 |
20 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
589 |
1 |
|
|
T38 |
11 |
|
T98 |
19 |
|
T99 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1184 |
1 |
|
|
T38 |
27 |
|
T98 |
41 |
|
T99 |
24 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[0] |
auto[0] |
53028 |
1 |
|
|
T38 |
1992 |
|
T98 |
1165 |
|
T99 |
1364 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45345 |
1 |
|
|
T38 |
923 |
|
T98 |
1482 |
|
T99 |
552 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[1] |
auto[0] |
50454 |
1 |
|
|
T38 |
958 |
|
T98 |
1099 |
|
T99 |
945 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[1] |
auto[1] |
43265 |
1 |
|
|
T38 |
947 |
|
T98 |
2359 |
|
T99 |
447 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
644 |
1 |
|
|
T38 |
16 |
|
T98 |
18 |
|
T99 |
13 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1502 |
1 |
|
|
T38 |
38 |
|
T98 |
53 |
|
T99 |
23 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
656 |
1 |
|
|
T38 |
14 |
|
T98 |
15 |
|
T99 |
10 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1483 |
1 |
|
|
T38 |
39 |
|
T98 |
57 |
|
T99 |
25 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
644 |
1 |
|
|
T38 |
16 |
|
T98 |
18 |
|
T99 |
13 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1470 |
1 |
|
|
T38 |
36 |
|
T98 |
51 |
|
T99 |
23 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
656 |
1 |
|
|
T38 |
14 |
|
T98 |
15 |
|
T99 |
10 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1451 |
1 |
|
|
T38 |
39 |
|
T98 |
57 |
|
T99 |
24 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
642 |
1 |
|
|
T38 |
15 |
|
T98 |
18 |
|
T99 |
13 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1445 |
1 |
|
|
T38 |
36 |
|
T98 |
50 |
|
T99 |
23 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
654 |
1 |
|
|
T38 |
14 |
|
T98 |
15 |
|
T99 |
10 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1428 |
1 |
|
|
T38 |
39 |
|
T98 |
57 |
|
T99 |
24 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
642 |
1 |
|
|
T38 |
15 |
|
T98 |
18 |
|
T99 |
13 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1407 |
1 |
|
|
T38 |
34 |
|
T98 |
49 |
|
T99 |
23 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
654 |
1 |
|
|
T38 |
14 |
|
T98 |
15 |
|
T99 |
10 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1396 |
1 |
|
|
T38 |
37 |
|
T98 |
56 |
|
T99 |
24 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
635 |
1 |
|
|
T38 |
15 |
|
T98 |
18 |
|
T99 |
12 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1384 |
1 |
|
|
T38 |
34 |
|
T98 |
48 |
|
T99 |
24 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
651 |
1 |
|
|
T38 |
14 |
|
T98 |
15 |
|
T99 |
10 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1377 |
1 |
|
|
T38 |
36 |
|
T98 |
54 |
|
T99 |
24 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
635 |
1 |
|
|
T38 |
15 |
|
T98 |
18 |
|
T99 |
12 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1359 |
1 |
|
|
T38 |
34 |
|
T98 |
47 |
|
T99 |
23 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
651 |
1 |
|
|
T38 |
14 |
|
T98 |
15 |
|
T99 |
10 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1351 |
1 |
|
|
T38 |
36 |
|
T98 |
53 |
|
T99 |
24 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
632 |
1 |
|
|
T38 |
15 |
|
T98 |
18 |
|
T99 |
12 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1333 |
1 |
|
|
T38 |
34 |
|
T98 |
47 |
|
T99 |
23 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
648 |
1 |
|
|
T38 |
14 |
|
T98 |
15 |
|
T99 |
10 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1328 |
1 |
|
|
T38 |
35 |
|
T98 |
52 |
|
T99 |
24 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
632 |
1 |
|
|
T38 |
15 |
|
T98 |
18 |
|
T99 |
12 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1311 |
1 |
|
|
T38 |
34 |
|
T98 |
47 |
|
T99 |
23 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
648 |
1 |
|
|
T38 |
14 |
|
T98 |
15 |
|
T99 |
10 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1295 |
1 |
|
|
T38 |
34 |
|
T98 |
51 |
|
T99 |
23 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
626 |
1 |
|
|
T38 |
15 |
|
T98 |
18 |
|
T99 |
12 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1290 |
1 |
|
|
T38 |
33 |
|
T98 |
46 |
|
T99 |
23 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
646 |
1 |
|
|
T38 |
14 |
|
T98 |
15 |
|
T99 |
10 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1253 |
1 |
|
|
T38 |
33 |
|
T98 |
50 |
|
T99 |
23 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
626 |
1 |
|
|
T38 |
15 |
|
T98 |
18 |
|
T99 |
12 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1259 |
1 |
|
|
T38 |
31 |
|
T98 |
45 |
|
T99 |
22 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
646 |
1 |
|
|
T38 |
14 |
|
T98 |
15 |
|
T99 |
10 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1223 |
1 |
|
|
T38 |
33 |
|
T98 |
48 |
|
T99 |
21 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
624 |
1 |
|
|
T38 |
15 |
|
T98 |
18 |
|
T99 |
12 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1235 |
1 |
|
|
T38 |
31 |
|
T98 |
43 |
|
T99 |
22 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
645 |
1 |
|
|
T38 |
14 |
|
T98 |
15 |
|
T99 |
10 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1199 |
1 |
|
|
T38 |
32 |
|
T98 |
48 |
|
T99 |
20 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
624 |
1 |
|
|
T38 |
15 |
|
T98 |
18 |
|
T99 |
12 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1200 |
1 |
|
|
T38 |
30 |
|
T98 |
41 |
|
T99 |
22 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
645 |
1 |
|
|
T38 |
14 |
|
T98 |
15 |
|
T99 |
10 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1169 |
1 |
|
|
T38 |
32 |
|
T98 |
48 |
|
T99 |
20 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
624 |
1 |
|
|
T38 |
15 |
|
T98 |
18 |
|
T99 |
12 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1174 |
1 |
|
|
T38 |
29 |
|
T98 |
39 |
|
T99 |
22 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
644 |
1 |
|
|
T38 |
14 |
|
T98 |
15 |
|
T99 |
10 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1126 |
1 |
|
|
T38 |
30 |
|
T98 |
47 |
|
T99 |
20 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
624 |
1 |
|
|
T38 |
15 |
|
T98 |
18 |
|
T99 |
12 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1152 |
1 |
|
|
T38 |
28 |
|
T98 |
39 |
|
T99 |
22 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
644 |
1 |
|
|
T38 |
14 |
|
T98 |
15 |
|
T99 |
10 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1102 |
1 |
|
|
T38 |
29 |
|
T98 |
46 |
|
T99 |
20 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
623 |
1 |
|
|
T38 |
15 |
|
T98 |
18 |
|
T99 |
12 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1123 |
1 |
|
|
T38 |
28 |
|
T98 |
38 |
|
T99 |
21 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
644 |
1 |
|
|
T38 |
14 |
|
T98 |
15 |
|
T99 |
10 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1076 |
1 |
|
|
T38 |
29 |
|
T98 |
45 |
|
T99 |
18 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[0] |
auto[0] |
52493 |
1 |
|
|
T38 |
1244 |
|
T98 |
1498 |
|
T99 |
1385 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44832 |
1 |
|
|
T38 |
2234 |
|
T98 |
828 |
|
T99 |
596 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[1] |
auto[0] |
50858 |
1 |
|
|
T38 |
890 |
|
T98 |
2901 |
|
T99 |
755 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[1] |
auto[1] |
43095 |
1 |
|
|
T38 |
577 |
|
T98 |
986 |
|
T99 |
565 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
655 |
1 |
|
|
T38 |
13 |
|
T98 |
18 |
|
T99 |
14 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1532 |
1 |
|
|
T38 |
36 |
|
T98 |
51 |
|
T99 |
22 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
644 |
1 |
|
|
T38 |
20 |
|
T98 |
23 |
|
T99 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1537 |
1 |
|
|
T38 |
28 |
|
T98 |
47 |
|
T99 |
23 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
655 |
1 |
|
|
T38 |
13 |
|
T98 |
18 |
|
T99 |
14 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1498 |
1 |
|
|
T38 |
35 |
|
T98 |
49 |
|
T99 |
22 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
644 |
1 |
|
|
T38 |
20 |
|
T98 |
23 |
|
T99 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1510 |
1 |
|
|
T38 |
27 |
|
T98 |
47 |
|
T99 |
23 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
654 |
1 |
|
|
T38 |
12 |
|
T98 |
18 |
|
T99 |
14 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1462 |
1 |
|
|
T38 |
35 |
|
T98 |
47 |
|
T99 |
21 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
643 |
1 |
|
|
T38 |
20 |
|
T98 |
23 |
|
T99 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1484 |
1 |
|
|
T38 |
26 |
|
T98 |
46 |
|
T99 |
23 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
654 |
1 |
|
|
T38 |
12 |
|
T98 |
18 |
|
T99 |
14 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1429 |
1 |
|
|
T38 |
35 |
|
T98 |
46 |
|
T99 |
21 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
643 |
1 |
|
|
T38 |
20 |
|
T98 |
23 |
|
T99 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1454 |
1 |
|
|
T38 |
25 |
|
T98 |
45 |
|
T99 |
23 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
649 |
1 |
|
|
T38 |
12 |
|
T98 |
18 |
|
T99 |
13 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1399 |
1 |
|
|
T38 |
35 |
|
T98 |
44 |
|
T99 |
22 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
641 |
1 |
|
|
T38 |
20 |
|
T98 |
23 |
|
T99 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1414 |
1 |
|
|
T38 |
23 |
|
T98 |
42 |
|
T99 |
22 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
649 |
1 |
|
|
T38 |
12 |
|
T98 |
18 |
|
T99 |
13 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1375 |
1 |
|
|
T38 |
35 |
|
T98 |
43 |
|
T99 |
22 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
641 |
1 |
|
|
T38 |
20 |
|
T98 |
23 |
|
T99 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1384 |
1 |
|
|
T38 |
22 |
|
T98 |
41 |
|
T99 |
22 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
646 |
1 |
|
|
T38 |
12 |
|
T98 |
18 |
|
T99 |
13 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1344 |
1 |
|
|
T38 |
34 |
|
T98 |
41 |
|
T99 |
22 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
640 |
1 |
|
|
T38 |
20 |
|
T98 |
23 |
|
T99 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1347 |
1 |
|
|
T38 |
22 |
|
T98 |
40 |
|
T99 |
22 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
646 |
1 |
|
|
T38 |
12 |
|
T98 |
18 |
|
T99 |
13 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1313 |
1 |
|
|
T38 |
34 |
|
T98 |
40 |
|
T99 |
21 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
640 |
1 |
|
|
T38 |
20 |
|
T98 |
23 |
|
T99 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1327 |
1 |
|
|
T38 |
21 |
|
T98 |
40 |
|
T99 |
22 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
642 |
1 |
|
|
T38 |
12 |
|
T98 |
18 |
|
T99 |
13 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1292 |
1 |
|
|
T38 |
34 |
|
T98 |
40 |
|
T99 |
21 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
636 |
1 |
|
|
T38 |
20 |
|
T98 |
22 |
|
T99 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1295 |
1 |
|
|
T38 |
21 |
|
T98 |
40 |
|
T99 |
22 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
642 |
1 |
|
|
T38 |
12 |
|
T98 |
18 |
|
T99 |
13 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1258 |
1 |
|
|
T38 |
34 |
|
T98 |
38 |
|
T99 |
21 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
636 |
1 |
|
|
T38 |
20 |
|
T98 |
22 |
|
T99 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1267 |
1 |
|
|
T38 |
19 |
|
T98 |
40 |
|
T99 |
22 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
640 |
1 |
|
|
T38 |
12 |
|
T98 |
18 |
|
T99 |
13 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1221 |
1 |
|
|
T38 |
33 |
|
T98 |
37 |
|
T99 |
19 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
634 |
1 |
|
|
T38 |
20 |
|
T98 |
22 |
|
T99 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1235 |
1 |
|
|
T38 |
18 |
|
T98 |
37 |
|
T99 |
21 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
640 |
1 |
|
|
T38 |
12 |
|
T98 |
18 |
|
T99 |
13 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1189 |
1 |
|
|
T38 |
33 |
|
T98 |
37 |
|
T99 |
19 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
634 |
1 |
|
|
T38 |
20 |
|
T98 |
22 |
|
T99 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1218 |
1 |
|
|
T38 |
18 |
|
T98 |
37 |
|
T99 |
21 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
640 |
1 |
|
|
T38 |
12 |
|
T98 |
18 |
|
T99 |
13 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1157 |
1 |
|
|
T38 |
33 |
|
T98 |
36 |
|
T99 |
19 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
633 |
1 |
|
|
T38 |
20 |
|
T98 |
22 |
|
T99 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1193 |
1 |
|
|
T38 |
17 |
|
T98 |
37 |
|
T99 |
21 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
640 |
1 |
|
|
T38 |
12 |
|
T98 |
18 |
|
T99 |
13 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1122 |
1 |
|
|
T38 |
33 |
|
T98 |
35 |
|
T99 |
19 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
633 |
1 |
|
|
T38 |
20 |
|
T98 |
22 |
|
T99 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1167 |
1 |
|
|
T38 |
17 |
|
T98 |
37 |
|
T99 |
20 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
640 |
1 |
|
|
T38 |
12 |
|
T98 |
18 |
|
T99 |
13 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1101 |
1 |
|
|
T38 |
33 |
|
T98 |
34 |
|
T99 |
19 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
633 |
1 |
|
|
T38 |
20 |
|
T98 |
22 |
|
T99 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1133 |
1 |
|
|
T38 |
17 |
|
T98 |
37 |
|
T99 |
18 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[0] |
auto[0] |
55230 |
1 |
|
|
T38 |
2411 |
|
T98 |
1696 |
|
T99 |
1342 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[0] |
auto[1] |
43022 |
1 |
|
|
T38 |
627 |
|
T98 |
939 |
|
T99 |
481 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[1] |
auto[0] |
50476 |
1 |
|
|
T38 |
1146 |
|
T98 |
2485 |
|
T99 |
595 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[1] |
auto[1] |
43478 |
1 |
|
|
T38 |
670 |
|
T98 |
1011 |
|
T99 |
707 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
667 |
1 |
|
|
T38 |
21 |
|
T98 |
21 |
|
T99 |
12 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1481 |
1 |
|
|
T38 |
29 |
|
T98 |
47 |
|
T99 |
35 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
639 |
1 |
|
|
T38 |
17 |
|
T98 |
23 |
|
T99 |
9 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1503 |
1 |
|
|
T38 |
32 |
|
T98 |
46 |
|
T99 |
37 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
667 |
1 |
|
|
T38 |
21 |
|
T98 |
21 |
|
T99 |
12 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1446 |
1 |
|
|
T38 |
29 |
|
T98 |
46 |
|
T99 |
32 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
639 |
1 |
|
|
T38 |
17 |
|
T98 |
23 |
|
T99 |
9 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1476 |
1 |
|
|
T38 |
32 |
|
T98 |
45 |
|
T99 |
36 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
666 |
1 |
|
|
T38 |
21 |
|
T98 |
21 |
|
T99 |
12 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1425 |
1 |
|
|
T38 |
29 |
|
T98 |
46 |
|
T99 |
31 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
637 |
1 |
|
|
T38 |
17 |
|
T98 |
23 |
|
T99 |
9 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1449 |
1 |
|
|
T38 |
32 |
|
T98 |
45 |
|
T99 |
36 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
666 |
1 |
|
|
T38 |
21 |
|
T98 |
21 |
|
T99 |
12 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1399 |
1 |
|
|
T38 |
29 |
|
T98 |
45 |
|
T99 |
29 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
637 |
1 |
|
|
T38 |
17 |
|
T98 |
23 |
|
T99 |
9 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1413 |
1 |
|
|
T38 |
32 |
|
T98 |
44 |
|
T99 |
36 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
661 |
1 |
|
|
T38 |
21 |
|
T98 |
21 |
|
T99 |
12 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1363 |
1 |
|
|
T38 |
28 |
|
T98 |
43 |
|
T99 |
26 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
634 |
1 |
|
|
T38 |
17 |
|
T98 |
23 |
|
T99 |
9 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1394 |
1 |
|
|
T38 |
31 |
|
T98 |
43 |
|
T99 |
36 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
661 |
1 |
|
|
T38 |
21 |
|
T98 |
21 |
|
T99 |
12 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1333 |
1 |
|
|
T38 |
28 |
|
T98 |
42 |
|
T99 |
26 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
634 |
1 |
|
|
T38 |
17 |
|
T98 |
23 |
|
T99 |
9 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1359 |
1 |
|
|
T38 |
31 |
|
T98 |
43 |
|
T99 |
36 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
658 |
1 |
|
|
T38 |
21 |
|
T98 |
21 |
|
T99 |
12 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1306 |
1 |
|
|
T38 |
27 |
|
T98 |
42 |
|
T99 |
24 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
632 |
1 |
|
|
T38 |
17 |
|
T98 |
23 |
|
T99 |
9 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1337 |
1 |
|
|
T38 |
31 |
|
T98 |
43 |
|
T99 |
34 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
658 |
1 |
|
|
T38 |
21 |
|
T98 |
21 |
|
T99 |
12 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1271 |
1 |
|
|
T38 |
27 |
|
T98 |
42 |
|
T99 |
24 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
632 |
1 |
|
|
T38 |
17 |
|
T98 |
23 |
|
T99 |
9 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1303 |
1 |
|
|
T38 |
30 |
|
T98 |
42 |
|
T99 |
34 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
650 |
1 |
|
|
T38 |
21 |
|
T98 |
21 |
|
T99 |
11 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1239 |
1 |
|
|
T38 |
26 |
|
T98 |
42 |
|
T99 |
22 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
628 |
1 |
|
|
T38 |
17 |
|
T98 |
23 |
|
T99 |
9 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1275 |
1 |
|
|
T38 |
29 |
|
T98 |
42 |
|
T99 |
34 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
650 |
1 |
|
|
T38 |
21 |
|
T98 |
21 |
|
T99 |
11 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1209 |
1 |
|
|
T38 |
26 |
|
T98 |
42 |
|
T99 |
22 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
628 |
1 |
|
|
T38 |
17 |
|
T98 |
23 |
|
T99 |
9 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1250 |
1 |
|
|
T38 |
29 |
|
T98 |
42 |
|
T99 |
34 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
649 |
1 |
|
|
T38 |
21 |
|
T98 |
21 |
|
T99 |
11 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1194 |
1 |
|
|
T38 |
25 |
|
T98 |
41 |
|
T99 |
22 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
626 |
1 |
|
|
T38 |
17 |
|
T98 |
23 |
|
T99 |
9 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1219 |
1 |
|
|
T38 |
28 |
|
T98 |
42 |
|
T99 |
34 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
649 |
1 |
|
|
T38 |
21 |
|
T98 |
21 |
|
T99 |
11 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1171 |
1 |
|
|
T38 |
25 |
|
T98 |
39 |
|
T99 |
21 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
626 |
1 |
|
|
T38 |
17 |
|
T98 |
23 |
|
T99 |
9 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1189 |
1 |
|
|
T38 |
28 |
|
T98 |
42 |
|
T99 |
33 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
648 |
1 |
|
|
T38 |
21 |
|
T98 |
21 |
|
T99 |
11 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1127 |
1 |
|
|
T38 |
24 |
|
T98 |
38 |
|
T99 |
20 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
625 |
1 |
|
|
T38 |
17 |
|
T98 |
23 |
|
T99 |
9 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1149 |
1 |
|
|
T38 |
24 |
|
T98 |
41 |
|
T99 |
31 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
648 |
1 |
|
|
T38 |
21 |
|
T98 |
21 |
|
T99 |
11 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1101 |
1 |
|
|
T38 |
24 |
|
T98 |
36 |
|
T99 |
18 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
625 |
1 |
|
|
T38 |
17 |
|
T98 |
23 |
|
T99 |
9 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1126 |
1 |
|
|
T38 |
24 |
|
T98 |
39 |
|
T99 |
31 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
647 |
1 |
|
|
T38 |
21 |
|
T98 |
21 |
|
T99 |
11 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1076 |
1 |
|
|
T38 |
24 |
|
T98 |
33 |
|
T99 |
18 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
625 |
1 |
|
|
T38 |
17 |
|
T98 |
23 |
|
T99 |
9 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1101 |
1 |
|
|
T38 |
23 |
|
T98 |
38 |
|
T99 |
30 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[0] |
auto[0] |
52154 |
1 |
|
|
T38 |
1225 |
|
T98 |
1454 |
|
T99 |
938 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[0] |
auto[1] |
42865 |
1 |
|
|
T38 |
1774 |
|
T98 |
1122 |
|
T99 |
1298 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[1] |
auto[0] |
55435 |
1 |
|
|
T38 |
1200 |
|
T98 |
1153 |
|
T99 |
678 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[1] |
auto[1] |
41084 |
1 |
|
|
T38 |
795 |
|
T98 |
2315 |
|
T99 |
557 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
656 |
1 |
|
|
T38 |
25 |
|
T98 |
26 |
|
T99 |
13 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1509 |
1 |
|
|
T38 |
22 |
|
T98 |
46 |
|
T99 |
17 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
640 |
1 |
|
|
T38 |
19 |
|
T98 |
26 |
|
T99 |
10 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1521 |
1 |
|
|
T38 |
27 |
|
T98 |
47 |
|
T99 |
19 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
656 |
1 |
|
|
T38 |
25 |
|
T98 |
26 |
|
T99 |
13 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1487 |
1 |
|
|
T38 |
22 |
|
T98 |
46 |
|
T99 |
17 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
640 |
1 |
|
|
T38 |
19 |
|
T98 |
26 |
|
T99 |
10 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1493 |
1 |
|
|
T38 |
26 |
|
T98 |
47 |
|
T99 |
19 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
656 |
1 |
|
|
T38 |
25 |
|
T98 |
26 |
|
T99 |
13 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1460 |
1 |
|
|
T38 |
22 |
|
T98 |
45 |
|
T99 |
17 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
638 |
1 |
|
|
T38 |
19 |
|
T98 |
26 |
|
T99 |
10 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1472 |
1 |
|
|
T38 |
25 |
|
T98 |
44 |
|
T99 |
19 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
656 |
1 |
|
|
T38 |
25 |
|
T98 |
26 |
|
T99 |
13 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1426 |
1 |
|
|
T38 |
22 |
|
T98 |
44 |
|
T99 |
17 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
638 |
1 |
|
|
T38 |
19 |
|
T98 |
26 |
|
T99 |
10 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1443 |
1 |
|
|
T38 |
24 |
|
T98 |
43 |
|
T99 |
18 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
646 |
1 |
|
|
T38 |
25 |
|
T98 |
26 |
|
T99 |
12 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1400 |
1 |
|
|
T38 |
21 |
|
T98 |
43 |
|
T99 |
18 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
635 |
1 |
|
|
T38 |
19 |
|
T98 |
26 |
|
T99 |
10 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1419 |
1 |
|
|
T38 |
24 |
|
T98 |
42 |
|
T99 |
18 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
646 |
1 |
|
|
T38 |
25 |
|
T98 |
26 |
|
T99 |
12 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1366 |
1 |
|
|
T38 |
19 |
|
T98 |
43 |
|
T99 |
18 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
635 |
1 |
|
|
T38 |
19 |
|
T98 |
26 |
|
T99 |
10 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1399 |
1 |
|
|
T38 |
24 |
|
T98 |
42 |
|
T99 |
18 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
640 |
1 |
|
|
T38 |
24 |
|
T98 |
26 |
|
T99 |
12 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1341 |
1 |
|
|
T38 |
18 |
|
T98 |
43 |
|
T99 |
18 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
635 |
1 |
|
|
T38 |
19 |
|
T98 |
26 |
|
T99 |
10 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1373 |
1 |
|
|
T38 |
24 |
|
T98 |
41 |
|
T99 |
18 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
640 |
1 |
|
|
T38 |
24 |
|
T98 |
26 |
|
T99 |
12 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1305 |
1 |
|
|
T38 |
16 |
|
T98 |
41 |
|
T99 |
17 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
635 |
1 |
|
|
T38 |
19 |
|
T98 |
26 |
|
T99 |
10 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1338 |
1 |
|
|
T38 |
24 |
|
T98 |
40 |
|
T99 |
17 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
638 |
1 |
|
|
T38 |
24 |
|
T98 |
26 |
|
T99 |
12 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1260 |
1 |
|
|
T38 |
16 |
|
T98 |
41 |
|
T99 |
17 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
633 |
1 |
|
|
T38 |
19 |
|
T98 |
26 |
|
T99 |
10 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1306 |
1 |
|
|
T38 |
22 |
|
T98 |
40 |
|
T99 |
17 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
638 |
1 |
|
|
T38 |
24 |
|
T98 |
26 |
|
T99 |
12 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1227 |
1 |
|
|
T38 |
16 |
|
T98 |
40 |
|
T99 |
17 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
633 |
1 |
|
|
T38 |
19 |
|
T98 |
26 |
|
T99 |
10 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1283 |
1 |
|
|
T38 |
21 |
|
T98 |
40 |
|
T99 |
17 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
635 |
1 |
|
|
T38 |
24 |
|
T98 |
26 |
|
T99 |
12 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1199 |
1 |
|
|
T38 |
16 |
|
T98 |
40 |
|
T99 |
17 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
632 |
1 |
|
|
T38 |
19 |
|
T98 |
26 |
|
T99 |
10 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1246 |
1 |
|
|
T38 |
21 |
|
T98 |
37 |
|
T99 |
17 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
635 |
1 |
|
|
T38 |
24 |
|
T98 |
26 |
|
T99 |
12 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1176 |
1 |
|
|
T38 |
16 |
|
T98 |
39 |
|
T99 |
16 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
632 |
1 |
|
|
T38 |
19 |
|
T98 |
26 |
|
T99 |
10 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1226 |
1 |
|
|
T38 |
20 |
|
T98 |
36 |
|
T99 |
17 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
634 |
1 |
|
|
T38 |
24 |
|
T98 |
26 |
|
T99 |
12 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1141 |
1 |
|
|
T38 |
16 |
|
T98 |
38 |
|
T99 |
14 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
632 |
1 |
|
|
T38 |
19 |
|
T98 |
26 |
|
T99 |
10 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1193 |
1 |
|
|
T38 |
20 |
|
T98 |
36 |
|
T99 |
17 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
634 |
1 |
|
|
T38 |
24 |
|
T98 |
26 |
|
T99 |
12 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1116 |
1 |
|
|
T38 |
16 |
|
T98 |
38 |
|
T99 |
14 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
632 |
1 |
|
|
T38 |
19 |
|
T98 |
26 |
|
T99 |
10 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1158 |
1 |
|
|
T38 |
20 |
|
T98 |
35 |
|
T99 |
16 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
634 |
1 |
|
|
T38 |
24 |
|
T98 |
26 |
|
T99 |
12 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1093 |
1 |
|
|
T38 |
16 |
|
T98 |
38 |
|
T99 |
13 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
632 |
1 |
|
|
T38 |
19 |
|
T98 |
26 |
|
T99 |
10 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1122 |
1 |
|
|
T38 |
19 |
|
T98 |
33 |
|
T99 |
16 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[0] |
auto[0] |
50588 |
1 |
|
|
T38 |
1326 |
|
T98 |
1245 |
|
T99 |
1735 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44948 |
1 |
|
|
T38 |
1956 |
|
T98 |
1161 |
|
T99 |
426 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[1] |
auto[0] |
51954 |
1 |
|
|
T38 |
831 |
|
T98 |
2333 |
|
T99 |
578 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[1] |
auto[1] |
43377 |
1 |
|
|
T38 |
645 |
|
T98 |
1178 |
|
T99 |
548 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
682 |
1 |
|
|
T38 |
22 |
|
T98 |
17 |
|
T99 |
17 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1502 |
1 |
|
|
T38 |
32 |
|
T98 |
62 |
|
T99 |
21 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
661 |
1 |
|
|
T38 |
19 |
|
T98 |
16 |
|
T99 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1519 |
1 |
|
|
T38 |
34 |
|
T98 |
64 |
|
T99 |
23 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
682 |
1 |
|
|
T38 |
22 |
|
T98 |
17 |
|
T99 |
17 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1470 |
1 |
|
|
T38 |
32 |
|
T98 |
61 |
|
T99 |
20 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
661 |
1 |
|
|
T38 |
19 |
|
T98 |
16 |
|
T99 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1485 |
1 |
|
|
T38 |
33 |
|
T98 |
63 |
|
T99 |
22 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
682 |
1 |
|
|
T38 |
22 |
|
T98 |
17 |
|
T99 |
17 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1449 |
1 |
|
|
T38 |
32 |
|
T98 |
60 |
|
T99 |
20 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
661 |
1 |
|
|
T38 |
19 |
|
T98 |
16 |
|
T99 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1455 |
1 |
|
|
T38 |
33 |
|
T98 |
61 |
|
T99 |
22 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
682 |
1 |
|
|
T38 |
22 |
|
T98 |
17 |
|
T99 |
17 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1422 |
1 |
|
|
T38 |
31 |
|
T98 |
60 |
|
T99 |
19 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
661 |
1 |
|
|
T38 |
19 |
|
T98 |
16 |
|
T99 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1426 |
1 |
|
|
T38 |
33 |
|
T98 |
57 |
|
T99 |
22 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T38 |
22 |
|
T98 |
17 |
|
T99 |
16 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1401 |
1 |
|
|
T38 |
30 |
|
T98 |
59 |
|
T99 |
19 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
658 |
1 |
|
|
T38 |
19 |
|
T98 |
16 |
|
T99 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1390 |
1 |
|
|
T38 |
32 |
|
T98 |
56 |
|
T99 |
21 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T38 |
22 |
|
T98 |
17 |
|
T99 |
16 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1375 |
1 |
|
|
T38 |
30 |
|
T98 |
58 |
|
T99 |
18 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
658 |
1 |
|
|
T38 |
19 |
|
T98 |
16 |
|
T99 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1358 |
1 |
|
|
T38 |
32 |
|
T98 |
55 |
|
T99 |
21 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
675 |
1 |
|
|
T38 |
21 |
|
T98 |
17 |
|
T99 |
16 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1355 |
1 |
|
|
T38 |
28 |
|
T98 |
57 |
|
T99 |
18 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
657 |
1 |
|
|
T38 |
19 |
|
T98 |
16 |
|
T99 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1330 |
1 |
|
|
T38 |
32 |
|
T98 |
54 |
|
T99 |
20 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
675 |
1 |
|
|
T38 |
21 |
|
T98 |
17 |
|
T99 |
16 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1327 |
1 |
|
|
T38 |
28 |
|
T98 |
56 |
|
T99 |
18 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
657 |
1 |
|
|
T38 |
19 |
|
T98 |
16 |
|
T99 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1304 |
1 |
|
|
T38 |
31 |
|
T98 |
54 |
|
T99 |
20 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
672 |
1 |
|
|
T38 |
21 |
|
T98 |
17 |
|
T99 |
16 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1308 |
1 |
|
|
T38 |
28 |
|
T98 |
56 |
|
T99 |
17 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
654 |
1 |
|
|
T38 |
19 |
|
T98 |
16 |
|
T99 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1285 |
1 |
|
|
T38 |
31 |
|
T98 |
54 |
|
T99 |
20 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
672 |
1 |
|
|
T38 |
21 |
|
T98 |
17 |
|
T99 |
16 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1269 |
1 |
|
|
T38 |
28 |
|
T98 |
53 |
|
T99 |
17 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
654 |
1 |
|
|
T38 |
19 |
|
T98 |
16 |
|
T99 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1257 |
1 |
|
|
T38 |
31 |
|
T98 |
53 |
|
T99 |
20 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T38 |
21 |
|
T98 |
17 |
|
T99 |
16 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1237 |
1 |
|
|
T38 |
28 |
|
T98 |
49 |
|
T99 |
16 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
653 |
1 |
|
|
T38 |
19 |
|
T98 |
16 |
|
T99 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1230 |
1 |
|
|
T38 |
30 |
|
T98 |
52 |
|
T99 |
20 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T38 |
21 |
|
T98 |
17 |
|
T99 |
16 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1203 |
1 |
|
|
T38 |
28 |
|
T98 |
48 |
|
T99 |
16 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
653 |
1 |
|
|
T38 |
19 |
|
T98 |
16 |
|
T99 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1195 |
1 |
|
|
T38 |
29 |
|
T98 |
51 |
|
T99 |
19 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T38 |
21 |
|
T98 |
17 |
|
T99 |
16 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1168 |
1 |
|
|
T38 |
26 |
|
T98 |
48 |
|
T99 |
16 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
652 |
1 |
|
|
T38 |
19 |
|
T98 |
16 |
|
T99 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1162 |
1 |
|
|
T38 |
28 |
|
T98 |
51 |
|
T99 |
19 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T38 |
21 |
|
T98 |
17 |
|
T99 |
16 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1142 |
1 |
|
|
T38 |
26 |
|
T98 |
48 |
|
T99 |
16 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
652 |
1 |
|
|
T38 |
19 |
|
T98 |
16 |
|
T99 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1131 |
1 |
|
|
T38 |
27 |
|
T98 |
48 |
|
T99 |
19 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T38 |
21 |
|
T98 |
17 |
|
T99 |
16 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1105 |
1 |
|
|
T38 |
26 |
|
T98 |
44 |
|
T99 |
16 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
652 |
1 |
|
|
T38 |
19 |
|
T98 |
16 |
|
T99 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1105 |
1 |
|
|
T38 |
27 |
|
T98 |
48 |
|
T99 |
19 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[0] |
auto[0] |
54822 |
1 |
|
|
T38 |
864 |
|
T98 |
2779 |
|
T99 |
670 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44282 |
1 |
|
|
T38 |
2474 |
|
T98 |
778 |
|
T99 |
1339 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[1] |
auto[0] |
51507 |
1 |
|
|
T38 |
520 |
|
T98 |
1357 |
|
T99 |
562 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[1] |
auto[1] |
41043 |
1 |
|
|
T38 |
792 |
|
T98 |
1084 |
|
T99 |
677 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
672 |
1 |
|
|
T38 |
15 |
|
T98 |
30 |
|
T99 |
12 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1495 |
1 |
|
|
T38 |
47 |
|
T98 |
44 |
|
T99 |
28 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T38 |
10 |
|
T98 |
28 |
|
T99 |
9 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1468 |
1 |
|
|
T38 |
51 |
|
T98 |
46 |
|
T99 |
30 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
672 |
1 |
|
|
T38 |
15 |
|
T98 |
30 |
|
T99 |
12 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1470 |
1 |
|
|
T38 |
47 |
|
T98 |
44 |
|
T99 |
27 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T38 |
10 |
|
T98 |
28 |
|
T99 |
9 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1440 |
1 |
|
|
T38 |
50 |
|
T98 |
46 |
|
T99 |
30 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T38 |
14 |
|
T98 |
30 |
|
T99 |
12 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1446 |
1 |
|
|
T38 |
47 |
|
T98 |
43 |
|
T99 |
27 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
690 |
1 |
|
|
T38 |
10 |
|
T98 |
28 |
|
T99 |
9 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1412 |
1 |
|
|
T38 |
49 |
|
T98 |
44 |
|
T99 |
30 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T38 |
14 |
|
T98 |
30 |
|
T99 |
12 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1424 |
1 |
|
|
T38 |
47 |
|
T98 |
43 |
|
T99 |
26 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
690 |
1 |
|
|
T38 |
10 |
|
T98 |
28 |
|
T99 |
9 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1382 |
1 |
|
|
T38 |
48 |
|
T98 |
44 |
|
T99 |
29 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
666 |
1 |
|
|
T38 |
14 |
|
T98 |
30 |
|
T99 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1397 |
1 |
|
|
T38 |
47 |
|
T98 |
42 |
|
T99 |
26 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T38 |
10 |
|
T98 |
28 |
|
T99 |
9 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1355 |
1 |
|
|
T38 |
47 |
|
T98 |
44 |
|
T99 |
29 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
666 |
1 |
|
|
T38 |
14 |
|
T98 |
30 |
|
T99 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1363 |
1 |
|
|
T38 |
44 |
|
T98 |
40 |
|
T99 |
26 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T38 |
10 |
|
T98 |
28 |
|
T99 |
9 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1327 |
1 |
|
|
T38 |
44 |
|
T98 |
44 |
|
T99 |
27 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
661 |
1 |
|
|
T38 |
14 |
|
T98 |
30 |
|
T99 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1332 |
1 |
|
|
T38 |
42 |
|
T98 |
40 |
|
T99 |
26 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
683 |
1 |
|
|
T38 |
10 |
|
T98 |
28 |
|
T99 |
9 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1298 |
1 |
|
|
T38 |
42 |
|
T98 |
43 |
|
T99 |
27 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
661 |
1 |
|
|
T38 |
14 |
|
T98 |
30 |
|
T99 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1300 |
1 |
|
|
T38 |
41 |
|
T98 |
38 |
|
T99 |
26 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
683 |
1 |
|
|
T38 |
10 |
|
T98 |
28 |
|
T99 |
9 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1268 |
1 |
|
|
T38 |
40 |
|
T98 |
42 |
|
T99 |
27 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
659 |
1 |
|
|
T38 |
14 |
|
T98 |
30 |
|
T99 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1260 |
1 |
|
|
T38 |
40 |
|
T98 |
37 |
|
T99 |
25 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
678 |
1 |
|
|
T38 |
10 |
|
T98 |
27 |
|
T99 |
9 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1229 |
1 |
|
|
T38 |
37 |
|
T98 |
42 |
|
T99 |
25 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
659 |
1 |
|
|
T38 |
14 |
|
T98 |
30 |
|
T99 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1229 |
1 |
|
|
T38 |
40 |
|
T98 |
34 |
|
T99 |
24 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
678 |
1 |
|
|
T38 |
10 |
|
T98 |
27 |
|
T99 |
9 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1200 |
1 |
|
|
T38 |
36 |
|
T98 |
41 |
|
T99 |
24 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
656 |
1 |
|
|
T38 |
14 |
|
T98 |
30 |
|
T99 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1196 |
1 |
|
|
T38 |
40 |
|
T98 |
34 |
|
T99 |
24 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
677 |
1 |
|
|
T38 |
10 |
|
T98 |
27 |
|
T99 |
9 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1175 |
1 |
|
|
T38 |
35 |
|
T98 |
41 |
|
T99 |
23 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
656 |
1 |
|
|
T38 |
14 |
|
T98 |
30 |
|
T99 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1167 |
1 |
|
|
T38 |
39 |
|
T98 |
33 |
|
T99 |
24 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
677 |
1 |
|
|
T38 |
10 |
|
T98 |
27 |
|
T99 |
9 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1144 |
1 |
|
|
T38 |
34 |
|
T98 |
40 |
|
T99 |
23 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
655 |
1 |
|
|
T38 |
14 |
|
T98 |
30 |
|
T99 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1141 |
1 |
|
|
T38 |
38 |
|
T98 |
33 |
|
T99 |
22 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
675 |
1 |
|
|
T38 |
10 |
|
T98 |
27 |
|
T99 |
9 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1116 |
1 |
|
|
T38 |
34 |
|
T98 |
39 |
|
T99 |
22 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
655 |
1 |
|
|
T38 |
14 |
|
T98 |
30 |
|
T99 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1116 |
1 |
|
|
T38 |
38 |
|
T98 |
31 |
|
T99 |
21 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
675 |
1 |
|
|
T38 |
10 |
|
T98 |
27 |
|
T99 |
9 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1087 |
1 |
|
|
T38 |
34 |
|
T98 |
35 |
|
T99 |
22 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
654 |
1 |
|
|
T38 |
14 |
|
T98 |
30 |
|
T99 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1088 |
1 |
|
|
T38 |
38 |
|
T98 |
30 |
|
T99 |
21 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
675 |
1 |
|
|
T38 |
10 |
|
T98 |
27 |
|
T99 |
9 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1056 |
1 |
|
|
T38 |
32 |
|
T98 |
34 |
|
T99 |
22 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56997 |
1 |
|
|
T38 |
2676 |
|
T98 |
1110 |
|
T99 |
674 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44501 |
1 |
|
|
T38 |
580 |
|
T98 |
2520 |
|
T99 |
1088 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[1] |
auto[0] |
52068 |
1 |
|
|
T38 |
1162 |
|
T98 |
1257 |
|
T99 |
1236 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[1] |
auto[1] |
38746 |
1 |
|
|
T38 |
565 |
|
T98 |
1141 |
|
T99 |
466 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T38 |
24 |
|
T98 |
17 |
|
T99 |
11 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1448 |
1 |
|
|
T38 |
21 |
|
T98 |
59 |
|
T99 |
19 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
668 |
1 |
|
|
T38 |
19 |
|
T98 |
17 |
|
T99 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1456 |
1 |
|
|
T38 |
25 |
|
T98 |
59 |
|
T99 |
15 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T38 |
24 |
|
T98 |
17 |
|
T99 |
11 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1425 |
1 |
|
|
T38 |
21 |
|
T98 |
58 |
|
T99 |
19 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
668 |
1 |
|
|
T38 |
19 |
|
T98 |
17 |
|
T99 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1426 |
1 |
|
|
T38 |
25 |
|
T98 |
58 |
|
T99 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T38 |
24 |
|
T98 |
17 |
|
T99 |
11 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1389 |
1 |
|
|
T38 |
21 |
|
T98 |
57 |
|
T99 |
19 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
667 |
1 |
|
|
T38 |
19 |
|
T98 |
17 |
|
T99 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1398 |
1 |
|
|
T38 |
24 |
|
T98 |
56 |
|
T99 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T38 |
24 |
|
T98 |
17 |
|
T99 |
11 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1357 |
1 |
|
|
T38 |
20 |
|
T98 |
55 |
|
T99 |
19 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
667 |
1 |
|
|
T38 |
19 |
|
T98 |
17 |
|
T99 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1374 |
1 |
|
|
T38 |
24 |
|
T98 |
55 |
|
T99 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
679 |
1 |
|
|
T38 |
24 |
|
T98 |
17 |
|
T99 |
10 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1330 |
1 |
|
|
T38 |
20 |
|
T98 |
54 |
|
T99 |
20 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T38 |
19 |
|
T98 |
17 |
|
T99 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1357 |
1 |
|
|
T38 |
24 |
|
T98 |
54 |
|
T99 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
679 |
1 |
|
|
T38 |
24 |
|
T98 |
17 |
|
T99 |
10 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1301 |
1 |
|
|
T38 |
20 |
|
T98 |
53 |
|
T99 |
20 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T38 |
19 |
|
T98 |
17 |
|
T99 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1337 |
1 |
|
|
T38 |
24 |
|
T98 |
51 |
|
T99 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
676 |
1 |
|
|
T38 |
24 |
|
T98 |
17 |
|
T99 |
10 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1279 |
1 |
|
|
T38 |
19 |
|
T98 |
52 |
|
T99 |
20 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
662 |
1 |
|
|
T38 |
19 |
|
T98 |
17 |
|
T99 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1317 |
1 |
|
|
T38 |
23 |
|
T98 |
51 |
|
T99 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
676 |
1 |
|
|
T38 |
24 |
|
T98 |
17 |
|
T99 |
10 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1247 |
1 |
|
|
T38 |
19 |
|
T98 |
50 |
|
T99 |
20 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
662 |
1 |
|
|
T38 |
19 |
|
T98 |
17 |
|
T99 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1288 |
1 |
|
|
T38 |
23 |
|
T98 |
51 |
|
T99 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
673 |
1 |
|
|
T38 |
24 |
|
T98 |
17 |
|
T99 |
10 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1217 |
1 |
|
|
T38 |
19 |
|
T98 |
49 |
|
T99 |
19 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
655 |
1 |
|
|
T38 |
19 |
|
T98 |
17 |
|
T99 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1254 |
1 |
|
|
T38 |
22 |
|
T98 |
50 |
|
T99 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
673 |
1 |
|
|
T38 |
24 |
|
T98 |
17 |
|
T99 |
10 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1193 |
1 |
|
|
T38 |
19 |
|
T98 |
49 |
|
T99 |
19 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
655 |
1 |
|
|
T38 |
19 |
|
T98 |
17 |
|
T99 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1222 |
1 |
|
|
T38 |
22 |
|
T98 |
47 |
|
T99 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T38 |
24 |
|
T98 |
17 |
|
T99 |
10 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1159 |
1 |
|
|
T38 |
19 |
|
T98 |
47 |
|
T99 |
18 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
654 |
1 |
|
|
T38 |
19 |
|
T98 |
17 |
|
T99 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1197 |
1 |
|
|
T38 |
21 |
|
T98 |
46 |
|
T99 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T38 |
24 |
|
T98 |
17 |
|
T99 |
10 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1138 |
1 |
|
|
T38 |
19 |
|
T98 |
46 |
|
T99 |
18 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
654 |
1 |
|
|
T38 |
19 |
|
T98 |
17 |
|
T99 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1171 |
1 |
|
|
T38 |
21 |
|
T98 |
45 |
|
T99 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T38 |
24 |
|
T98 |
17 |
|
T99 |
10 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1110 |
1 |
|
|
T38 |
19 |
|
T98 |
45 |
|
T99 |
18 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
654 |
1 |
|
|
T38 |
19 |
|
T98 |
17 |
|
T99 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1140 |
1 |
|
|
T38 |
21 |
|
T98 |
45 |
|
T99 |
12 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T38 |
24 |
|
T98 |
17 |
|
T99 |
10 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1075 |
1 |
|
|
T38 |
19 |
|
T98 |
43 |
|
T99 |
18 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
654 |
1 |
|
|
T38 |
19 |
|
T98 |
17 |
|
T99 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1111 |
1 |
|
|
T38 |
21 |
|
T98 |
44 |
|
T99 |
12 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T38 |
24 |
|
T98 |
17 |
|
T99 |
10 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1042 |
1 |
|
|
T38 |
18 |
|
T98 |
41 |
|
T99 |
16 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
654 |
1 |
|
|
T38 |
19 |
|
T98 |
17 |
|
T99 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1080 |
1 |
|
|
T38 |
19 |
|
T98 |
44 |
|
T99 |
12 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[0] |
auto[0] |
55612 |
1 |
|
|
T38 |
1918 |
|
T98 |
2975 |
|
T99 |
643 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44397 |
1 |
|
|
T38 |
756 |
|
T98 |
653 |
|
T99 |
1417 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[1] |
auto[0] |
52623 |
1 |
|
|
T38 |
947 |
|
T98 |
1934 |
|
T99 |
398 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[1] |
auto[1] |
39065 |
1 |
|
|
T38 |
1124 |
|
T98 |
803 |
|
T99 |
745 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
634 |
1 |
|
|
T38 |
14 |
|
T98 |
29 |
|
T99 |
13 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1528 |
1 |
|
|
T38 |
43 |
|
T98 |
33 |
|
T99 |
29 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
618 |
1 |
|
|
T38 |
12 |
|
T98 |
29 |
|
T99 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1533 |
1 |
|
|
T38 |
44 |
|
T98 |
33 |
|
T99 |
32 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
634 |
1 |
|
|
T38 |
14 |
|
T98 |
29 |
|
T99 |
13 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1506 |
1 |
|
|
T38 |
42 |
|
T98 |
33 |
|
T99 |
29 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
618 |
1 |
|
|
T38 |
12 |
|
T98 |
29 |
|
T99 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1505 |
1 |
|
|
T38 |
44 |
|
T98 |
30 |
|
T99 |
31 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
634 |
1 |
|
|
T38 |
14 |
|
T98 |
29 |
|
T99 |
13 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1480 |
1 |
|
|
T38 |
41 |
|
T98 |
33 |
|
T99 |
29 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
618 |
1 |
|
|
T38 |
12 |
|
T98 |
29 |
|
T99 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1479 |
1 |
|
|
T38 |
43 |
|
T98 |
29 |
|
T99 |
30 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
634 |
1 |
|
|
T38 |
14 |
|
T98 |
29 |
|
T99 |
13 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1454 |
1 |
|
|
T38 |
39 |
|
T98 |
32 |
|
T99 |
29 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
618 |
1 |
|
|
T38 |
12 |
|
T98 |
29 |
|
T99 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1451 |
1 |
|
|
T38 |
42 |
|
T98 |
27 |
|
T99 |
29 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
629 |
1 |
|
|
T38 |
14 |
|
T98 |
29 |
|
T99 |
12 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1424 |
1 |
|
|
T38 |
39 |
|
T98 |
32 |
|
T99 |
30 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
611 |
1 |
|
|
T38 |
12 |
|
T98 |
29 |
|
T99 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1425 |
1 |
|
|
T38 |
41 |
|
T98 |
26 |
|
T99 |
27 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
629 |
1 |
|
|
T38 |
14 |
|
T98 |
29 |
|
T99 |
12 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1406 |
1 |
|
|
T38 |
39 |
|
T98 |
32 |
|
T99 |
30 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
611 |
1 |
|
|
T38 |
12 |
|
T98 |
29 |
|
T99 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1394 |
1 |
|
|
T38 |
41 |
|
T98 |
26 |
|
T99 |
27 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
625 |
1 |
|
|
T38 |
13 |
|
T98 |
29 |
|
T99 |
12 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1370 |
1 |
|
|
T38 |
38 |
|
T98 |
30 |
|
T99 |
29 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
608 |
1 |
|
|
T38 |
12 |
|
T98 |
29 |
|
T99 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1368 |
1 |
|
|
T38 |
40 |
|
T98 |
26 |
|
T99 |
26 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
625 |
1 |
|
|
T38 |
13 |
|
T98 |
29 |
|
T99 |
12 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1349 |
1 |
|
|
T38 |
36 |
|
T98 |
30 |
|
T99 |
29 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
608 |
1 |
|
|
T38 |
12 |
|
T98 |
29 |
|
T99 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1334 |
1 |
|
|
T38 |
40 |
|
T98 |
24 |
|
T99 |
23 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
621 |
1 |
|
|
T38 |
13 |
|
T98 |
29 |
|
T99 |
12 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1314 |
1 |
|
|
T38 |
36 |
|
T98 |
29 |
|
T99 |
28 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
606 |
1 |
|
|
T38 |
12 |
|
T98 |
28 |
|
T99 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1305 |
1 |
|
|
T38 |
40 |
|
T98 |
24 |
|
T99 |
23 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
621 |
1 |
|
|
T38 |
13 |
|
T98 |
29 |
|
T99 |
12 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1284 |
1 |
|
|
T38 |
36 |
|
T98 |
27 |
|
T99 |
27 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
606 |
1 |
|
|
T38 |
12 |
|
T98 |
28 |
|
T99 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1272 |
1 |
|
|
T38 |
39 |
|
T98 |
24 |
|
T99 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
619 |
1 |
|
|
T38 |
13 |
|
T98 |
29 |
|
T99 |
12 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1259 |
1 |
|
|
T38 |
34 |
|
T98 |
26 |
|
T99 |
27 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
604 |
1 |
|
|
T38 |
12 |
|
T98 |
28 |
|
T99 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1240 |
1 |
|
|
T38 |
39 |
|
T98 |
24 |
|
T99 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
619 |
1 |
|
|
T38 |
13 |
|
T98 |
29 |
|
T99 |
12 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1215 |
1 |
|
|
T38 |
31 |
|
T98 |
25 |
|
T99 |
27 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
604 |
1 |
|
|
T38 |
12 |
|
T98 |
28 |
|
T99 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1207 |
1 |
|
|
T38 |
38 |
|
T98 |
24 |
|
T99 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
618 |
1 |
|
|
T38 |
13 |
|
T98 |
29 |
|
T99 |
12 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1185 |
1 |
|
|
T38 |
31 |
|
T98 |
25 |
|
T99 |
26 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
603 |
1 |
|
|
T38 |
12 |
|
T98 |
28 |
|
T99 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1172 |
1 |
|
|
T38 |
37 |
|
T98 |
24 |
|
T99 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
618 |
1 |
|
|
T38 |
13 |
|
T98 |
29 |
|
T99 |
12 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1160 |
1 |
|
|
T38 |
29 |
|
T98 |
25 |
|
T99 |
26 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
603 |
1 |
|
|
T38 |
12 |
|
T98 |
28 |
|
T99 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1138 |
1 |
|
|
T38 |
33 |
|
T98 |
24 |
|
T99 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
617 |
1 |
|
|
T38 |
13 |
|
T98 |
29 |
|
T99 |
12 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1130 |
1 |
|
|
T38 |
27 |
|
T98 |
23 |
|
T99 |
26 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
603 |
1 |
|
|
T38 |
12 |
|
T98 |
28 |
|
T99 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1102 |
1 |
|
|
T38 |
32 |
|
T98 |
24 |
|
T99 |
20 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[0] |
auto[0] |
55358 |
1 |
|
|
T38 |
1200 |
|
T98 |
1195 |
|
T99 |
1488 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[0] |
auto[1] |
40469 |
1 |
|
|
T38 |
1769 |
|
T98 |
1260 |
|
T99 |
599 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[1] |
auto[0] |
53731 |
1 |
|
|
T38 |
1198 |
|
T98 |
1059 |
|
T99 |
674 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[1] |
auto[1] |
42452 |
1 |
|
|
T38 |
715 |
|
T98 |
2406 |
|
T99 |
555 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
649 |
1 |
|
|
T38 |
20 |
|
T98 |
17 |
|
T99 |
12 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1506 |
1 |
|
|
T38 |
30 |
|
T98 |
63 |
|
T99 |
26 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
630 |
1 |
|
|
T38 |
18 |
|
T98 |
16 |
|
T99 |
10 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1519 |
1 |
|
|
T38 |
31 |
|
T98 |
65 |
|
T99 |
27 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
649 |
1 |
|
|
T38 |
20 |
|
T98 |
17 |
|
T99 |
12 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1471 |
1 |
|
|
T38 |
29 |
|
T98 |
61 |
|
T99 |
25 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
630 |
1 |
|
|
T38 |
18 |
|
T98 |
16 |
|
T99 |
10 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1497 |
1 |
|
|
T38 |
31 |
|
T98 |
65 |
|
T99 |
25 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
648 |
1 |
|
|
T38 |
19 |
|
T98 |
17 |
|
T99 |
12 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1441 |
1 |
|
|
T38 |
29 |
|
T98 |
61 |
|
T99 |
24 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
629 |
1 |
|
|
T38 |
18 |
|
T98 |
16 |
|
T99 |
10 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1467 |
1 |
|
|
T38 |
31 |
|
T98 |
65 |
|
T99 |
24 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
648 |
1 |
|
|
T38 |
19 |
|
T98 |
17 |
|
T99 |
12 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1412 |
1 |
|
|
T38 |
28 |
|
T98 |
60 |
|
T99 |
24 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
629 |
1 |
|
|
T38 |
18 |
|
T98 |
16 |
|
T99 |
10 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1436 |
1 |
|
|
T38 |
30 |
|
T98 |
61 |
|
T99 |
23 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
640 |
1 |
|
|
T38 |
19 |
|
T98 |
17 |
|
T99 |
11 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1388 |
1 |
|
|
T38 |
28 |
|
T98 |
58 |
|
T99 |
25 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
627 |
1 |
|
|
T38 |
18 |
|
T98 |
16 |
|
T99 |
10 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1405 |
1 |
|
|
T38 |
30 |
|
T98 |
61 |
|
T99 |
23 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
640 |
1 |
|
|
T38 |
19 |
|
T98 |
17 |
|
T99 |
11 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1364 |
1 |
|
|
T38 |
28 |
|
T98 |
56 |
|
T99 |
24 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
627 |
1 |
|
|
T38 |
18 |
|
T98 |
16 |
|
T99 |
10 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1380 |
1 |
|
|
T38 |
30 |
|
T98 |
59 |
|
T99 |
23 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
635 |
1 |
|
|
T38 |
19 |
|
T98 |
17 |
|
T99 |
11 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1328 |
1 |
|
|
T38 |
26 |
|
T98 |
55 |
|
T99 |
24 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
625 |
1 |
|
|
T38 |
18 |
|
T98 |
16 |
|
T99 |
10 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1343 |
1 |
|
|
T38 |
30 |
|
T98 |
57 |
|
T99 |
22 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
635 |
1 |
|
|
T38 |
19 |
|
T98 |
17 |
|
T99 |
11 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1307 |
1 |
|
|
T38 |
26 |
|
T98 |
54 |
|
T99 |
24 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
625 |
1 |
|
|
T38 |
18 |
|
T98 |
16 |
|
T99 |
10 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1323 |
1 |
|
|
T38 |
28 |
|
T98 |
56 |
|
T99 |
21 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
631 |
1 |
|
|
T38 |
19 |
|
T98 |
17 |
|
T99 |
11 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1270 |
1 |
|
|
T38 |
26 |
|
T98 |
49 |
|
T99 |
23 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
620 |
1 |
|
|
T38 |
18 |
|
T98 |
16 |
|
T99 |
10 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1292 |
1 |
|
|
T38 |
28 |
|
T98 |
53 |
|
T99 |
21 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
631 |
1 |
|
|
T38 |
19 |
|
T98 |
17 |
|
T99 |
11 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1232 |
1 |
|
|
T38 |
25 |
|
T98 |
49 |
|
T99 |
23 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
620 |
1 |
|
|
T38 |
18 |
|
T98 |
16 |
|
T99 |
10 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1267 |
1 |
|
|
T38 |
27 |
|
T98 |
53 |
|
T99 |
21 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
630 |
1 |
|
|
T38 |
19 |
|
T98 |
17 |
|
T99 |
11 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1213 |
1 |
|
|
T38 |
25 |
|
T98 |
49 |
|
T99 |
23 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
617 |
1 |
|
|
T38 |
18 |
|
T98 |
16 |
|
T99 |
10 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1241 |
1 |
|
|
T38 |
27 |
|
T98 |
51 |
|
T99 |
21 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
630 |
1 |
|
|
T38 |
19 |
|
T98 |
17 |
|
T99 |
11 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1180 |
1 |
|
|
T38 |
25 |
|
T98 |
47 |
|
T99 |
22 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
617 |
1 |
|
|
T38 |
18 |
|
T98 |
16 |
|
T99 |
10 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1204 |
1 |
|
|
T38 |
27 |
|
T98 |
49 |
|
T99 |
19 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
630 |
1 |
|
|
T38 |
19 |
|
T98 |
17 |
|
T99 |
11 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1153 |
1 |
|
|
T38 |
24 |
|
T98 |
47 |
|
T99 |
22 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
617 |
1 |
|
|
T38 |
18 |
|
T98 |
16 |
|
T99 |
10 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1167 |
1 |
|
|
T38 |
27 |
|
T98 |
48 |
|
T99 |
19 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
630 |
1 |
|
|
T38 |
19 |
|
T98 |
17 |
|
T99 |
11 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1125 |
1 |
|
|
T38 |
21 |
|
T98 |
46 |
|
T99 |
22 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
617 |
1 |
|
|
T38 |
18 |
|
T98 |
16 |
|
T99 |
10 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1140 |
1 |
|
|
T38 |
27 |
|
T98 |
48 |
|
T99 |
19 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
630 |
1 |
|
|
T38 |
19 |
|
T98 |
17 |
|
T99 |
11 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1100 |
1 |
|
|
T38 |
20 |
|
T98 |
45 |
|
T99 |
22 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
617 |
1 |
|
|
T38 |
18 |
|
T98 |
16 |
|
T99 |
10 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1118 |
1 |
|
|
T38 |
27 |
|
T98 |
46 |
|
T99 |
19 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56625 |
1 |
|
|
T38 |
780 |
|
T98 |
2683 |
|
T99 |
1741 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44920 |
1 |
|
|
T38 |
1007 |
|
T98 |
874 |
|
T99 |
540 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[1] |
auto[0] |
49624 |
1 |
|
|
T38 |
628 |
|
T98 |
1686 |
|
T99 |
526 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[1] |
auto[1] |
42130 |
1 |
|
|
T38 |
2225 |
|
T98 |
1010 |
|
T99 |
535 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
637 |
1 |
|
|
T38 |
14 |
|
T98 |
26 |
|
T99 |
12 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1474 |
1 |
|
|
T38 |
46 |
|
T98 |
40 |
|
T99 |
23 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
638 |
1 |
|
|
T38 |
11 |
|
T98 |
28 |
|
T99 |
9 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1461 |
1 |
|
|
T38 |
49 |
|
T98 |
38 |
|
T99 |
25 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
637 |
1 |
|
|
T38 |
14 |
|
T98 |
26 |
|
T99 |
12 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1446 |
1 |
|
|
T38 |
43 |
|
T98 |
39 |
|
T99 |
23 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
638 |
1 |
|
|
T38 |
11 |
|
T98 |
28 |
|
T99 |
9 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1442 |
1 |
|
|
T38 |
48 |
|
T98 |
37 |
|
T99 |
25 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
637 |
1 |
|
|
T38 |
14 |
|
T98 |
26 |
|
T99 |
12 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1415 |
1 |
|
|
T38 |
42 |
|
T98 |
37 |
|
T99 |
23 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
638 |
1 |
|
|
T38 |
11 |
|
T98 |
28 |
|
T99 |
9 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1413 |
1 |
|
|
T38 |
48 |
|
T98 |
37 |
|
T99 |
25 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
637 |
1 |
|
|
T38 |
14 |
|
T98 |
26 |
|
T99 |
12 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1384 |
1 |
|
|
T38 |
40 |
|
T98 |
37 |
|
T99 |
23 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
638 |
1 |
|
|
T38 |
11 |
|
T98 |
28 |
|
T99 |
9 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1382 |
1 |
|
|
T38 |
48 |
|
T98 |
34 |
|
T99 |
25 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
631 |
1 |
|
|
T38 |
14 |
|
T98 |
26 |
|
T99 |
11 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1358 |
1 |
|
|
T38 |
40 |
|
T98 |
36 |
|
T99 |
24 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
636 |
1 |
|
|
T38 |
11 |
|
T98 |
28 |
|
T99 |
9 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1344 |
1 |
|
|
T38 |
45 |
|
T98 |
33 |
|
T99 |
24 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
631 |
1 |
|
|
T38 |
14 |
|
T98 |
26 |
|
T99 |
11 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1323 |
1 |
|
|
T38 |
40 |
|
T98 |
34 |
|
T99 |
23 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
636 |
1 |
|
|
T38 |
11 |
|
T98 |
28 |
|
T99 |
9 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1321 |
1 |
|
|
T38 |
44 |
|
T98 |
33 |
|
T99 |
24 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
627 |
1 |
|
|
T38 |
14 |
|
T98 |
26 |
|
T99 |
11 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1288 |
1 |
|
|
T38 |
39 |
|
T98 |
34 |
|
T99 |
23 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
633 |
1 |
|
|
T38 |
11 |
|
T98 |
28 |
|
T99 |
9 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1300 |
1 |
|
|
T38 |
44 |
|
T98 |
33 |
|
T99 |
23 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
627 |
1 |
|
|
T38 |
14 |
|
T98 |
26 |
|
T99 |
11 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1250 |
1 |
|
|
T38 |
39 |
|
T98 |
33 |
|
T99 |
23 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
633 |
1 |
|
|
T38 |
11 |
|
T98 |
28 |
|
T99 |
9 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1275 |
1 |
|
|
T38 |
44 |
|
T98 |
33 |
|
T99 |
23 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
622 |
1 |
|
|
T38 |
14 |
|
T98 |
26 |
|
T99 |
11 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1215 |
1 |
|
|
T38 |
39 |
|
T98 |
32 |
|
T99 |
23 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
630 |
1 |
|
|
T38 |
11 |
|
T98 |
28 |
|
T99 |
9 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1244 |
1 |
|
|
T38 |
43 |
|
T98 |
33 |
|
T99 |
22 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
622 |
1 |
|
|
T38 |
14 |
|
T98 |
26 |
|
T99 |
11 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1193 |
1 |
|
|
T38 |
38 |
|
T98 |
30 |
|
T99 |
23 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
630 |
1 |
|
|
T38 |
11 |
|
T98 |
28 |
|
T99 |
9 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1219 |
1 |
|
|
T38 |
41 |
|
T98 |
33 |
|
T99 |
22 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
621 |
1 |
|
|
T38 |
14 |
|
T98 |
26 |
|
T99 |
11 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1166 |
1 |
|
|
T38 |
38 |
|
T98 |
27 |
|
T99 |
23 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
629 |
1 |
|
|
T38 |
11 |
|
T98 |
28 |
|
T99 |
9 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1191 |
1 |
|
|
T38 |
41 |
|
T98 |
33 |
|
T99 |
20 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
621 |
1 |
|
|
T38 |
14 |
|
T98 |
26 |
|
T99 |
11 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1147 |
1 |
|
|
T38 |
38 |
|
T98 |
27 |
|
T99 |
22 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
629 |
1 |
|
|
T38 |
11 |
|
T98 |
28 |
|
T99 |
9 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1161 |
1 |
|
|
T38 |
40 |
|
T98 |
32 |
|
T99 |
19 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
621 |
1 |
|
|
T38 |
14 |
|
T98 |
26 |
|
T99 |
11 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1117 |
1 |
|
|
T38 |
38 |
|
T98 |
27 |
|
T99 |
22 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
628 |
1 |
|
|
T38 |
11 |
|
T98 |
28 |
|
T99 |
9 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1137 |
1 |
|
|
T38 |
39 |
|
T98 |
32 |
|
T99 |
18 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
621 |
1 |
|
|
T38 |
14 |
|
T98 |
26 |
|
T99 |
11 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1085 |
1 |
|
|
T38 |
37 |
|
T98 |
26 |
|
T99 |
21 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
628 |
1 |
|
|
T38 |
11 |
|
T98 |
28 |
|
T99 |
9 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1105 |
1 |
|
|
T38 |
39 |
|
T98 |
32 |
|
T99 |
18 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
620 |
1 |
|
|
T38 |
14 |
|
T98 |
26 |
|
T99 |
11 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1061 |
1 |
|
|
T38 |
37 |
|
T98 |
26 |
|
T99 |
21 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
628 |
1 |
|
|
T38 |
11 |
|
T98 |
28 |
|
T99 |
9 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1082 |
1 |
|
|
T38 |
38 |
|
T98 |
31 |
|
T99 |
16 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[0] |
auto[0] |
47741 |
1 |
|
|
T38 |
993 |
|
T98 |
1177 |
|
T99 |
1367 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[0] |
auto[1] |
43929 |
1 |
|
|
T38 |
795 |
|
T98 |
1199 |
|
T99 |
585 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[1] |
auto[0] |
53254 |
1 |
|
|
T38 |
2037 |
|
T98 |
2512 |
|
T99 |
682 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46508 |
1 |
|
|
T38 |
806 |
|
T98 |
1364 |
|
T99 |
700 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
610 |
1 |
|
|
T38 |
15 |
|
T98 |
17 |
|
T99 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1568 |
1 |
|
|
T38 |
45 |
|
T98 |
50 |
|
T99 |
27 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
620 |
1 |
|
|
T38 |
11 |
|
T98 |
20 |
|
T99 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1554 |
1 |
|
|
T38 |
49 |
|
T98 |
48 |
|
T99 |
26 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
610 |
1 |
|
|
T38 |
15 |
|
T98 |
17 |
|
T99 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1538 |
1 |
|
|
T38 |
45 |
|
T98 |
49 |
|
T99 |
26 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
620 |
1 |
|
|
T38 |
11 |
|
T98 |
20 |
|
T99 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1533 |
1 |
|
|
T38 |
49 |
|
T98 |
45 |
|
T99 |
26 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
609 |
1 |
|
|
T38 |
14 |
|
T98 |
17 |
|
T99 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1492 |
1 |
|
|
T38 |
45 |
|
T98 |
47 |
|
T99 |
25 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
618 |
1 |
|
|
T38 |
11 |
|
T98 |
20 |
|
T99 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1506 |
1 |
|
|
T38 |
48 |
|
T98 |
45 |
|
T99 |
26 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
609 |
1 |
|
|
T38 |
14 |
|
T98 |
17 |
|
T99 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1454 |
1 |
|
|
T38 |
45 |
|
T98 |
46 |
|
T99 |
25 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
618 |
1 |
|
|
T38 |
11 |
|
T98 |
20 |
|
T99 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1477 |
1 |
|
|
T38 |
46 |
|
T98 |
45 |
|
T99 |
26 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
603 |
1 |
|
|
T38 |
14 |
|
T98 |
17 |
|
T99 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1431 |
1 |
|
|
T38 |
44 |
|
T98 |
44 |
|
T99 |
25 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
611 |
1 |
|
|
T38 |
11 |
|
T98 |
20 |
|
T99 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1450 |
1 |
|
|
T38 |
45 |
|
T98 |
43 |
|
T99 |
24 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
603 |
1 |
|
|
T38 |
14 |
|
T98 |
17 |
|
T99 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1402 |
1 |
|
|
T38 |
44 |
|
T98 |
43 |
|
T99 |
24 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
611 |
1 |
|
|
T38 |
11 |
|
T98 |
20 |
|
T99 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1421 |
1 |
|
|
T38 |
45 |
|
T98 |
42 |
|
T99 |
24 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
598 |
1 |
|
|
T38 |
14 |
|
T98 |
17 |
|
T99 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1371 |
1 |
|
|
T38 |
42 |
|
T98 |
43 |
|
T99 |
24 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
611 |
1 |
|
|
T38 |
11 |
|
T98 |
20 |
|
T99 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1395 |
1 |
|
|
T38 |
45 |
|
T98 |
42 |
|
T99 |
24 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
598 |
1 |
|
|
T38 |
14 |
|
T98 |
17 |
|
T99 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1341 |
1 |
|
|
T38 |
41 |
|
T98 |
41 |
|
T99 |
24 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
611 |
1 |
|
|
T38 |
11 |
|
T98 |
20 |
|
T99 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1381 |
1 |
|
|
T38 |
43 |
|
T98 |
42 |
|
T99 |
24 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
594 |
1 |
|
|
T38 |
14 |
|
T98 |
17 |
|
T99 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1310 |
1 |
|
|
T38 |
40 |
|
T98 |
39 |
|
T99 |
24 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
609 |
1 |
|
|
T38 |
11 |
|
T98 |
20 |
|
T99 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1348 |
1 |
|
|
T38 |
43 |
|
T98 |
40 |
|
T99 |
23 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
594 |
1 |
|
|
T38 |
14 |
|
T98 |
17 |
|
T99 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1277 |
1 |
|
|
T38 |
39 |
|
T98 |
39 |
|
T99 |
24 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
609 |
1 |
|
|
T38 |
11 |
|
T98 |
20 |
|
T99 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1322 |
1 |
|
|
T38 |
43 |
|
T98 |
40 |
|
T99 |
23 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
592 |
1 |
|
|
T38 |
14 |
|
T98 |
17 |
|
T99 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1239 |
1 |
|
|
T38 |
37 |
|
T98 |
39 |
|
T99 |
23 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
609 |
1 |
|
|
T38 |
11 |
|
T98 |
20 |
|
T99 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1298 |
1 |
|
|
T38 |
40 |
|
T98 |
39 |
|
T99 |
23 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
592 |
1 |
|
|
T38 |
14 |
|
T98 |
17 |
|
T99 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1211 |
1 |
|
|
T38 |
37 |
|
T98 |
39 |
|
T99 |
22 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
609 |
1 |
|
|
T38 |
11 |
|
T98 |
20 |
|
T99 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1256 |
1 |
|
|
T38 |
37 |
|
T98 |
39 |
|
T99 |
23 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
591 |
1 |
|
|
T38 |
14 |
|
T98 |
17 |
|
T99 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1175 |
1 |
|
|
T38 |
37 |
|
T98 |
35 |
|
T99 |
20 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
609 |
1 |
|
|
T38 |
11 |
|
T98 |
20 |
|
T99 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1226 |
1 |
|
|
T38 |
37 |
|
T98 |
38 |
|
T99 |
22 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
591 |
1 |
|
|
T38 |
14 |
|
T98 |
17 |
|
T99 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1148 |
1 |
|
|
T38 |
37 |
|
T98 |
35 |
|
T99 |
20 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
609 |
1 |
|
|
T38 |
11 |
|
T98 |
20 |
|
T99 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1198 |
1 |
|
|
T38 |
36 |
|
T98 |
37 |
|
T99 |
22 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
591 |
1 |
|
|
T38 |
14 |
|
T98 |
17 |
|
T99 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1114 |
1 |
|
|
T38 |
36 |
|
T98 |
35 |
|
T99 |
20 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
609 |
1 |
|
|
T38 |
11 |
|
T98 |
20 |
|
T99 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1166 |
1 |
|
|
T38 |
32 |
|
T98 |
36 |
|
T99 |
22 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[0] |
auto[0] |
51331 |
1 |
|
|
T38 |
834 |
|
T98 |
885 |
|
T99 |
674 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[0] |
auto[1] |
43622 |
1 |
|
|
T38 |
938 |
|
T98 |
1710 |
|
T99 |
1484 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[1] |
auto[0] |
52718 |
1 |
|
|
T38 |
2205 |
|
T98 |
2364 |
|
T99 |
417 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[1] |
auto[1] |
43225 |
1 |
|
|
T38 |
739 |
|
T98 |
1188 |
|
T99 |
649 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
653 |
1 |
|
|
T38 |
16 |
|
T98 |
14 |
|
T99 |
9 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1552 |
1 |
|
|
T38 |
42 |
|
T98 |
56 |
|
T99 |
32 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
635 |
1 |
|
|
T38 |
17 |
|
T98 |
16 |
|
T99 |
8 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1566 |
1 |
|
|
T38 |
41 |
|
T98 |
55 |
|
T99 |
32 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
653 |
1 |
|
|
T38 |
16 |
|
T98 |
14 |
|
T99 |
9 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1518 |
1 |
|
|
T38 |
41 |
|
T98 |
56 |
|
T99 |
31 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
635 |
1 |
|
|
T38 |
17 |
|
T98 |
16 |
|
T99 |
8 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1531 |
1 |
|
|
T38 |
41 |
|
T98 |
54 |
|
T99 |
32 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
651 |
1 |
|
|
T38 |
15 |
|
T98 |
14 |
|
T99 |
9 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1490 |
1 |
|
|
T38 |
42 |
|
T98 |
54 |
|
T99 |
31 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
635 |
1 |
|
|
T38 |
17 |
|
T98 |
16 |
|
T99 |
8 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1493 |
1 |
|
|
T38 |
40 |
|
T98 |
54 |
|
T99 |
32 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
651 |
1 |
|
|
T38 |
15 |
|
T98 |
14 |
|
T99 |
9 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1456 |
1 |
|
|
T38 |
40 |
|
T98 |
54 |
|
T99 |
31 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
635 |
1 |
|
|
T38 |
17 |
|
T98 |
16 |
|
T99 |
8 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1457 |
1 |
|
|
T38 |
36 |
|
T98 |
52 |
|
T99 |
31 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
644 |
1 |
|
|
T38 |
15 |
|
T98 |
14 |
|
T99 |
9 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1435 |
1 |
|
|
T38 |
40 |
|
T98 |
53 |
|
T99 |
29 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
631 |
1 |
|
|
T38 |
17 |
|
T98 |
16 |
|
T99 |
8 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1427 |
1 |
|
|
T38 |
34 |
|
T98 |
50 |
|
T99 |
30 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
644 |
1 |
|
|
T38 |
15 |
|
T98 |
14 |
|
T99 |
9 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1410 |
1 |
|
|
T38 |
40 |
|
T98 |
53 |
|
T99 |
27 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
631 |
1 |
|
|
T38 |
17 |
|
T98 |
16 |
|
T99 |
8 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1393 |
1 |
|
|
T38 |
32 |
|
T98 |
50 |
|
T99 |
30 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
640 |
1 |
|
|
T38 |
15 |
|
T98 |
14 |
|
T99 |
9 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1384 |
1 |
|
|
T38 |
40 |
|
T98 |
53 |
|
T99 |
27 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
629 |
1 |
|
|
T38 |
17 |
|
T98 |
16 |
|
T99 |
8 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1363 |
1 |
|
|
T38 |
32 |
|
T98 |
49 |
|
T99 |
30 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
640 |
1 |
|
|
T38 |
15 |
|
T98 |
14 |
|
T99 |
9 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1358 |
1 |
|
|
T38 |
40 |
|
T98 |
53 |
|
T99 |
26 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
629 |
1 |
|
|
T38 |
17 |
|
T98 |
16 |
|
T99 |
8 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1334 |
1 |
|
|
T38 |
31 |
|
T98 |
47 |
|
T99 |
30 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
637 |
1 |
|
|
T38 |
15 |
|
T98 |
14 |
|
T99 |
8 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1329 |
1 |
|
|
T38 |
40 |
|
T98 |
53 |
|
T99 |
26 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
625 |
1 |
|
|
T38 |
17 |
|
T98 |
15 |
|
T99 |
8 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1296 |
1 |
|
|
T38 |
31 |
|
T98 |
41 |
|
T99 |
29 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
637 |
1 |
|
|
T38 |
15 |
|
T98 |
14 |
|
T99 |
8 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1301 |
1 |
|
|
T38 |
40 |
|
T98 |
52 |
|
T99 |
24 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
625 |
1 |
|
|
T38 |
17 |
|
T98 |
15 |
|
T99 |
8 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1262 |
1 |
|
|
T38 |
30 |
|
T98 |
41 |
|
T99 |
29 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
635 |
1 |
|
|
T38 |
15 |
|
T98 |
14 |
|
T99 |
8 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1268 |
1 |
|
|
T38 |
38 |
|
T98 |
52 |
|
T99 |
24 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
624 |
1 |
|
|
T38 |
17 |
|
T98 |
15 |
|
T99 |
8 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1236 |
1 |
|
|
T38 |
29 |
|
T98 |
39 |
|
T99 |
27 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
635 |
1 |
|
|
T38 |
15 |
|
T98 |
14 |
|
T99 |
8 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1242 |
1 |
|
|
T38 |
38 |
|
T98 |
50 |
|
T99 |
24 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
624 |
1 |
|
|
T38 |
17 |
|
T98 |
15 |
|
T99 |
8 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1200 |
1 |
|
|
T38 |
29 |
|
T98 |
39 |
|
T99 |
27 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
635 |
1 |
|
|
T38 |
15 |
|
T98 |
14 |
|
T99 |
8 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1209 |
1 |
|
|
T38 |
34 |
|
T98 |
48 |
|
T99 |
24 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
624 |
1 |
|
|
T38 |
17 |
|
T98 |
15 |
|
T99 |
8 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1171 |
1 |
|
|
T38 |
25 |
|
T98 |
37 |
|
T99 |
27 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
635 |
1 |
|
|
T38 |
15 |
|
T98 |
14 |
|
T99 |
8 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1179 |
1 |
|
|
T38 |
34 |
|
T98 |
47 |
|
T99 |
24 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
624 |
1 |
|
|
T38 |
17 |
|
T98 |
15 |
|
T99 |
8 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1134 |
1 |
|
|
T38 |
24 |
|
T98 |
37 |
|
T99 |
27 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
635 |
1 |
|
|
T38 |
15 |
|
T98 |
14 |
|
T99 |
8 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1158 |
1 |
|
|
T38 |
34 |
|
T98 |
47 |
|
T99 |
24 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
624 |
1 |
|
|
T38 |
17 |
|
T98 |
15 |
|
T99 |
8 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1099 |
1 |
|
|
T38 |
24 |
|
T98 |
36 |
|
T99 |
26 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[0] |
auto[0] |
52267 |
1 |
|
|
T38 |
1216 |
|
T98 |
1609 |
|
T99 |
1543 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46263 |
1 |
|
|
T38 |
457 |
|
T98 |
648 |
|
T99 |
536 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[1] |
auto[0] |
51075 |
1 |
|
|
T38 |
966 |
|
T98 |
2789 |
|
T99 |
734 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[1] |
auto[1] |
42276 |
1 |
|
|
T38 |
2311 |
|
T98 |
980 |
|
T99 |
455 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
684 |
1 |
|
|
T38 |
18 |
|
T98 |
25 |
|
T99 |
16 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1467 |
1 |
|
|
T38 |
30 |
|
T98 |
48 |
|
T99 |
22 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
677 |
1 |
|
|
T38 |
18 |
|
T98 |
27 |
|
T99 |
13 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1467 |
1 |
|
|
T38 |
30 |
|
T98 |
47 |
|
T99 |
24 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
684 |
1 |
|
|
T38 |
18 |
|
T98 |
25 |
|
T99 |
16 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1448 |
1 |
|
|
T38 |
30 |
|
T98 |
46 |
|
T99 |
22 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
677 |
1 |
|
|
T38 |
18 |
|
T98 |
27 |
|
T99 |
13 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1434 |
1 |
|
|
T38 |
30 |
|
T98 |
47 |
|
T99 |
24 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
684 |
1 |
|
|
T38 |
18 |
|
T98 |
25 |
|
T99 |
16 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1425 |
1 |
|
|
T38 |
30 |
|
T98 |
46 |
|
T99 |
22 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
675 |
1 |
|
|
T38 |
18 |
|
T98 |
27 |
|
T99 |
13 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1402 |
1 |
|
|
T38 |
30 |
|
T98 |
46 |
|
T99 |
24 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
684 |
1 |
|
|
T38 |
18 |
|
T98 |
25 |
|
T99 |
16 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1396 |
1 |
|
|
T38 |
30 |
|
T98 |
43 |
|
T99 |
22 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
675 |
1 |
|
|
T38 |
18 |
|
T98 |
27 |
|
T99 |
13 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1372 |
1 |
|
|
T38 |
29 |
|
T98 |
46 |
|
T99 |
24 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
676 |
1 |
|
|
T38 |
18 |
|
T98 |
25 |
|
T99 |
15 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1374 |
1 |
|
|
T38 |
29 |
|
T98 |
41 |
|
T99 |
23 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
674 |
1 |
|
|
T38 |
18 |
|
T98 |
27 |
|
T99 |
13 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1344 |
1 |
|
|
T38 |
29 |
|
T98 |
46 |
|
T99 |
23 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
676 |
1 |
|
|
T38 |
18 |
|
T98 |
25 |
|
T99 |
15 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1340 |
1 |
|
|
T38 |
25 |
|
T98 |
40 |
|
T99 |
23 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
674 |
1 |
|
|
T38 |
18 |
|
T98 |
27 |
|
T99 |
13 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1316 |
1 |
|
|
T38 |
29 |
|
T98 |
44 |
|
T99 |
21 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
671 |
1 |
|
|
T38 |
17 |
|
T98 |
25 |
|
T99 |
15 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1316 |
1 |
|
|
T38 |
25 |
|
T98 |
40 |
|
T99 |
23 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
672 |
1 |
|
|
T38 |
18 |
|
T98 |
27 |
|
T99 |
13 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1290 |
1 |
|
|
T38 |
28 |
|
T98 |
44 |
|
T99 |
21 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
671 |
1 |
|
|
T38 |
17 |
|
T98 |
25 |
|
T99 |
15 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1285 |
1 |
|
|
T38 |
24 |
|
T98 |
39 |
|
T99 |
22 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
672 |
1 |
|
|
T38 |
18 |
|
T98 |
27 |
|
T99 |
13 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1269 |
1 |
|
|
T38 |
28 |
|
T98 |
44 |
|
T99 |
20 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
667 |
1 |
|
|
T38 |
17 |
|
T98 |
25 |
|
T99 |
15 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1252 |
1 |
|
|
T38 |
22 |
|
T98 |
38 |
|
T99 |
22 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
668 |
1 |
|
|
T38 |
18 |
|
T98 |
27 |
|
T99 |
13 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1242 |
1 |
|
|
T38 |
28 |
|
T98 |
44 |
|
T99 |
20 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
667 |
1 |
|
|
T38 |
17 |
|
T98 |
25 |
|
T99 |
15 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1223 |
1 |
|
|
T38 |
22 |
|
T98 |
38 |
|
T99 |
22 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
668 |
1 |
|
|
T38 |
18 |
|
T98 |
27 |
|
T99 |
13 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1212 |
1 |
|
|
T38 |
27 |
|
T98 |
44 |
|
T99 |
20 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
663 |
1 |
|
|
T38 |
17 |
|
T98 |
25 |
|
T99 |
15 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1193 |
1 |
|
|
T38 |
20 |
|
T98 |
37 |
|
T99 |
22 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
666 |
1 |
|
|
T38 |
18 |
|
T98 |
27 |
|
T99 |
13 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1183 |
1 |
|
|
T38 |
27 |
|
T98 |
43 |
|
T99 |
17 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
663 |
1 |
|
|
T38 |
17 |
|
T98 |
25 |
|
T99 |
15 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1160 |
1 |
|
|
T38 |
20 |
|
T98 |
35 |
|
T99 |
22 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
666 |
1 |
|
|
T38 |
18 |
|
T98 |
27 |
|
T99 |
13 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1153 |
1 |
|
|
T38 |
26 |
|
T98 |
42 |
|
T99 |
14 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
662 |
1 |
|
|
T38 |
17 |
|
T98 |
25 |
|
T99 |
15 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1133 |
1 |
|
|
T38 |
20 |
|
T98 |
33 |
|
T99 |
22 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
665 |
1 |
|
|
T38 |
18 |
|
T98 |
27 |
|
T99 |
13 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1126 |
1 |
|
|
T38 |
25 |
|
T98 |
41 |
|
T99 |
14 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
662 |
1 |
|
|
T38 |
17 |
|
T98 |
25 |
|
T99 |
15 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1106 |
1 |
|
|
T38 |
18 |
|
T98 |
32 |
|
T99 |
21 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
665 |
1 |
|
|
T38 |
18 |
|
T98 |
27 |
|
T99 |
13 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1103 |
1 |
|
|
T38 |
25 |
|
T98 |
41 |
|
T99 |
13 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
662 |
1 |
|
|
T38 |
17 |
|
T98 |
25 |
|
T99 |
15 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1075 |
1 |
|
|
T38 |
18 |
|
T98 |
31 |
|
T99 |
21 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
665 |
1 |
|
|
T38 |
18 |
|
T98 |
27 |
|
T99 |
13 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1080 |
1 |
|
|
T38 |
25 |
|
T98 |
40 |
|
T99 |
13 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[0] |
auto[0] |
54498 |
1 |
|
|
T38 |
1106 |
|
T98 |
1599 |
|
T99 |
682 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46488 |
1 |
|
|
T38 |
1953 |
|
T98 |
1080 |
|
T99 |
650 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[1] |
auto[0] |
46676 |
1 |
|
|
T38 |
1028 |
|
T98 |
2253 |
|
T99 |
691 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[1] |
auto[1] |
42365 |
1 |
|
|
T38 |
808 |
|
T98 |
1114 |
|
T99 |
1375 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
650 |
1 |
|
|
T38 |
17 |
|
T98 |
18 |
|
T99 |
10 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1585 |
1 |
|
|
T38 |
33 |
|
T98 |
56 |
|
T99 |
24 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
617 |
1 |
|
|
T38 |
14 |
|
T98 |
18 |
|
T99 |
9 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1609 |
1 |
|
|
T38 |
35 |
|
T98 |
57 |
|
T99 |
25 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
650 |
1 |
|
|
T38 |
17 |
|
T98 |
18 |
|
T99 |
10 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1554 |
1 |
|
|
T38 |
33 |
|
T98 |
54 |
|
T99 |
22 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
617 |
1 |
|
|
T38 |
14 |
|
T98 |
18 |
|
T99 |
9 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1579 |
1 |
|
|
T38 |
35 |
|
T98 |
56 |
|
T99 |
24 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
649 |
1 |
|
|
T38 |
16 |
|
T98 |
18 |
|
T99 |
10 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1526 |
1 |
|
|
T38 |
34 |
|
T98 |
53 |
|
T99 |
21 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
617 |
1 |
|
|
T38 |
14 |
|
T98 |
18 |
|
T99 |
9 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1555 |
1 |
|
|
T38 |
35 |
|
T98 |
55 |
|
T99 |
24 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
649 |
1 |
|
|
T38 |
16 |
|
T98 |
18 |
|
T99 |
10 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1501 |
1 |
|
|
T38 |
33 |
|
T98 |
53 |
|
T99 |
21 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
617 |
1 |
|
|
T38 |
14 |
|
T98 |
18 |
|
T99 |
9 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1515 |
1 |
|
|
T38 |
35 |
|
T98 |
55 |
|
T99 |
24 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
641 |
1 |
|
|
T38 |
16 |
|
T98 |
18 |
|
T99 |
9 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1473 |
1 |
|
|
T38 |
31 |
|
T98 |
52 |
|
T99 |
22 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
611 |
1 |
|
|
T38 |
14 |
|
T98 |
18 |
|
T99 |
9 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1481 |
1 |
|
|
T38 |
34 |
|
T98 |
54 |
|
T99 |
23 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
641 |
1 |
|
|
T38 |
16 |
|
T98 |
18 |
|
T99 |
9 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1445 |
1 |
|
|
T38 |
31 |
|
T98 |
51 |
|
T99 |
22 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
611 |
1 |
|
|
T38 |
14 |
|
T98 |
18 |
|
T99 |
9 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1456 |
1 |
|
|
T38 |
33 |
|
T98 |
53 |
|
T99 |
23 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
638 |
1 |
|
|
T38 |
16 |
|
T98 |
18 |
|
T99 |
9 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1403 |
1 |
|
|
T38 |
31 |
|
T98 |
50 |
|
T99 |
22 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
608 |
1 |
|
|
T38 |
14 |
|
T98 |
18 |
|
T99 |
9 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1429 |
1 |
|
|
T38 |
33 |
|
T98 |
52 |
|
T99 |
23 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
638 |
1 |
|
|
T38 |
16 |
|
T98 |
18 |
|
T99 |
9 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1373 |
1 |
|
|
T38 |
30 |
|
T98 |
50 |
|
T99 |
22 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
608 |
1 |
|
|
T38 |
14 |
|
T98 |
18 |
|
T99 |
9 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1389 |
1 |
|
|
T38 |
32 |
|
T98 |
49 |
|
T99 |
23 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
634 |
1 |
|
|
T38 |
16 |
|
T98 |
18 |
|
T99 |
9 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1343 |
1 |
|
|
T38 |
30 |
|
T98 |
48 |
|
T99 |
21 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
605 |
1 |
|
|
T38 |
14 |
|
T98 |
18 |
|
T99 |
9 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1364 |
1 |
|
|
T38 |
31 |
|
T98 |
49 |
|
T99 |
21 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
634 |
1 |
|
|
T38 |
16 |
|
T98 |
18 |
|
T99 |
9 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1314 |
1 |
|
|
T38 |
27 |
|
T98 |
47 |
|
T99 |
21 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
605 |
1 |
|
|
T38 |
14 |
|
T98 |
18 |
|
T99 |
9 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1324 |
1 |
|
|
T38 |
31 |
|
T98 |
47 |
|
T99 |
21 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
633 |
1 |
|
|
T38 |
16 |
|
T98 |
18 |
|
T99 |
9 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1286 |
1 |
|
|
T38 |
24 |
|
T98 |
44 |
|
T99 |
20 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
604 |
1 |
|
|
T38 |
14 |
|
T98 |
18 |
|
T99 |
9 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1290 |
1 |
|
|
T38 |
30 |
|
T98 |
47 |
|
T99 |
21 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
633 |
1 |
|
|
T38 |
16 |
|
T98 |
18 |
|
T99 |
9 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1261 |
1 |
|
|
T38 |
24 |
|
T98 |
44 |
|
T99 |
20 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
604 |
1 |
|
|
T38 |
14 |
|
T98 |
18 |
|
T99 |
9 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1261 |
1 |
|
|
T38 |
30 |
|
T98 |
45 |
|
T99 |
21 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
633 |
1 |
|
|
T38 |
16 |
|
T98 |
18 |
|
T99 |
9 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1228 |
1 |
|
|
T38 |
24 |
|
T98 |
41 |
|
T99 |
19 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
604 |
1 |
|
|
T38 |
14 |
|
T98 |
18 |
|
T99 |
9 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1225 |
1 |
|
|
T38 |
29 |
|
T98 |
44 |
|
T99 |
19 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
633 |
1 |
|
|
T38 |
16 |
|
T98 |
18 |
|
T99 |
9 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1186 |
1 |
|
|
T38 |
24 |
|
T98 |
40 |
|
T99 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
604 |
1 |
|
|
T38 |
14 |
|
T98 |
18 |
|
T99 |
9 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1187 |
1 |
|
|
T38 |
29 |
|
T98 |
41 |
|
T99 |
19 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
633 |
1 |
|
|
T38 |
16 |
|
T98 |
18 |
|
T99 |
9 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1155 |
1 |
|
|
T38 |
23 |
|
T98 |
40 |
|
T99 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
604 |
1 |
|
|
T38 |
14 |
|
T98 |
18 |
|
T99 |
9 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1153 |
1 |
|
|
T38 |
29 |
|
T98 |
39 |
|
T99 |
19 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[0] |
auto[0] |
54875 |
1 |
|
|
T38 |
854 |
|
T98 |
1660 |
|
T99 |
948 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46985 |
1 |
|
|
T38 |
854 |
|
T98 |
962 |
|
T99 |
1215 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[1] |
auto[0] |
47916 |
1 |
|
|
T38 |
747 |
|
T98 |
1566 |
|
T99 |
606 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[1] |
auto[1] |
41331 |
1 |
|
|
T38 |
2221 |
|
T98 |
1916 |
|
T99 |
514 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
663 |
1 |
|
|
T38 |
15 |
|
T98 |
30 |
|
T99 |
17 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1535 |
1 |
|
|
T38 |
43 |
|
T98 |
42 |
|
T99 |
22 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
647 |
1 |
|
|
T38 |
10 |
|
T98 |
30 |
|
T99 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1542 |
1 |
|
|
T38 |
48 |
|
T98 |
43 |
|
T99 |
25 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
663 |
1 |
|
|
T38 |
15 |
|
T98 |
30 |
|
T99 |
17 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1506 |
1 |
|
|
T38 |
43 |
|
T98 |
41 |
|
T99 |
22 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
647 |
1 |
|
|
T38 |
10 |
|
T98 |
30 |
|
T99 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1517 |
1 |
|
|
T38 |
48 |
|
T98 |
42 |
|
T99 |
23 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
662 |
1 |
|
|
T38 |
14 |
|
T98 |
30 |
|
T99 |
17 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1484 |
1 |
|
|
T38 |
44 |
|
T98 |
40 |
|
T99 |
22 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
646 |
1 |
|
|
T38 |
10 |
|
T98 |
30 |
|
T99 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1480 |
1 |
|
|
T38 |
47 |
|
T98 |
41 |
|
T99 |
23 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
662 |
1 |
|
|
T38 |
14 |
|
T98 |
30 |
|
T99 |
17 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1455 |
1 |
|
|
T38 |
44 |
|
T98 |
40 |
|
T99 |
20 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
646 |
1 |
|
|
T38 |
10 |
|
T98 |
30 |
|
T99 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1448 |
1 |
|
|
T38 |
45 |
|
T98 |
40 |
|
T99 |
23 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
654 |
1 |
|
|
T38 |
14 |
|
T98 |
30 |
|
T99 |
16 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1437 |
1 |
|
|
T38 |
43 |
|
T98 |
38 |
|
T99 |
21 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
644 |
1 |
|
|
T38 |
10 |
|
T98 |
30 |
|
T99 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1406 |
1 |
|
|
T38 |
45 |
|
T98 |
39 |
|
T99 |
21 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
654 |
1 |
|
|
T38 |
14 |
|
T98 |
30 |
|
T99 |
16 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1407 |
1 |
|
|
T38 |
42 |
|
T98 |
37 |
|
T99 |
21 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
644 |
1 |
|
|
T38 |
10 |
|
T98 |
30 |
|
T99 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1377 |
1 |
|
|
T38 |
45 |
|
T98 |
38 |
|
T99 |
21 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
649 |
1 |
|
|
T38 |
14 |
|
T98 |
30 |
|
T99 |
16 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1374 |
1 |
|
|
T38 |
40 |
|
T98 |
36 |
|
T99 |
21 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
642 |
1 |
|
|
T38 |
10 |
|
T98 |
30 |
|
T99 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1335 |
1 |
|
|
T38 |
44 |
|
T98 |
34 |
|
T99 |
21 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
649 |
1 |
|
|
T38 |
14 |
|
T98 |
30 |
|
T99 |
16 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1334 |
1 |
|
|
T38 |
39 |
|
T98 |
36 |
|
T99 |
17 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
642 |
1 |
|
|
T38 |
10 |
|
T98 |
30 |
|
T99 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1299 |
1 |
|
|
T38 |
43 |
|
T98 |
33 |
|
T99 |
21 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
645 |
1 |
|
|
T38 |
14 |
|
T98 |
30 |
|
T99 |
16 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1298 |
1 |
|
|
T38 |
38 |
|
T98 |
35 |
|
T99 |
17 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
637 |
1 |
|
|
T38 |
10 |
|
T98 |
29 |
|
T99 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1273 |
1 |
|
|
T38 |
42 |
|
T98 |
33 |
|
T99 |
21 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
645 |
1 |
|
|
T38 |
14 |
|
T98 |
30 |
|
T99 |
16 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1263 |
1 |
|
|
T38 |
37 |
|
T98 |
35 |
|
T99 |
17 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
637 |
1 |
|
|
T38 |
10 |
|
T98 |
29 |
|
T99 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1244 |
1 |
|
|
T38 |
40 |
|
T98 |
30 |
|
T99 |
21 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
644 |
1 |
|
|
T38 |
14 |
|
T98 |
30 |
|
T99 |
16 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1236 |
1 |
|
|
T38 |
36 |
|
T98 |
35 |
|
T99 |
16 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
637 |
1 |
|
|
T38 |
10 |
|
T98 |
29 |
|
T99 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1217 |
1 |
|
|
T38 |
40 |
|
T98 |
29 |
|
T99 |
21 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
644 |
1 |
|
|
T38 |
14 |
|
T98 |
30 |
|
T99 |
16 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1215 |
1 |
|
|
T38 |
34 |
|
T98 |
34 |
|
T99 |
16 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
637 |
1 |
|
|
T38 |
10 |
|
T98 |
29 |
|
T99 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1188 |
1 |
|
|
T38 |
39 |
|
T98 |
27 |
|
T99 |
21 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
644 |
1 |
|
|
T38 |
14 |
|
T98 |
30 |
|
T99 |
16 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1184 |
1 |
|
|
T38 |
33 |
|
T98 |
34 |
|
T99 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
635 |
1 |
|
|
T38 |
10 |
|
T98 |
29 |
|
T99 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1157 |
1 |
|
|
T38 |
39 |
|
T98 |
27 |
|
T99 |
21 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
644 |
1 |
|
|
T38 |
14 |
|
T98 |
30 |
|
T99 |
16 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1153 |
1 |
|
|
T38 |
33 |
|
T98 |
31 |
|
T99 |
11 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
635 |
1 |
|
|
T38 |
10 |
|
T98 |
29 |
|
T99 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1126 |
1 |
|
|
T38 |
39 |
|
T98 |
27 |
|
T99 |
21 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
644 |
1 |
|
|
T38 |
14 |
|
T98 |
30 |
|
T99 |
16 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1131 |
1 |
|
|
T38 |
30 |
|
T98 |
31 |
|
T99 |
11 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
635 |
1 |
|
|
T38 |
10 |
|
T98 |
29 |
|
T99 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1097 |
1 |
|
|
T38 |
39 |
|
T98 |
27 |
|
T99 |
21 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[0] |
auto[0] |
51998 |
1 |
|
|
T38 |
1221 |
|
T98 |
1105 |
|
T99 |
756 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[0] |
auto[1] |
41867 |
1 |
|
|
T38 |
578 |
|
T98 |
1076 |
|
T99 |
1078 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[1] |
auto[0] |
54579 |
1 |
|
|
T38 |
2587 |
|
T98 |
1535 |
|
T99 |
972 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44052 |
1 |
|
|
T38 |
658 |
|
T98 |
2464 |
|
T99 |
418 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
660 |
1 |
|
|
T38 |
16 |
|
T98 |
19 |
|
T99 |
18 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1472 |
1 |
|
|
T38 |
30 |
|
T98 |
49 |
|
T99 |
22 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T38 |
17 |
|
T98 |
20 |
|
T99 |
16 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1441 |
1 |
|
|
T38 |
29 |
|
T98 |
49 |
|
T99 |
23 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
660 |
1 |
|
|
T38 |
16 |
|
T98 |
19 |
|
T99 |
18 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1444 |
1 |
|
|
T38 |
29 |
|
T98 |
49 |
|
T99 |
22 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T38 |
17 |
|
T98 |
20 |
|
T99 |
16 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1414 |
1 |
|
|
T38 |
29 |
|
T98 |
49 |
|
T99 |
23 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
659 |
1 |
|
|
T38 |
16 |
|
T98 |
19 |
|
T99 |
18 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1412 |
1 |
|
|
T38 |
29 |
|
T98 |
48 |
|
T99 |
21 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
685 |
1 |
|
|
T38 |
17 |
|
T98 |
20 |
|
T99 |
16 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1393 |
1 |
|
|
T38 |
28 |
|
T98 |
48 |
|
T99 |
23 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
659 |
1 |
|
|
T38 |
16 |
|
T98 |
19 |
|
T99 |
18 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1385 |
1 |
|
|
T38 |
29 |
|
T98 |
47 |
|
T99 |
21 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
685 |
1 |
|
|
T38 |
17 |
|
T98 |
20 |
|
T99 |
16 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1360 |
1 |
|
|
T38 |
26 |
|
T98 |
48 |
|
T99 |
23 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
654 |
1 |
|
|
T38 |
16 |
|
T98 |
19 |
|
T99 |
18 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1363 |
1 |
|
|
T38 |
29 |
|
T98 |
45 |
|
T99 |
21 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
681 |
1 |
|
|
T38 |
17 |
|
T98 |
20 |
|
T99 |
16 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1333 |
1 |
|
|
T38 |
26 |
|
T98 |
46 |
|
T99 |
23 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
654 |
1 |
|
|
T38 |
16 |
|
T98 |
19 |
|
T99 |
18 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1339 |
1 |
|
|
T38 |
28 |
|
T98 |
45 |
|
T99 |
20 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
681 |
1 |
|
|
T38 |
17 |
|
T98 |
20 |
|
T99 |
16 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1299 |
1 |
|
|
T38 |
26 |
|
T98 |
46 |
|
T99 |
23 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
649 |
1 |
|
|
T38 |
15 |
|
T98 |
19 |
|
T99 |
18 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1312 |
1 |
|
|
T38 |
27 |
|
T98 |
44 |
|
T99 |
20 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
678 |
1 |
|
|
T38 |
17 |
|
T98 |
20 |
|
T99 |
16 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1272 |
1 |
|
|
T38 |
22 |
|
T98 |
46 |
|
T99 |
22 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
649 |
1 |
|
|
T38 |
15 |
|
T98 |
19 |
|
T99 |
18 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1287 |
1 |
|
|
T38 |
26 |
|
T98 |
42 |
|
T99 |
20 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
678 |
1 |
|
|
T38 |
17 |
|
T98 |
20 |
|
T99 |
16 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1241 |
1 |
|
|
T38 |
19 |
|
T98 |
46 |
|
T99 |
22 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
644 |
1 |
|
|
T38 |
15 |
|
T98 |
19 |
|
T99 |
17 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1246 |
1 |
|
|
T38 |
25 |
|
T98 |
41 |
|
T99 |
19 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
674 |
1 |
|
|
T38 |
17 |
|
T98 |
20 |
|
T99 |
16 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1212 |
1 |
|
|
T38 |
19 |
|
T98 |
45 |
|
T99 |
20 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
644 |
1 |
|
|
T38 |
15 |
|
T98 |
19 |
|
T99 |
17 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1223 |
1 |
|
|
T38 |
25 |
|
T98 |
39 |
|
T99 |
18 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
674 |
1 |
|
|
T38 |
17 |
|
T98 |
20 |
|
T99 |
16 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1187 |
1 |
|
|
T38 |
19 |
|
T98 |
42 |
|
T99 |
19 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
642 |
1 |
|
|
T38 |
15 |
|
T98 |
19 |
|
T99 |
17 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1195 |
1 |
|
|
T38 |
24 |
|
T98 |
37 |
|
T99 |
18 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
674 |
1 |
|
|
T38 |
17 |
|
T98 |
20 |
|
T99 |
16 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1157 |
1 |
|
|
T38 |
19 |
|
T98 |
41 |
|
T99 |
18 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
642 |
1 |
|
|
T38 |
15 |
|
T98 |
19 |
|
T99 |
17 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1158 |
1 |
|
|
T38 |
24 |
|
T98 |
36 |
|
T99 |
16 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
674 |
1 |
|
|
T38 |
17 |
|
T98 |
20 |
|
T99 |
16 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1133 |
1 |
|
|
T38 |
19 |
|
T98 |
40 |
|
T99 |
18 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
641 |
1 |
|
|
T38 |
15 |
|
T98 |
19 |
|
T99 |
17 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1125 |
1 |
|
|
T38 |
24 |
|
T98 |
36 |
|
T99 |
14 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
674 |
1 |
|
|
T38 |
17 |
|
T98 |
20 |
|
T99 |
16 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1104 |
1 |
|
|
T38 |
18 |
|
T98 |
38 |
|
T99 |
18 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
641 |
1 |
|
|
T38 |
15 |
|
T98 |
19 |
|
T99 |
17 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1096 |
1 |
|
|
T38 |
24 |
|
T98 |
35 |
|
T99 |
13 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
674 |
1 |
|
|
T38 |
17 |
|
T98 |
20 |
|
T99 |
16 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1078 |
1 |
|
|
T38 |
18 |
|
T98 |
38 |
|
T99 |
18 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
640 |
1 |
|
|
T38 |
15 |
|
T98 |
19 |
|
T99 |
17 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1062 |
1 |
|
|
T38 |
23 |
|
T98 |
34 |
|
T99 |
13 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
674 |
1 |
|
|
T38 |
17 |
|
T98 |
20 |
|
T99 |
16 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1047 |
1 |
|
|
T38 |
17 |
|
T98 |
38 |
|
T99 |
17 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[0] |
auto[0] |
51441 |
1 |
|
|
T38 |
1062 |
|
T98 |
1178 |
|
T99 |
491 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[0] |
auto[1] |
35413 |
1 |
|
|
T38 |
2259 |
|
T98 |
1334 |
|
T99 |
718 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[1] |
auto[0] |
58738 |
1 |
|
|
T38 |
847 |
|
T98 |
2368 |
|
T99 |
609 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46513 |
1 |
|
|
T38 |
615 |
|
T98 |
1131 |
|
T99 |
1382 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
673 |
1 |
|
|
T38 |
17 |
|
T98 |
19 |
|
T99 |
10 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1475 |
1 |
|
|
T38 |
39 |
|
T98 |
54 |
|
T99 |
31 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T38 |
18 |
|
T98 |
27 |
|
T99 |
9 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1449 |
1 |
|
|
T38 |
37 |
|
T98 |
47 |
|
T99 |
32 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
673 |
1 |
|
|
T38 |
17 |
|
T98 |
19 |
|
T99 |
10 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1449 |
1 |
|
|
T38 |
39 |
|
T98 |
54 |
|
T99 |
31 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T38 |
18 |
|
T98 |
27 |
|
T99 |
9 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1423 |
1 |
|
|
T38 |
34 |
|
T98 |
46 |
|
T99 |
32 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
671 |
1 |
|
|
T38 |
16 |
|
T98 |
19 |
|
T99 |
10 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1431 |
1 |
|
|
T38 |
40 |
|
T98 |
54 |
|
T99 |
31 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T38 |
18 |
|
T98 |
27 |
|
T99 |
9 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1394 |
1 |
|
|
T38 |
33 |
|
T98 |
45 |
|
T99 |
32 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
671 |
1 |
|
|
T38 |
16 |
|
T98 |
19 |
|
T99 |
10 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1393 |
1 |
|
|
T38 |
39 |
|
T98 |
52 |
|
T99 |
30 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T38 |
18 |
|
T98 |
27 |
|
T99 |
9 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1368 |
1 |
|
|
T38 |
30 |
|
T98 |
45 |
|
T99 |
31 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
664 |
1 |
|
|
T38 |
16 |
|
T98 |
19 |
|
T99 |
9 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1369 |
1 |
|
|
T38 |
39 |
|
T98 |
51 |
|
T99 |
30 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T38 |
18 |
|
T98 |
27 |
|
T99 |
9 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1336 |
1 |
|
|
T38 |
28 |
|
T98 |
43 |
|
T99 |
30 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
664 |
1 |
|
|
T38 |
16 |
|
T98 |
19 |
|
T99 |
9 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1341 |
1 |
|
|
T38 |
39 |
|
T98 |
51 |
|
T99 |
30 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T38 |
18 |
|
T98 |
27 |
|
T99 |
9 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1300 |
1 |
|
|
T38 |
25 |
|
T98 |
43 |
|
T99 |
29 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
660 |
1 |
|
|
T38 |
16 |
|
T98 |
19 |
|
T99 |
9 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1301 |
1 |
|
|
T38 |
39 |
|
T98 |
49 |
|
T99 |
30 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T38 |
18 |
|
T98 |
27 |
|
T99 |
9 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1273 |
1 |
|
|
T38 |
25 |
|
T98 |
42 |
|
T99 |
29 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
660 |
1 |
|
|
T38 |
16 |
|
T98 |
19 |
|
T99 |
9 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1272 |
1 |
|
|
T38 |
38 |
|
T98 |
47 |
|
T99 |
30 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T38 |
18 |
|
T98 |
27 |
|
T99 |
9 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1239 |
1 |
|
|
T38 |
25 |
|
T98 |
42 |
|
T99 |
28 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
658 |
1 |
|
|
T38 |
16 |
|
T98 |
19 |
|
T99 |
9 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1231 |
1 |
|
|
T38 |
38 |
|
T98 |
47 |
|
T99 |
28 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T38 |
18 |
|
T98 |
27 |
|
T99 |
9 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1205 |
1 |
|
|
T38 |
25 |
|
T98 |
40 |
|
T99 |
26 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
658 |
1 |
|
|
T38 |
16 |
|
T98 |
19 |
|
T99 |
9 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1204 |
1 |
|
|
T38 |
38 |
|
T98 |
46 |
|
T99 |
28 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T38 |
18 |
|
T98 |
27 |
|
T99 |
9 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1175 |
1 |
|
|
T38 |
24 |
|
T98 |
40 |
|
T99 |
26 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
655 |
1 |
|
|
T38 |
16 |
|
T98 |
19 |
|
T99 |
9 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1174 |
1 |
|
|
T38 |
38 |
|
T98 |
46 |
|
T99 |
26 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T38 |
18 |
|
T98 |
27 |
|
T99 |
9 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1144 |
1 |
|
|
T38 |
24 |
|
T98 |
39 |
|
T99 |
25 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
655 |
1 |
|
|
T38 |
16 |
|
T98 |
19 |
|
T99 |
9 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1149 |
1 |
|
|
T38 |
36 |
|
T98 |
46 |
|
T99 |
26 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T38 |
18 |
|
T98 |
27 |
|
T99 |
9 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1121 |
1 |
|
|
T38 |
22 |
|
T98 |
39 |
|
T99 |
25 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
654 |
1 |
|
|
T38 |
16 |
|
T98 |
19 |
|
T99 |
9 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1126 |
1 |
|
|
T38 |
36 |
|
T98 |
45 |
|
T99 |
25 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T38 |
18 |
|
T98 |
27 |
|
T99 |
9 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1084 |
1 |
|
|
T38 |
21 |
|
T98 |
37 |
|
T99 |
24 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
654 |
1 |
|
|
T38 |
16 |
|
T98 |
19 |
|
T99 |
9 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1113 |
1 |
|
|
T38 |
36 |
|
T98 |
45 |
|
T99 |
25 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T38 |
18 |
|
T98 |
27 |
|
T99 |
9 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1060 |
1 |
|
|
T38 |
21 |
|
T98 |
36 |
|
T99 |
23 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
654 |
1 |
|
|
T38 |
16 |
|
T98 |
19 |
|
T99 |
9 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1083 |
1 |
|
|
T38 |
36 |
|
T98 |
44 |
|
T99 |
25 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T38 |
18 |
|
T98 |
27 |
|
T99 |
9 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1042 |
1 |
|
|
T38 |
21 |
|
T98 |
36 |
|
T99 |
23 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[0] |
auto[0] |
54942 |
1 |
|
|
T38 |
975 |
|
T98 |
1069 |
|
T99 |
448 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[0] |
auto[1] |
38394 |
1 |
|
|
T38 |
614 |
|
T98 |
2329 |
|
T99 |
798 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[1] |
auto[0] |
50837 |
1 |
|
|
T38 |
1244 |
|
T98 |
1384 |
|
T99 |
732 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47579 |
1 |
|
|
T38 |
2109 |
|
T98 |
1390 |
|
T99 |
1311 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
660 |
1 |
|
|
T38 |
17 |
|
T98 |
15 |
|
T99 |
8 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1503 |
1 |
|
|
T38 |
32 |
|
T98 |
53 |
|
T99 |
30 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
658 |
1 |
|
|
T38 |
13 |
|
T98 |
16 |
|
T99 |
11 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1503 |
1 |
|
|
T38 |
36 |
|
T98 |
52 |
|
T99 |
27 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
660 |
1 |
|
|
T38 |
17 |
|
T98 |
15 |
|
T99 |
8 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1465 |
1 |
|
|
T38 |
32 |
|
T98 |
53 |
|
T99 |
30 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
658 |
1 |
|
|
T38 |
13 |
|
T98 |
16 |
|
T99 |
11 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1473 |
1 |
|
|
T38 |
35 |
|
T98 |
52 |
|
T99 |
26 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
658 |
1 |
|
|
T38 |
16 |
|
T98 |
15 |
|
T99 |
8 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1439 |
1 |
|
|
T38 |
32 |
|
T98 |
53 |
|
T99 |
30 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
657 |
1 |
|
|
T38 |
13 |
|
T98 |
16 |
|
T99 |
11 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1447 |
1 |
|
|
T38 |
35 |
|
T98 |
52 |
|
T99 |
25 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
658 |
1 |
|
|
T38 |
16 |
|
T98 |
15 |
|
T99 |
8 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1409 |
1 |
|
|
T38 |
32 |
|
T98 |
53 |
|
T99 |
30 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
657 |
1 |
|
|
T38 |
13 |
|
T98 |
16 |
|
T99 |
11 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1416 |
1 |
|
|
T38 |
33 |
|
T98 |
50 |
|
T99 |
24 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
648 |
1 |
|
|
T38 |
16 |
|
T98 |
15 |
|
T99 |
7 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1383 |
1 |
|
|
T38 |
31 |
|
T98 |
53 |
|
T99 |
30 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
654 |
1 |
|
|
T38 |
13 |
|
T98 |
16 |
|
T99 |
11 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1391 |
1 |
|
|
T38 |
32 |
|
T98 |
49 |
|
T99 |
24 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
648 |
1 |
|
|
T38 |
16 |
|
T98 |
15 |
|
T99 |
7 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1353 |
1 |
|
|
T38 |
31 |
|
T98 |
53 |
|
T99 |
30 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
654 |
1 |
|
|
T38 |
13 |
|
T98 |
16 |
|
T99 |
11 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1370 |
1 |
|
|
T38 |
30 |
|
T98 |
49 |
|
T99 |
24 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
644 |
1 |
|
|
T38 |
16 |
|
T98 |
15 |
|
T99 |
7 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1320 |
1 |
|
|
T38 |
29 |
|
T98 |
52 |
|
T99 |
29 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
652 |
1 |
|
|
T38 |
13 |
|
T98 |
16 |
|
T99 |
11 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1346 |
1 |
|
|
T38 |
30 |
|
T98 |
48 |
|
T99 |
22 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
644 |
1 |
|
|
T38 |
16 |
|
T98 |
15 |
|
T99 |
7 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1286 |
1 |
|
|
T38 |
28 |
|
T98 |
48 |
|
T99 |
28 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
652 |
1 |
|
|
T38 |
13 |
|
T98 |
16 |
|
T99 |
11 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1319 |
1 |
|
|
T38 |
30 |
|
T98 |
46 |
|
T99 |
22 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
641 |
1 |
|
|
T38 |
16 |
|
T98 |
15 |
|
T99 |
7 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1258 |
1 |
|
|
T38 |
28 |
|
T98 |
46 |
|
T99 |
27 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
649 |
1 |
|
|
T38 |
13 |
|
T98 |
15 |
|
T99 |
11 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1293 |
1 |
|
|
T38 |
30 |
|
T98 |
46 |
|
T99 |
21 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
641 |
1 |
|
|
T38 |
16 |
|
T98 |
15 |
|
T99 |
7 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1223 |
1 |
|
|
T38 |
26 |
|
T98 |
45 |
|
T99 |
27 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
649 |
1 |
|
|
T38 |
13 |
|
T98 |
15 |
|
T99 |
11 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1269 |
1 |
|
|
T38 |
30 |
|
T98 |
46 |
|
T99 |
21 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
638 |
1 |
|
|
T38 |
16 |
|
T98 |
15 |
|
T99 |
7 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1190 |
1 |
|
|
T38 |
26 |
|
T98 |
43 |
|
T99 |
25 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
647 |
1 |
|
|
T38 |
13 |
|
T98 |
15 |
|
T99 |
11 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1236 |
1 |
|
|
T38 |
29 |
|
T98 |
45 |
|
T99 |
21 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
638 |
1 |
|
|
T38 |
16 |
|
T98 |
15 |
|
T99 |
7 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1151 |
1 |
|
|
T38 |
25 |
|
T98 |
41 |
|
T99 |
25 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
647 |
1 |
|
|
T38 |
13 |
|
T98 |
15 |
|
T99 |
11 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1209 |
1 |
|
|
T38 |
29 |
|
T98 |
45 |
|
T99 |
21 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
638 |
1 |
|
|
T38 |
16 |
|
T98 |
15 |
|
T99 |
7 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1121 |
1 |
|
|
T38 |
23 |
|
T98 |
40 |
|
T99 |
25 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
647 |
1 |
|
|
T38 |
13 |
|
T98 |
15 |
|
T99 |
11 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1179 |
1 |
|
|
T38 |
28 |
|
T98 |
44 |
|
T99 |
20 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
638 |
1 |
|
|
T38 |
16 |
|
T98 |
15 |
|
T99 |
7 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1096 |
1 |
|
|
T38 |
22 |
|
T98 |
39 |
|
T99 |
24 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
647 |
1 |
|
|
T38 |
13 |
|
T98 |
15 |
|
T99 |
11 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1152 |
1 |
|
|
T38 |
28 |
|
T98 |
44 |
|
T99 |
20 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
638 |
1 |
|
|
T38 |
16 |
|
T98 |
15 |
|
T99 |
7 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1060 |
1 |
|
|
T38 |
22 |
|
T98 |
38 |
|
T99 |
24 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
647 |
1 |
|
|
T38 |
13 |
|
T98 |
15 |
|
T99 |
11 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1123 |
1 |
|
|
T38 |
27 |
|
T98 |
44 |
|
T99 |
20 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[0] |
auto[0] |
54161 |
1 |
|
|
T38 |
1200 |
|
T98 |
3064 |
|
T99 |
593 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[0] |
auto[1] |
36349 |
1 |
|
|
T38 |
651 |
|
T98 |
810 |
|
T99 |
693 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[1] |
auto[0] |
53937 |
1 |
|
|
T38 |
824 |
|
T98 |
1142 |
|
T99 |
782 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48632 |
1 |
|
|
T38 |
2211 |
|
T98 |
1149 |
|
T99 |
1261 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
660 |
1 |
|
|
T38 |
17 |
|
T98 |
28 |
|
T99 |
11 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1445 |
1 |
|
|
T38 |
33 |
|
T98 |
42 |
|
T99 |
25 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
666 |
1 |
|
|
T38 |
11 |
|
T98 |
24 |
|
T99 |
14 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1441 |
1 |
|
|
T38 |
39 |
|
T98 |
46 |
|
T99 |
22 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
660 |
1 |
|
|
T38 |
17 |
|
T98 |
28 |
|
T99 |
11 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1407 |
1 |
|
|
T38 |
33 |
|
T98 |
40 |
|
T99 |
24 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
666 |
1 |
|
|
T38 |
11 |
|
T98 |
24 |
|
T99 |
14 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1411 |
1 |
|
|
T38 |
39 |
|
T98 |
45 |
|
T99 |
21 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
659 |
1 |
|
|
T38 |
16 |
|
T98 |
28 |
|
T99 |
11 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1381 |
1 |
|
|
T38 |
34 |
|
T98 |
39 |
|
T99 |
24 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
666 |
1 |
|
|
T38 |
11 |
|
T98 |
24 |
|
T99 |
14 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1386 |
1 |
|
|
T38 |
39 |
|
T98 |
43 |
|
T99 |
21 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
659 |
1 |
|
|
T38 |
16 |
|
T98 |
28 |
|
T99 |
11 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1356 |
1 |
|
|
T38 |
32 |
|
T98 |
37 |
|
T99 |
23 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
666 |
1 |
|
|
T38 |
11 |
|
T98 |
24 |
|
T99 |
14 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1359 |
1 |
|
|
T38 |
39 |
|
T98 |
43 |
|
T99 |
21 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
655 |
1 |
|
|
T38 |
16 |
|
T98 |
28 |
|
T99 |
11 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1334 |
1 |
|
|
T38 |
31 |
|
T98 |
36 |
|
T99 |
23 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
662 |
1 |
|
|
T38 |
11 |
|
T98 |
24 |
|
T99 |
14 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1343 |
1 |
|
|
T38 |
38 |
|
T98 |
41 |
|
T99 |
20 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
655 |
1 |
|
|
T38 |
16 |
|
T98 |
28 |
|
T99 |
11 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1304 |
1 |
|
|
T38 |
30 |
|
T98 |
36 |
|
T99 |
23 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
662 |
1 |
|
|
T38 |
11 |
|
T98 |
24 |
|
T99 |
14 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1309 |
1 |
|
|
T38 |
38 |
|
T98 |
41 |
|
T99 |
20 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
651 |
1 |
|
|
T38 |
16 |
|
T98 |
28 |
|
T99 |
11 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1279 |
1 |
|
|
T38 |
30 |
|
T98 |
34 |
|
T99 |
22 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
659 |
1 |
|
|
T38 |
11 |
|
T98 |
24 |
|
T99 |
14 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1285 |
1 |
|
|
T38 |
38 |
|
T98 |
40 |
|
T99 |
20 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
651 |
1 |
|
|
T38 |
16 |
|
T98 |
28 |
|
T99 |
11 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1244 |
1 |
|
|
T38 |
27 |
|
T98 |
34 |
|
T99 |
22 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
659 |
1 |
|
|
T38 |
11 |
|
T98 |
24 |
|
T99 |
14 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1267 |
1 |
|
|
T38 |
38 |
|
T98 |
40 |
|
T99 |
20 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
643 |
1 |
|
|
T38 |
16 |
|
T98 |
28 |
|
T99 |
10 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1221 |
1 |
|
|
T38 |
27 |
|
T98 |
33 |
|
T99 |
22 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
654 |
1 |
|
|
T38 |
11 |
|
T98 |
23 |
|
T99 |
14 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1233 |
1 |
|
|
T38 |
38 |
|
T98 |
40 |
|
T99 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
643 |
1 |
|
|
T38 |
16 |
|
T98 |
28 |
|
T99 |
10 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1191 |
1 |
|
|
T38 |
23 |
|
T98 |
31 |
|
T99 |
22 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
654 |
1 |
|
|
T38 |
11 |
|
T98 |
23 |
|
T99 |
14 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1207 |
1 |
|
|
T38 |
37 |
|
T98 |
40 |
|
T99 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
642 |
1 |
|
|
T38 |
16 |
|
T98 |
28 |
|
T99 |
10 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1154 |
1 |
|
|
T38 |
23 |
|
T98 |
31 |
|
T99 |
22 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
654 |
1 |
|
|
T38 |
11 |
|
T98 |
23 |
|
T99 |
14 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1169 |
1 |
|
|
T38 |
36 |
|
T98 |
40 |
|
T99 |
18 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
642 |
1 |
|
|
T38 |
16 |
|
T98 |
28 |
|
T99 |
10 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1122 |
1 |
|
|
T38 |
23 |
|
T98 |
29 |
|
T99 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
654 |
1 |
|
|
T38 |
11 |
|
T98 |
23 |
|
T99 |
14 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1150 |
1 |
|
|
T38 |
36 |
|
T98 |
40 |
|
T99 |
18 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
642 |
1 |
|
|
T38 |
16 |
|
T98 |
28 |
|
T99 |
10 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1081 |
1 |
|
|
T38 |
21 |
|
T98 |
26 |
|
T99 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
654 |
1 |
|
|
T38 |
11 |
|
T98 |
23 |
|
T99 |
14 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1129 |
1 |
|
|
T38 |
35 |
|
T98 |
39 |
|
T99 |
17 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
642 |
1 |
|
|
T38 |
16 |
|
T98 |
28 |
|
T99 |
10 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1055 |
1 |
|
|
T38 |
20 |
|
T98 |
26 |
|
T99 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
654 |
1 |
|
|
T38 |
11 |
|
T98 |
23 |
|
T99 |
14 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1112 |
1 |
|
|
T38 |
35 |
|
T98 |
39 |
|
T99 |
17 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
642 |
1 |
|
|
T38 |
16 |
|
T98 |
28 |
|
T99 |
10 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1030 |
1 |
|
|
T38 |
20 |
|
T98 |
24 |
|
T99 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
654 |
1 |
|
|
T38 |
11 |
|
T98 |
23 |
|
T99 |
14 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1088 |
1 |
|
|
T38 |
35 |
|
T98 |
39 |
|
T99 |
17 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[0] |
auto[0] |
48432 |
1 |
|
|
T38 |
826 |
|
T98 |
1414 |
|
T99 |
757 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44190 |
1 |
|
|
T38 |
1036 |
|
T98 |
977 |
|
T99 |
509 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57117 |
1 |
|
|
T38 |
2040 |
|
T98 |
1068 |
|
T99 |
1615 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[1] |
auto[1] |
42295 |
1 |
|
|
T38 |
917 |
|
T98 |
2525 |
|
T99 |
418 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
634 |
1 |
|
|
T38 |
14 |
|
T98 |
17 |
|
T99 |
15 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1513 |
1 |
|
|
T38 |
40 |
|
T98 |
59 |
|
T99 |
23 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
641 |
1 |
|
|
T38 |
15 |
|
T98 |
21 |
|
T99 |
11 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1503 |
1 |
|
|
T38 |
39 |
|
T98 |
56 |
|
T99 |
27 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
634 |
1 |
|
|
T38 |
14 |
|
T98 |
17 |
|
T99 |
15 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1479 |
1 |
|
|
T38 |
39 |
|
T98 |
56 |
|
T99 |
22 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
641 |
1 |
|
|
T38 |
15 |
|
T98 |
21 |
|
T99 |
11 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1477 |
1 |
|
|
T38 |
37 |
|
T98 |
56 |
|
T99 |
25 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
634 |
1 |
|
|
T38 |
14 |
|
T98 |
17 |
|
T99 |
15 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1447 |
1 |
|
|
T38 |
39 |
|
T98 |
56 |
|
T99 |
22 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
640 |
1 |
|
|
T38 |
15 |
|
T98 |
21 |
|
T99 |
11 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1456 |
1 |
|
|
T38 |
36 |
|
T98 |
56 |
|
T99 |
25 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
634 |
1 |
|
|
T38 |
14 |
|
T98 |
17 |
|
T99 |
15 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1412 |
1 |
|
|
T38 |
39 |
|
T98 |
53 |
|
T99 |
20 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
640 |
1 |
|
|
T38 |
15 |
|
T98 |
21 |
|
T99 |
11 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1428 |
1 |
|
|
T38 |
35 |
|
T98 |
54 |
|
T99 |
24 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
626 |
1 |
|
|
T38 |
14 |
|
T98 |
17 |
|
T99 |
14 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1386 |
1 |
|
|
T38 |
39 |
|
T98 |
53 |
|
T99 |
21 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
637 |
1 |
|
|
T38 |
15 |
|
T98 |
21 |
|
T99 |
11 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1408 |
1 |
|
|
T38 |
35 |
|
T98 |
54 |
|
T99 |
24 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
626 |
1 |
|
|
T38 |
14 |
|
T98 |
17 |
|
T99 |
14 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1361 |
1 |
|
|
T38 |
39 |
|
T98 |
52 |
|
T99 |
21 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
637 |
1 |
|
|
T38 |
15 |
|
T98 |
21 |
|
T99 |
11 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1383 |
1 |
|
|
T38 |
34 |
|
T98 |
54 |
|
T99 |
24 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
621 |
1 |
|
|
T38 |
13 |
|
T98 |
17 |
|
T99 |
14 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1331 |
1 |
|
|
T38 |
39 |
|
T98 |
52 |
|
T99 |
21 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
636 |
1 |
|
|
T38 |
15 |
|
T98 |
21 |
|
T99 |
11 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1357 |
1 |
|
|
T38 |
33 |
|
T98 |
53 |
|
T99 |
23 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
621 |
1 |
|
|
T38 |
13 |
|
T98 |
17 |
|
T99 |
14 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1304 |
1 |
|
|
T38 |
37 |
|
T98 |
51 |
|
T99 |
20 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
636 |
1 |
|
|
T38 |
15 |
|
T98 |
21 |
|
T99 |
11 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1326 |
1 |
|
|
T38 |
33 |
|
T98 |
51 |
|
T99 |
23 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
616 |
1 |
|
|
T38 |
13 |
|
T98 |
17 |
|
T99 |
14 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1278 |
1 |
|
|
T38 |
36 |
|
T98 |
49 |
|
T99 |
20 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
630 |
1 |
|
|
T38 |
15 |
|
T98 |
21 |
|
T99 |
11 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1291 |
1 |
|
|
T38 |
31 |
|
T98 |
48 |
|
T99 |
23 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
616 |
1 |
|
|
T38 |
13 |
|
T98 |
17 |
|
T99 |
14 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1247 |
1 |
|
|
T38 |
35 |
|
T98 |
49 |
|
T99 |
20 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
630 |
1 |
|
|
T38 |
15 |
|
T98 |
21 |
|
T99 |
11 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1261 |
1 |
|
|
T38 |
29 |
|
T98 |
45 |
|
T99 |
22 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
615 |
1 |
|
|
T38 |
13 |
|
T98 |
17 |
|
T99 |
14 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1219 |
1 |
|
|
T38 |
30 |
|
T98 |
49 |
|
T99 |
20 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
628 |
1 |
|
|
T38 |
15 |
|
T98 |
21 |
|
T99 |
11 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1229 |
1 |
|
|
T38 |
29 |
|
T98 |
44 |
|
T99 |
21 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
615 |
1 |
|
|
T38 |
13 |
|
T98 |
17 |
|
T99 |
14 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1189 |
1 |
|
|
T38 |
30 |
|
T98 |
49 |
|
T99 |
20 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
628 |
1 |
|
|
T38 |
15 |
|
T98 |
21 |
|
T99 |
11 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1200 |
1 |
|
|
T38 |
29 |
|
T98 |
42 |
|
T99 |
21 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
615 |
1 |
|
|
T38 |
13 |
|
T98 |
17 |
|
T99 |
14 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1166 |
1 |
|
|
T38 |
30 |
|
T98 |
48 |
|
T99 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
628 |
1 |
|
|
T38 |
15 |
|
T98 |
21 |
|
T99 |
11 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1175 |
1 |
|
|
T38 |
28 |
|
T98 |
39 |
|
T99 |
20 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
615 |
1 |
|
|
T38 |
13 |
|
T98 |
17 |
|
T99 |
14 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1132 |
1 |
|
|
T38 |
30 |
|
T98 |
48 |
|
T99 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
628 |
1 |
|
|
T38 |
15 |
|
T98 |
21 |
|
T99 |
11 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1151 |
1 |
|
|
T38 |
28 |
|
T98 |
38 |
|
T99 |
18 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
614 |
1 |
|
|
T38 |
13 |
|
T98 |
17 |
|
T99 |
14 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1089 |
1 |
|
|
T38 |
29 |
|
T98 |
46 |
|
T99 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
628 |
1 |
|
|
T38 |
15 |
|
T98 |
21 |
|
T99 |
11 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1126 |
1 |
|
|
T38 |
28 |
|
T98 |
38 |
|
T99 |
16 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[0] |
auto[0] |
52853 |
1 |
|
|
T38 |
779 |
|
T98 |
1828 |
|
T99 |
1404 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[0] |
auto[1] |
49970 |
1 |
|
|
T38 |
2120 |
|
T98 |
1926 |
|
T99 |
709 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[1] |
auto[0] |
48031 |
1 |
|
|
T38 |
1010 |
|
T98 |
1655 |
|
T99 |
395 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[1] |
auto[1] |
39999 |
1 |
|
|
T38 |
855 |
|
T98 |
935 |
|
T99 |
700 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
648 |
1 |
|
|
T38 |
13 |
|
T98 |
31 |
|
T99 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1563 |
1 |
|
|
T38 |
43 |
|
T98 |
34 |
|
T99 |
31 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
620 |
1 |
|
|
T38 |
13 |
|
T98 |
23 |
|
T99 |
8 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1580 |
1 |
|
|
T38 |
42 |
|
T98 |
42 |
|
T99 |
32 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
648 |
1 |
|
|
T38 |
13 |
|
T98 |
31 |
|
T99 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1537 |
1 |
|
|
T38 |
43 |
|
T98 |
34 |
|
T99 |
31 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
620 |
1 |
|
|
T38 |
13 |
|
T98 |
23 |
|
T99 |
8 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1551 |
1 |
|
|
T38 |
41 |
|
T98 |
40 |
|
T99 |
30 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
647 |
1 |
|
|
T38 |
13 |
|
T98 |
31 |
|
T99 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1498 |
1 |
|
|
T38 |
42 |
|
T98 |
31 |
|
T99 |
31 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
619 |
1 |
|
|
T38 |
13 |
|
T98 |
23 |
|
T99 |
8 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1505 |
1 |
|
|
T38 |
39 |
|
T98 |
37 |
|
T99 |
30 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
647 |
1 |
|
|
T38 |
13 |
|
T98 |
31 |
|
T99 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1468 |
1 |
|
|
T38 |
42 |
|
T98 |
29 |
|
T99 |
30 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
619 |
1 |
|
|
T38 |
13 |
|
T98 |
23 |
|
T99 |
8 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1473 |
1 |
|
|
T38 |
39 |
|
T98 |
36 |
|
T99 |
30 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
639 |
1 |
|
|
T38 |
13 |
|
T98 |
31 |
|
T99 |
9 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1439 |
1 |
|
|
T38 |
42 |
|
T98 |
28 |
|
T99 |
30 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
616 |
1 |
|
|
T38 |
13 |
|
T98 |
23 |
|
T99 |
8 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1448 |
1 |
|
|
T38 |
38 |
|
T98 |
35 |
|
T99 |
30 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
639 |
1 |
|
|
T38 |
13 |
|
T98 |
31 |
|
T99 |
9 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1398 |
1 |
|
|
T38 |
40 |
|
T98 |
27 |
|
T99 |
30 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
616 |
1 |
|
|
T38 |
13 |
|
T98 |
23 |
|
T99 |
8 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1414 |
1 |
|
|
T38 |
37 |
|
T98 |
35 |
|
T99 |
30 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
633 |
1 |
|
|
T38 |
12 |
|
T98 |
31 |
|
T99 |
9 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1368 |
1 |
|
|
T38 |
39 |
|
T98 |
25 |
|
T99 |
28 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
615 |
1 |
|
|
T38 |
13 |
|
T98 |
23 |
|
T99 |
8 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1392 |
1 |
|
|
T38 |
37 |
|
T98 |
35 |
|
T99 |
30 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
633 |
1 |
|
|
T38 |
12 |
|
T98 |
31 |
|
T99 |
9 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1332 |
1 |
|
|
T38 |
38 |
|
T98 |
23 |
|
T99 |
27 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
615 |
1 |
|
|
T38 |
13 |
|
T98 |
23 |
|
T99 |
8 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1374 |
1 |
|
|
T38 |
35 |
|
T98 |
34 |
|
T99 |
30 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
631 |
1 |
|
|
T38 |
12 |
|
T98 |
31 |
|
T99 |
9 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1299 |
1 |
|
|
T38 |
38 |
|
T98 |
23 |
|
T99 |
27 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
610 |
1 |
|
|
T38 |
13 |
|
T98 |
22 |
|
T99 |
8 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1337 |
1 |
|
|
T38 |
34 |
|
T98 |
34 |
|
T99 |
30 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
631 |
1 |
|
|
T38 |
12 |
|
T98 |
31 |
|
T99 |
9 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1271 |
1 |
|
|
T38 |
38 |
|
T98 |
23 |
|
T99 |
26 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
610 |
1 |
|
|
T38 |
13 |
|
T98 |
22 |
|
T99 |
8 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1307 |
1 |
|
|
T38 |
33 |
|
T98 |
34 |
|
T99 |
28 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
630 |
1 |
|
|
T38 |
12 |
|
T98 |
31 |
|
T99 |
9 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1240 |
1 |
|
|
T38 |
36 |
|
T98 |
22 |
|
T99 |
25 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
610 |
1 |
|
|
T38 |
13 |
|
T98 |
22 |
|
T99 |
8 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1271 |
1 |
|
|
T38 |
33 |
|
T98 |
33 |
|
T99 |
28 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
630 |
1 |
|
|
T38 |
12 |
|
T98 |
31 |
|
T99 |
9 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1217 |
1 |
|
|
T38 |
35 |
|
T98 |
22 |
|
T99 |
25 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
610 |
1 |
|
|
T38 |
13 |
|
T98 |
22 |
|
T99 |
8 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1244 |
1 |
|
|
T38 |
32 |
|
T98 |
33 |
|
T99 |
27 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
628 |
1 |
|
|
T38 |
12 |
|
T98 |
31 |
|
T99 |
9 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1196 |
1 |
|
|
T38 |
35 |
|
T98 |
20 |
|
T99 |
25 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
610 |
1 |
|
|
T38 |
13 |
|
T98 |
22 |
|
T99 |
8 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1213 |
1 |
|
|
T38 |
32 |
|
T98 |
32 |
|
T99 |
26 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
628 |
1 |
|
|
T38 |
12 |
|
T98 |
31 |
|
T99 |
9 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1168 |
1 |
|
|
T38 |
35 |
|
T98 |
20 |
|
T99 |
25 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
610 |
1 |
|
|
T38 |
13 |
|
T98 |
22 |
|
T99 |
8 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1190 |
1 |
|
|
T38 |
32 |
|
T98 |
32 |
|
T99 |
26 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
627 |
1 |
|
|
T38 |
12 |
|
T98 |
31 |
|
T99 |
9 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1140 |
1 |
|
|
T38 |
33 |
|
T98 |
20 |
|
T99 |
25 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
610 |
1 |
|
|
T38 |
13 |
|
T98 |
22 |
|
T99 |
8 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1167 |
1 |
|
|
T38 |
32 |
|
T98 |
32 |
|
T99 |
25 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[0] |
auto[0] |
54365 |
1 |
|
|
T38 |
785 |
|
T98 |
1445 |
|
T99 |
549 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47676 |
1 |
|
|
T38 |
2238 |
|
T98 |
1141 |
|
T99 |
422 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[1] |
auto[0] |
49474 |
1 |
|
|
T38 |
849 |
|
T98 |
1296 |
|
T99 |
877 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[1] |
auto[1] |
40220 |
1 |
|
|
T38 |
898 |
|
T98 |
2094 |
|
T99 |
1349 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
663 |
1 |
|
|
T38 |
12 |
|
T98 |
23 |
|
T99 |
16 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1504 |
1 |
|
|
T38 |
46 |
|
T98 |
52 |
|
T99 |
24 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
646 |
1 |
|
|
T38 |
12 |
|
T98 |
22 |
|
T99 |
11 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1507 |
1 |
|
|
T38 |
45 |
|
T98 |
54 |
|
T99 |
29 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
663 |
1 |
|
|
T38 |
12 |
|
T98 |
23 |
|
T99 |
16 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1479 |
1 |
|
|
T38 |
46 |
|
T98 |
52 |
|
T99 |
24 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
646 |
1 |
|
|
T38 |
12 |
|
T98 |
22 |
|
T99 |
11 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1481 |
1 |
|
|
T38 |
45 |
|
T98 |
54 |
|
T99 |
28 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
661 |
1 |
|
|
T38 |
11 |
|
T98 |
23 |
|
T99 |
16 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1451 |
1 |
|
|
T38 |
46 |
|
T98 |
50 |
|
T99 |
24 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
645 |
1 |
|
|
T38 |
12 |
|
T98 |
22 |
|
T99 |
11 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1453 |
1 |
|
|
T38 |
42 |
|
T98 |
52 |
|
T99 |
28 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
661 |
1 |
|
|
T38 |
11 |
|
T98 |
23 |
|
T99 |
16 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1414 |
1 |
|
|
T38 |
46 |
|
T98 |
49 |
|
T99 |
24 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
645 |
1 |
|
|
T38 |
12 |
|
T98 |
22 |
|
T99 |
11 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1419 |
1 |
|
|
T38 |
40 |
|
T98 |
51 |
|
T99 |
28 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
653 |
1 |
|
|
T38 |
11 |
|
T98 |
23 |
|
T99 |
15 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1396 |
1 |
|
|
T38 |
46 |
|
T98 |
48 |
|
T99 |
25 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
641 |
1 |
|
|
T38 |
12 |
|
T98 |
22 |
|
T99 |
11 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1397 |
1 |
|
|
T38 |
39 |
|
T98 |
51 |
|
T99 |
28 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
653 |
1 |
|
|
T38 |
11 |
|
T98 |
23 |
|
T99 |
15 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1369 |
1 |
|
|
T38 |
43 |
|
T98 |
48 |
|
T99 |
24 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
641 |
1 |
|
|
T38 |
12 |
|
T98 |
22 |
|
T99 |
11 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1367 |
1 |
|
|
T38 |
37 |
|
T98 |
51 |
|
T99 |
27 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
651 |
1 |
|
|
T38 |
11 |
|
T98 |
23 |
|
T99 |
15 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1340 |
1 |
|
|
T38 |
42 |
|
T98 |
46 |
|
T99 |
24 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
639 |
1 |
|
|
T38 |
12 |
|
T98 |
22 |
|
T99 |
11 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1339 |
1 |
|
|
T38 |
36 |
|
T98 |
51 |
|
T99 |
27 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
651 |
1 |
|
|
T38 |
11 |
|
T98 |
23 |
|
T99 |
15 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1306 |
1 |
|
|
T38 |
42 |
|
T98 |
46 |
|
T99 |
24 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
639 |
1 |
|
|
T38 |
12 |
|
T98 |
22 |
|
T99 |
11 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1305 |
1 |
|
|
T38 |
36 |
|
T98 |
49 |
|
T99 |
26 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
647 |
1 |
|
|
T38 |
11 |
|
T98 |
23 |
|
T99 |
15 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1268 |
1 |
|
|
T38 |
41 |
|
T98 |
46 |
|
T99 |
23 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
638 |
1 |
|
|
T38 |
12 |
|
T98 |
22 |
|
T99 |
11 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1274 |
1 |
|
|
T38 |
34 |
|
T98 |
47 |
|
T99 |
26 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
647 |
1 |
|
|
T38 |
11 |
|
T98 |
23 |
|
T99 |
15 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1235 |
1 |
|
|
T38 |
39 |
|
T98 |
44 |
|
T99 |
22 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
638 |
1 |
|
|
T38 |
12 |
|
T98 |
22 |
|
T99 |
11 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1248 |
1 |
|
|
T38 |
32 |
|
T98 |
46 |
|
T99 |
26 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
647 |
1 |
|
|
T38 |
11 |
|
T98 |
23 |
|
T99 |
15 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1210 |
1 |
|
|
T38 |
38 |
|
T98 |
43 |
|
T99 |
22 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
637 |
1 |
|
|
T38 |
12 |
|
T98 |
22 |
|
T99 |
11 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1211 |
1 |
|
|
T38 |
30 |
|
T98 |
44 |
|
T99 |
25 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
647 |
1 |
|
|
T38 |
11 |
|
T98 |
23 |
|
T99 |
15 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1182 |
1 |
|
|
T38 |
35 |
|
T98 |
42 |
|
T99 |
19 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
637 |
1 |
|
|
T38 |
12 |
|
T98 |
22 |
|
T99 |
11 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1185 |
1 |
|
|
T38 |
30 |
|
T98 |
43 |
|
T99 |
25 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
647 |
1 |
|
|
T38 |
11 |
|
T98 |
23 |
|
T99 |
15 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1149 |
1 |
|
|
T38 |
34 |
|
T98 |
41 |
|
T99 |
17 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
637 |
1 |
|
|
T38 |
12 |
|
T98 |
22 |
|
T99 |
11 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1157 |
1 |
|
|
T38 |
30 |
|
T98 |
42 |
|
T99 |
24 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
647 |
1 |
|
|
T38 |
11 |
|
T98 |
23 |
|
T99 |
15 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1121 |
1 |
|
|
T38 |
33 |
|
T98 |
38 |
|
T99 |
17 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
637 |
1 |
|
|
T38 |
12 |
|
T98 |
22 |
|
T99 |
11 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1120 |
1 |
|
|
T38 |
29 |
|
T98 |
42 |
|
T99 |
24 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
647 |
1 |
|
|
T38 |
11 |
|
T98 |
23 |
|
T99 |
15 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1091 |
1 |
|
|
T38 |
32 |
|
T98 |
37 |
|
T99 |
17 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
637 |
1 |
|
|
T38 |
12 |
|
T98 |
22 |
|
T99 |
11 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1101 |
1 |
|
|
T38 |
29 |
|
T98 |
42 |
|
T99 |
23 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[0] |
auto[0] |
54744 |
1 |
|
|
T38 |
2117 |
|
T98 |
2469 |
|
T99 |
911 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[0] |
auto[1] |
42803 |
1 |
|
|
T38 |
888 |
|
T98 |
1252 |
|
T99 |
536 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[1] |
auto[0] |
54381 |
1 |
|
|
T38 |
841 |
|
T98 |
938 |
|
T99 |
1497 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[1] |
auto[1] |
39948 |
1 |
|
|
T38 |
816 |
|
T98 |
1216 |
|
T99 |
521 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
685 |
1 |
|
|
T38 |
14 |
|
T98 |
25 |
|
T99 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1475 |
1 |
|
|
T38 |
47 |
|
T98 |
54 |
|
T99 |
18 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
659 |
1 |
|
|
T38 |
10 |
|
T98 |
21 |
|
T99 |
9 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1494 |
1 |
|
|
T38 |
50 |
|
T98 |
58 |
|
T99 |
22 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
685 |
1 |
|
|
T38 |
14 |
|
T98 |
25 |
|
T99 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1446 |
1 |
|
|
T38 |
45 |
|
T98 |
52 |
|
T99 |
17 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
659 |
1 |
|
|
T38 |
10 |
|
T98 |
21 |
|
T99 |
9 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1453 |
1 |
|
|
T38 |
50 |
|
T98 |
57 |
|
T99 |
21 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
684 |
1 |
|
|
T38 |
13 |
|
T98 |
25 |
|
T99 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1420 |
1 |
|
|
T38 |
45 |
|
T98 |
52 |
|
T99 |
17 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
657 |
1 |
|
|
T38 |
10 |
|
T98 |
21 |
|
T99 |
9 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1415 |
1 |
|
|
T38 |
50 |
|
T98 |
56 |
|
T99 |
20 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
684 |
1 |
|
|
T38 |
13 |
|
T98 |
25 |
|
T99 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1395 |
1 |
|
|
T38 |
44 |
|
T98 |
52 |
|
T99 |
17 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
657 |
1 |
|
|
T38 |
10 |
|
T98 |
21 |
|
T99 |
9 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1390 |
1 |
|
|
T38 |
49 |
|
T98 |
56 |
|
T99 |
20 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
678 |
1 |
|
|
T38 |
13 |
|
T98 |
25 |
|
T99 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1370 |
1 |
|
|
T38 |
44 |
|
T98 |
51 |
|
T99 |
17 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
655 |
1 |
|
|
T38 |
10 |
|
T98 |
21 |
|
T99 |
9 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1360 |
1 |
|
|
T38 |
45 |
|
T98 |
54 |
|
T99 |
20 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
678 |
1 |
|
|
T38 |
13 |
|
T98 |
25 |
|
T99 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1341 |
1 |
|
|
T38 |
44 |
|
T98 |
50 |
|
T99 |
17 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
655 |
1 |
|
|
T38 |
10 |
|
T98 |
21 |
|
T99 |
9 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1330 |
1 |
|
|
T38 |
44 |
|
T98 |
53 |
|
T99 |
20 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T38 |
13 |
|
T98 |
25 |
|
T99 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1318 |
1 |
|
|
T38 |
42 |
|
T98 |
50 |
|
T99 |
16 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
653 |
1 |
|
|
T38 |
10 |
|
T98 |
21 |
|
T99 |
9 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1306 |
1 |
|
|
T38 |
44 |
|
T98 |
53 |
|
T99 |
20 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T38 |
13 |
|
T98 |
25 |
|
T99 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1285 |
1 |
|
|
T38 |
42 |
|
T98 |
48 |
|
T99 |
16 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
653 |
1 |
|
|
T38 |
10 |
|
T98 |
21 |
|
T99 |
9 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1285 |
1 |
|
|
T38 |
43 |
|
T98 |
53 |
|
T99 |
20 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
674 |
1 |
|
|
T38 |
13 |
|
T98 |
25 |
|
T99 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1239 |
1 |
|
|
T38 |
41 |
|
T98 |
45 |
|
T99 |
15 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
651 |
1 |
|
|
T38 |
10 |
|
T98 |
21 |
|
T99 |
9 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1256 |
1 |
|
|
T38 |
40 |
|
T98 |
53 |
|
T99 |
20 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
674 |
1 |
|
|
T38 |
13 |
|
T98 |
25 |
|
T99 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1210 |
1 |
|
|
T38 |
39 |
|
T98 |
45 |
|
T99 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
651 |
1 |
|
|
T38 |
10 |
|
T98 |
21 |
|
T99 |
9 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1224 |
1 |
|
|
T38 |
40 |
|
T98 |
51 |
|
T99 |
20 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
673 |
1 |
|
|
T38 |
13 |
|
T98 |
25 |
|
T99 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1179 |
1 |
|
|
T38 |
39 |
|
T98 |
44 |
|
T99 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
649 |
1 |
|
|
T38 |
10 |
|
T98 |
21 |
|
T99 |
9 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1200 |
1 |
|
|
T38 |
40 |
|
T98 |
50 |
|
T99 |
20 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
673 |
1 |
|
|
T38 |
13 |
|
T98 |
25 |
|
T99 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1158 |
1 |
|
|
T38 |
39 |
|
T98 |
43 |
|
T99 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
649 |
1 |
|
|
T38 |
10 |
|
T98 |
21 |
|
T99 |
9 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1175 |
1 |
|
|
T38 |
40 |
|
T98 |
50 |
|
T99 |
20 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
673 |
1 |
|
|
T38 |
13 |
|
T98 |
25 |
|
T99 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1126 |
1 |
|
|
T38 |
36 |
|
T98 |
41 |
|
T99 |
11 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
649 |
1 |
|
|
T38 |
10 |
|
T98 |
21 |
|
T99 |
9 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1149 |
1 |
|
|
T38 |
36 |
|
T98 |
49 |
|
T99 |
20 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
673 |
1 |
|
|
T38 |
13 |
|
T98 |
25 |
|
T99 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1099 |
1 |
|
|
T38 |
36 |
|
T98 |
38 |
|
T99 |
11 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
649 |
1 |
|
|
T38 |
10 |
|
T98 |
21 |
|
T99 |
9 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1114 |
1 |
|
|
T38 |
32 |
|
T98 |
46 |
|
T99 |
20 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
672 |
1 |
|
|
T38 |
13 |
|
T98 |
25 |
|
T99 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1073 |
1 |
|
|
T38 |
35 |
|
T98 |
38 |
|
T99 |
9 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
649 |
1 |
|
|
T38 |
10 |
|
T98 |
21 |
|
T99 |
9 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1086 |
1 |
|
|
T38 |
30 |
|
T98 |
45 |
|
T99 |
20 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[0] |
auto[0] |
55007 |
1 |
|
|
T38 |
2444 |
|
T98 |
2155 |
|
T99 |
740 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[0] |
auto[1] |
43408 |
1 |
|
|
T38 |
849 |
|
T98 |
866 |
|
T99 |
1218 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[1] |
auto[0] |
47289 |
1 |
|
|
T38 |
949 |
|
T98 |
1975 |
|
T99 |
790 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45706 |
1 |
|
|
T38 |
610 |
|
T98 |
1315 |
|
T99 |
654 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
664 |
1 |
|
|
T38 |
13 |
|
T98 |
19 |
|
T99 |
12 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1517 |
1 |
|
|
T38 |
40 |
|
T98 |
45 |
|
T99 |
23 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
650 |
1 |
|
|
T38 |
20 |
|
T98 |
24 |
|
T99 |
5 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1522 |
1 |
|
|
T38 |
32 |
|
T98 |
40 |
|
T99 |
29 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
664 |
1 |
|
|
T38 |
13 |
|
T98 |
19 |
|
T99 |
12 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1496 |
1 |
|
|
T38 |
40 |
|
T98 |
45 |
|
T99 |
22 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
650 |
1 |
|
|
T38 |
20 |
|
T98 |
24 |
|
T99 |
5 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1488 |
1 |
|
|
T38 |
31 |
|
T98 |
39 |
|
T99 |
29 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
663 |
1 |
|
|
T38 |
13 |
|
T98 |
19 |
|
T99 |
12 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1475 |
1 |
|
|
T38 |
40 |
|
T98 |
44 |
|
T99 |
22 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
648 |
1 |
|
|
T38 |
20 |
|
T98 |
24 |
|
T99 |
5 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1455 |
1 |
|
|
T38 |
31 |
|
T98 |
39 |
|
T99 |
29 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
663 |
1 |
|
|
T38 |
13 |
|
T98 |
19 |
|
T99 |
12 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1449 |
1 |
|
|
T38 |
39 |
|
T98 |
44 |
|
T99 |
21 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
648 |
1 |
|
|
T38 |
20 |
|
T98 |
24 |
|
T99 |
5 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1418 |
1 |
|
|
T38 |
29 |
|
T98 |
38 |
|
T99 |
28 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
655 |
1 |
|
|
T38 |
13 |
|
T98 |
19 |
|
T99 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1426 |
1 |
|
|
T38 |
39 |
|
T98 |
44 |
|
T99 |
22 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
646 |
1 |
|
|
T38 |
20 |
|
T98 |
24 |
|
T99 |
5 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1398 |
1 |
|
|
T38 |
29 |
|
T98 |
37 |
|
T99 |
28 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
655 |
1 |
|
|
T38 |
13 |
|
T98 |
19 |
|
T99 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1391 |
1 |
|
|
T38 |
38 |
|
T98 |
44 |
|
T99 |
21 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
646 |
1 |
|
|
T38 |
20 |
|
T98 |
24 |
|
T99 |
5 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1369 |
1 |
|
|
T38 |
29 |
|
T98 |
37 |
|
T99 |
28 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
650 |
1 |
|
|
T38 |
12 |
|
T98 |
19 |
|
T99 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1358 |
1 |
|
|
T38 |
37 |
|
T98 |
41 |
|
T99 |
20 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
644 |
1 |
|
|
T38 |
20 |
|
T98 |
24 |
|
T99 |
5 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1337 |
1 |
|
|
T38 |
27 |
|
T98 |
36 |
|
T99 |
26 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
650 |
1 |
|
|
T38 |
12 |
|
T98 |
19 |
|
T99 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1324 |
1 |
|
|
T38 |
35 |
|
T98 |
40 |
|
T99 |
20 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
644 |
1 |
|
|
T38 |
20 |
|
T98 |
24 |
|
T99 |
5 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1317 |
1 |
|
|
T38 |
24 |
|
T98 |
34 |
|
T99 |
25 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
648 |
1 |
|
|
T38 |
12 |
|
T98 |
19 |
|
T99 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1293 |
1 |
|
|
T38 |
35 |
|
T98 |
39 |
|
T99 |
17 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
640 |
1 |
|
|
T38 |
20 |
|
T98 |
24 |
|
T99 |
5 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1282 |
1 |
|
|
T38 |
24 |
|
T98 |
33 |
|
T99 |
24 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
648 |
1 |
|
|
T38 |
12 |
|
T98 |
19 |
|
T99 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1260 |
1 |
|
|
T38 |
35 |
|
T98 |
38 |
|
T99 |
17 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
640 |
1 |
|
|
T38 |
20 |
|
T98 |
24 |
|
T99 |
5 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1249 |
1 |
|
|
T38 |
21 |
|
T98 |
31 |
|
T99 |
24 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
646 |
1 |
|
|
T38 |
12 |
|
T98 |
19 |
|
T99 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1220 |
1 |
|
|
T38 |
34 |
|
T98 |
35 |
|
T99 |
17 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
639 |
1 |
|
|
T38 |
20 |
|
T98 |
24 |
|
T99 |
5 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1213 |
1 |
|
|
T38 |
21 |
|
T98 |
31 |
|
T99 |
24 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
646 |
1 |
|
|
T38 |
12 |
|
T98 |
19 |
|
T99 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1186 |
1 |
|
|
T38 |
34 |
|
T98 |
33 |
|
T99 |
16 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
639 |
1 |
|
|
T38 |
20 |
|
T98 |
24 |
|
T99 |
5 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1180 |
1 |
|
|
T38 |
21 |
|
T98 |
30 |
|
T99 |
23 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
646 |
1 |
|
|
T38 |
12 |
|
T98 |
19 |
|
T99 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1157 |
1 |
|
|
T38 |
34 |
|
T98 |
32 |
|
T99 |
16 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
639 |
1 |
|
|
T38 |
20 |
|
T98 |
24 |
|
T99 |
5 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1147 |
1 |
|
|
T38 |
20 |
|
T98 |
29 |
|
T99 |
23 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
646 |
1 |
|
|
T38 |
12 |
|
T98 |
19 |
|
T99 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1126 |
1 |
|
|
T38 |
33 |
|
T98 |
32 |
|
T99 |
16 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
639 |
1 |
|
|
T38 |
20 |
|
T98 |
24 |
|
T99 |
5 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1115 |
1 |
|
|
T38 |
19 |
|
T98 |
28 |
|
T99 |
22 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
646 |
1 |
|
|
T38 |
12 |
|
T98 |
19 |
|
T99 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1097 |
1 |
|
|
T38 |
32 |
|
T98 |
31 |
|
T99 |
16 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
639 |
1 |
|
|
T38 |
20 |
|
T98 |
24 |
|
T99 |
5 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1086 |
1 |
|
|
T38 |
19 |
|
T98 |
27 |
|
T99 |
21 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[0] |
auto[0] |
55191 |
1 |
|
|
T38 |
1924 |
|
T98 |
1565 |
|
T99 |
1492 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44143 |
1 |
|
|
T38 |
1150 |
|
T98 |
2183 |
|
T99 |
410 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[1] |
auto[0] |
50604 |
1 |
|
|
T38 |
654 |
|
T98 |
1550 |
|
T99 |
872 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[1] |
auto[1] |
41186 |
1 |
|
|
T38 |
891 |
|
T98 |
905 |
|
T99 |
608 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
669 |
1 |
|
|
T38 |
12 |
|
T98 |
29 |
|
T99 |
12 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1532 |
1 |
|
|
T38 |
50 |
|
T98 |
38 |
|
T99 |
23 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
655 |
1 |
|
|
T38 |
11 |
|
T98 |
25 |
|
T99 |
10 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1537 |
1 |
|
|
T38 |
50 |
|
T98 |
42 |
|
T99 |
24 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
669 |
1 |
|
|
T38 |
12 |
|
T98 |
29 |
|
T99 |
12 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1496 |
1 |
|
|
T38 |
48 |
|
T98 |
37 |
|
T99 |
22 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
655 |
1 |
|
|
T38 |
11 |
|
T98 |
25 |
|
T99 |
10 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1505 |
1 |
|
|
T38 |
49 |
|
T98 |
42 |
|
T99 |
24 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
668 |
1 |
|
|
T38 |
11 |
|
T98 |
29 |
|
T99 |
12 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1461 |
1 |
|
|
T38 |
49 |
|
T98 |
37 |
|
T99 |
22 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
655 |
1 |
|
|
T38 |
11 |
|
T98 |
25 |
|
T99 |
10 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1470 |
1 |
|
|
T38 |
49 |
|
T98 |
42 |
|
T99 |
24 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
668 |
1 |
|
|
T38 |
11 |
|
T98 |
29 |
|
T99 |
12 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1425 |
1 |
|
|
T38 |
49 |
|
T98 |
36 |
|
T99 |
21 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
655 |
1 |
|
|
T38 |
11 |
|
T98 |
25 |
|
T99 |
10 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1435 |
1 |
|
|
T38 |
48 |
|
T98 |
40 |
|
T99 |
24 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
662 |
1 |
|
|
T38 |
11 |
|
T98 |
29 |
|
T99 |
12 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1401 |
1 |
|
|
T38 |
48 |
|
T98 |
35 |
|
T99 |
21 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
651 |
1 |
|
|
T38 |
11 |
|
T98 |
25 |
|
T99 |
10 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1410 |
1 |
|
|
T38 |
47 |
|
T98 |
40 |
|
T99 |
23 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
662 |
1 |
|
|
T38 |
11 |
|
T98 |
29 |
|
T99 |
12 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1369 |
1 |
|
|
T38 |
47 |
|
T98 |
34 |
|
T99 |
21 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
651 |
1 |
|
|
T38 |
11 |
|
T98 |
25 |
|
T99 |
10 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1387 |
1 |
|
|
T38 |
46 |
|
T98 |
39 |
|
T99 |
23 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
660 |
1 |
|
|
T38 |
11 |
|
T98 |
29 |
|
T99 |
12 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1345 |
1 |
|
|
T38 |
47 |
|
T98 |
34 |
|
T99 |
19 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
649 |
1 |
|
|
T38 |
11 |
|
T98 |
25 |
|
T99 |
10 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1355 |
1 |
|
|
T38 |
46 |
|
T98 |
39 |
|
T99 |
23 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
660 |
1 |
|
|
T38 |
11 |
|
T98 |
29 |
|
T99 |
12 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1307 |
1 |
|
|
T38 |
44 |
|
T98 |
33 |
|
T99 |
19 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
649 |
1 |
|
|
T38 |
11 |
|
T98 |
25 |
|
T99 |
10 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1319 |
1 |
|
|
T38 |
45 |
|
T98 |
37 |
|
T99 |
23 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
656 |
1 |
|
|
T38 |
11 |
|
T98 |
29 |
|
T99 |
11 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1279 |
1 |
|
|
T38 |
43 |
|
T98 |
33 |
|
T99 |
18 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
643 |
1 |
|
|
T38 |
11 |
|
T98 |
24 |
|
T99 |
10 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1293 |
1 |
|
|
T38 |
44 |
|
T98 |
35 |
|
T99 |
23 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
656 |
1 |
|
|
T38 |
11 |
|
T98 |
29 |
|
T99 |
11 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1248 |
1 |
|
|
T38 |
41 |
|
T98 |
31 |
|
T99 |
18 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
643 |
1 |
|
|
T38 |
11 |
|
T98 |
24 |
|
T99 |
10 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1266 |
1 |
|
|
T38 |
43 |
|
T98 |
34 |
|
T99 |
23 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
653 |
1 |
|
|
T38 |
11 |
|
T98 |
29 |
|
T99 |
11 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1224 |
1 |
|
|
T38 |
39 |
|
T98 |
31 |
|
T99 |
17 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
641 |
1 |
|
|
T38 |
11 |
|
T98 |
24 |
|
T99 |
10 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1228 |
1 |
|
|
T38 |
41 |
|
T98 |
33 |
|
T99 |
22 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
653 |
1 |
|
|
T38 |
11 |
|
T98 |
29 |
|
T99 |
11 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1184 |
1 |
|
|
T38 |
37 |
|
T98 |
30 |
|
T99 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
641 |
1 |
|
|
T38 |
11 |
|
T98 |
24 |
|
T99 |
10 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1194 |
1 |
|
|
T38 |
40 |
|
T98 |
32 |
|
T99 |
21 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
651 |
1 |
|
|
T38 |
11 |
|
T98 |
29 |
|
T99 |
11 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1159 |
1 |
|
|
T38 |
36 |
|
T98 |
30 |
|
T99 |
13 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
641 |
1 |
|
|
T38 |
11 |
|
T98 |
24 |
|
T99 |
10 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1168 |
1 |
|
|
T38 |
39 |
|
T98 |
32 |
|
T99 |
20 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
651 |
1 |
|
|
T38 |
11 |
|
T98 |
29 |
|
T99 |
11 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1135 |
1 |
|
|
T38 |
35 |
|
T98 |
30 |
|
T99 |
13 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
641 |
1 |
|
|
T38 |
11 |
|
T98 |
24 |
|
T99 |
10 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1134 |
1 |
|
|
T38 |
38 |
|
T98 |
31 |
|
T99 |
20 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
651 |
1 |
|
|
T38 |
11 |
|
T98 |
29 |
|
T99 |
11 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1101 |
1 |
|
|
T38 |
34 |
|
T98 |
30 |
|
T99 |
12 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
641 |
1 |
|
|
T38 |
11 |
|
T98 |
24 |
|
T99 |
10 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1111 |
1 |
|
|
T38 |
37 |
|
T98 |
29 |
|
T99 |
20 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[0] |
auto[0] |
50518 |
1 |
|
|
T38 |
1149 |
|
T98 |
1193 |
|
T99 |
2001 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[0] |
auto[1] |
41331 |
1 |
|
|
T38 |
948 |
|
T98 |
1151 |
|
T99 |
338 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59099 |
1 |
|
|
T38 |
2341 |
|
T98 |
2589 |
|
T99 |
766 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[1] |
auto[1] |
41047 |
1 |
|
|
T38 |
602 |
|
T98 |
1021 |
|
T99 |
334 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
637 |
1 |
|
|
T38 |
15 |
|
T98 |
21 |
|
T99 |
15 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1507 |
1 |
|
|
T38 |
29 |
|
T98 |
54 |
|
T99 |
17 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
661 |
1 |
|
|
T38 |
16 |
|
T98 |
25 |
|
T99 |
14 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1481 |
1 |
|
|
T38 |
28 |
|
T98 |
51 |
|
T99 |
17 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
637 |
1 |
|
|
T38 |
15 |
|
T98 |
21 |
|
T99 |
15 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1487 |
1 |
|
|
T38 |
27 |
|
T98 |
53 |
|
T99 |
17 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
661 |
1 |
|
|
T38 |
16 |
|
T98 |
25 |
|
T99 |
14 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1463 |
1 |
|
|
T38 |
28 |
|
T98 |
51 |
|
T99 |
17 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
637 |
1 |
|
|
T38 |
15 |
|
T98 |
21 |
|
T99 |
15 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1456 |
1 |
|
|
T38 |
27 |
|
T98 |
53 |
|
T99 |
17 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
660 |
1 |
|
|
T38 |
16 |
|
T98 |
25 |
|
T99 |
14 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1431 |
1 |
|
|
T38 |
28 |
|
T98 |
49 |
|
T99 |
17 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
637 |
1 |
|
|
T38 |
15 |
|
T98 |
21 |
|
T99 |
15 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1426 |
1 |
|
|
T38 |
27 |
|
T98 |
53 |
|
T99 |
17 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
660 |
1 |
|
|
T38 |
16 |
|
T98 |
25 |
|
T99 |
14 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1402 |
1 |
|
|
T38 |
27 |
|
T98 |
48 |
|
T99 |
17 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
629 |
1 |
|
|
T38 |
15 |
|
T98 |
21 |
|
T99 |
14 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1408 |
1 |
|
|
T38 |
27 |
|
T98 |
53 |
|
T99 |
17 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
656 |
1 |
|
|
T38 |
16 |
|
T98 |
25 |
|
T99 |
14 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1371 |
1 |
|
|
T38 |
26 |
|
T98 |
48 |
|
T99 |
17 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
629 |
1 |
|
|
T38 |
15 |
|
T98 |
21 |
|
T99 |
14 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1380 |
1 |
|
|
T38 |
27 |
|
T98 |
53 |
|
T99 |
17 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
656 |
1 |
|
|
T38 |
16 |
|
T98 |
25 |
|
T99 |
14 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1344 |
1 |
|
|
T38 |
26 |
|
T98 |
47 |
|
T99 |
15 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
621 |
1 |
|
|
T38 |
14 |
|
T98 |
21 |
|
T99 |
14 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1349 |
1 |
|
|
T38 |
27 |
|
T98 |
51 |
|
T99 |
17 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
653 |
1 |
|
|
T38 |
16 |
|
T98 |
25 |
|
T99 |
14 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1309 |
1 |
|
|
T38 |
24 |
|
T98 |
46 |
|
T99 |
15 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
621 |
1 |
|
|
T38 |
14 |
|
T98 |
21 |
|
T99 |
14 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1328 |
1 |
|
|
T38 |
27 |
|
T98 |
51 |
|
T99 |
16 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
653 |
1 |
|
|
T38 |
16 |
|
T98 |
25 |
|
T99 |
14 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1274 |
1 |
|
|
T38 |
24 |
|
T98 |
44 |
|
T99 |
15 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
616 |
1 |
|
|
T38 |
14 |
|
T98 |
21 |
|
T99 |
14 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1298 |
1 |
|
|
T38 |
27 |
|
T98 |
48 |
|
T99 |
14 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
649 |
1 |
|
|
T38 |
16 |
|
T98 |
24 |
|
T99 |
14 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1250 |
1 |
|
|
T38 |
24 |
|
T98 |
43 |
|
T99 |
15 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
616 |
1 |
|
|
T38 |
14 |
|
T98 |
21 |
|
T99 |
14 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1266 |
1 |
|
|
T38 |
27 |
|
T98 |
47 |
|
T99 |
13 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
649 |
1 |
|
|
T38 |
16 |
|
T98 |
24 |
|
T99 |
14 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1224 |
1 |
|
|
T38 |
24 |
|
T98 |
43 |
|
T99 |
15 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
615 |
1 |
|
|
T38 |
14 |
|
T98 |
21 |
|
T99 |
14 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1241 |
1 |
|
|
T38 |
26 |
|
T98 |
47 |
|
T99 |
13 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
648 |
1 |
|
|
T38 |
16 |
|
T98 |
24 |
|
T99 |
14 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1190 |
1 |
|
|
T38 |
23 |
|
T98 |
42 |
|
T99 |
14 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
615 |
1 |
|
|
T38 |
14 |
|
T98 |
21 |
|
T99 |
14 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1217 |
1 |
|
|
T38 |
24 |
|
T98 |
47 |
|
T99 |
13 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
648 |
1 |
|
|
T38 |
16 |
|
T98 |
24 |
|
T99 |
14 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1159 |
1 |
|
|
T38 |
23 |
|
T98 |
42 |
|
T99 |
13 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
615 |
1 |
|
|
T38 |
14 |
|
T98 |
21 |
|
T99 |
14 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1191 |
1 |
|
|
T38 |
24 |
|
T98 |
45 |
|
T99 |
13 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
647 |
1 |
|
|
T38 |
16 |
|
T98 |
24 |
|
T99 |
14 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1131 |
1 |
|
|
T38 |
22 |
|
T98 |
41 |
|
T99 |
13 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
615 |
1 |
|
|
T38 |
14 |
|
T98 |
21 |
|
T99 |
14 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1166 |
1 |
|
|
T38 |
24 |
|
T98 |
45 |
|
T99 |
13 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
647 |
1 |
|
|
T38 |
16 |
|
T98 |
24 |
|
T99 |
14 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1100 |
1 |
|
|
T38 |
22 |
|
T98 |
39 |
|
T99 |
13 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
615 |
1 |
|
|
T38 |
14 |
|
T98 |
21 |
|
T99 |
14 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1141 |
1 |
|
|
T38 |
23 |
|
T98 |
45 |
|
T99 |
12 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
647 |
1 |
|
|
T38 |
16 |
|
T98 |
24 |
|
T99 |
14 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1067 |
1 |
|
|
T38 |
22 |
|
T98 |
36 |
|
T99 |
13 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56764 |
1 |
|
|
T38 |
2441 |
|
T98 |
1923 |
|
T99 |
912 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[0] |
auto[1] |
36315 |
1 |
|
|
T38 |
657 |
|
T98 |
755 |
|
T99 |
277 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[1] |
auto[0] |
52425 |
1 |
|
|
T38 |
916 |
|
T98 |
1410 |
|
T99 |
1118 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46557 |
1 |
|
|
T38 |
796 |
|
T98 |
2190 |
|
T99 |
1136 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
649 |
1 |
|
|
T38 |
16 |
|
T98 |
28 |
|
T99 |
16 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1511 |
1 |
|
|
T38 |
38 |
|
T98 |
37 |
|
T99 |
16 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
669 |
1 |
|
|
T38 |
11 |
|
T98 |
26 |
|
T99 |
12 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1486 |
1 |
|
|
T38 |
42 |
|
T98 |
40 |
|
T99 |
20 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
649 |
1 |
|
|
T38 |
16 |
|
T98 |
28 |
|
T99 |
16 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1472 |
1 |
|
|
T38 |
37 |
|
T98 |
34 |
|
T99 |
16 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
669 |
1 |
|
|
T38 |
11 |
|
T98 |
26 |
|
T99 |
12 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1465 |
1 |
|
|
T38 |
41 |
|
T98 |
40 |
|
T99 |
20 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
648 |
1 |
|
|
T38 |
16 |
|
T98 |
28 |
|
T99 |
16 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1446 |
1 |
|
|
T38 |
37 |
|
T98 |
34 |
|
T99 |
15 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
669 |
1 |
|
|
T38 |
11 |
|
T98 |
26 |
|
T99 |
12 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1435 |
1 |
|
|
T38 |
40 |
|
T98 |
39 |
|
T99 |
20 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
648 |
1 |
|
|
T38 |
16 |
|
T98 |
28 |
|
T99 |
16 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1407 |
1 |
|
|
T38 |
37 |
|
T98 |
34 |
|
T99 |
13 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
669 |
1 |
|
|
T38 |
11 |
|
T98 |
26 |
|
T99 |
12 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1410 |
1 |
|
|
T38 |
40 |
|
T98 |
37 |
|
T99 |
20 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
641 |
1 |
|
|
T38 |
16 |
|
T98 |
28 |
|
T99 |
15 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1388 |
1 |
|
|
T38 |
37 |
|
T98 |
33 |
|
T99 |
14 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
661 |
1 |
|
|
T38 |
11 |
|
T98 |
26 |
|
T99 |
12 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1372 |
1 |
|
|
T38 |
39 |
|
T98 |
36 |
|
T99 |
19 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
641 |
1 |
|
|
T38 |
16 |
|
T98 |
28 |
|
T99 |
15 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1358 |
1 |
|
|
T38 |
37 |
|
T98 |
33 |
|
T99 |
14 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
661 |
1 |
|
|
T38 |
11 |
|
T98 |
26 |
|
T99 |
12 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1343 |
1 |
|
|
T38 |
38 |
|
T98 |
32 |
|
T99 |
18 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
638 |
1 |
|
|
T38 |
16 |
|
T98 |
28 |
|
T99 |
15 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1331 |
1 |
|
|
T38 |
36 |
|
T98 |
33 |
|
T99 |
14 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
658 |
1 |
|
|
T38 |
11 |
|
T98 |
26 |
|
T99 |
12 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1308 |
1 |
|
|
T38 |
38 |
|
T98 |
30 |
|
T99 |
18 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
638 |
1 |
|
|
T38 |
16 |
|
T98 |
28 |
|
T99 |
15 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1301 |
1 |
|
|
T38 |
34 |
|
T98 |
33 |
|
T99 |
13 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
658 |
1 |
|
|
T38 |
11 |
|
T98 |
26 |
|
T99 |
12 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1278 |
1 |
|
|
T38 |
38 |
|
T98 |
30 |
|
T99 |
18 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
638 |
1 |
|
|
T38 |
16 |
|
T98 |
28 |
|
T99 |
15 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1268 |
1 |
|
|
T38 |
33 |
|
T98 |
33 |
|
T99 |
12 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
657 |
1 |
|
|
T38 |
11 |
|
T98 |
26 |
|
T99 |
12 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1246 |
1 |
|
|
T38 |
36 |
|
T98 |
30 |
|
T99 |
18 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
638 |
1 |
|
|
T38 |
16 |
|
T98 |
28 |
|
T99 |
15 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1223 |
1 |
|
|
T38 |
32 |
|
T98 |
31 |
|
T99 |
11 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
657 |
1 |
|
|
T38 |
11 |
|
T98 |
26 |
|
T99 |
12 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1218 |
1 |
|
|
T38 |
34 |
|
T98 |
30 |
|
T99 |
18 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
636 |
1 |
|
|
T38 |
16 |
|
T98 |
28 |
|
T99 |
15 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1194 |
1 |
|
|
T38 |
31 |
|
T98 |
29 |
|
T99 |
11 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
656 |
1 |
|
|
T38 |
11 |
|
T98 |
26 |
|
T99 |
12 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1188 |
1 |
|
|
T38 |
33 |
|
T98 |
30 |
|
T99 |
18 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
636 |
1 |
|
|
T38 |
16 |
|
T98 |
28 |
|
T99 |
15 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1170 |
1 |
|
|
T38 |
30 |
|
T98 |
29 |
|
T99 |
11 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
656 |
1 |
|
|
T38 |
11 |
|
T98 |
26 |
|
T99 |
12 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1159 |
1 |
|
|
T38 |
31 |
|
T98 |
30 |
|
T99 |
17 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
634 |
1 |
|
|
T38 |
16 |
|
T98 |
28 |
|
T99 |
15 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1135 |
1 |
|
|
T38 |
29 |
|
T98 |
28 |
|
T99 |
10 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
655 |
1 |
|
|
T38 |
11 |
|
T98 |
26 |
|
T99 |
12 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1130 |
1 |
|
|
T38 |
31 |
|
T98 |
28 |
|
T99 |
17 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
634 |
1 |
|
|
T38 |
16 |
|
T98 |
28 |
|
T99 |
15 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1114 |
1 |
|
|
T38 |
27 |
|
T98 |
28 |
|
T99 |
10 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
655 |
1 |
|
|
T38 |
11 |
|
T98 |
26 |
|
T99 |
12 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1105 |
1 |
|
|
T38 |
31 |
|
T98 |
28 |
|
T99 |
17 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
634 |
1 |
|
|
T38 |
16 |
|
T98 |
28 |
|
T99 |
15 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1090 |
1 |
|
|
T38 |
27 |
|
T98 |
27 |
|
T99 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
655 |
1 |
|
|
T38 |
11 |
|
T98 |
26 |
|
T99 |
12 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1083 |
1 |
|
|
T38 |
31 |
|
T98 |
28 |
|
T99 |
17 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56896 |
1 |
|
|
T38 |
1076 |
|
T98 |
1598 |
|
T99 |
744 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[0] |
auto[1] |
40474 |
1 |
|
|
T38 |
631 |
|
T98 |
873 |
|
T99 |
536 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[1] |
auto[0] |
48500 |
1 |
|
|
T38 |
2468 |
|
T98 |
1350 |
|
T99 |
811 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46585 |
1 |
|
|
T38 |
784 |
|
T98 |
2372 |
|
T99 |
1297 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
664 |
1 |
|
|
T38 |
13 |
|
T98 |
20 |
|
T99 |
12 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1472 |
1 |
|
|
T38 |
36 |
|
T98 |
49 |
|
T99 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
655 |
1 |
|
|
T38 |
18 |
|
T98 |
22 |
|
T99 |
12 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1474 |
1 |
|
|
T38 |
31 |
|
T98 |
48 |
|
T99 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
664 |
1 |
|
|
T38 |
13 |
|
T98 |
20 |
|
T99 |
12 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1444 |
1 |
|
|
T38 |
34 |
|
T98 |
48 |
|
T99 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
655 |
1 |
|
|
T38 |
18 |
|
T98 |
22 |
|
T99 |
12 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1434 |
1 |
|
|
T38 |
31 |
|
T98 |
43 |
|
T99 |
21 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
664 |
1 |
|
|
T38 |
13 |
|
T98 |
20 |
|
T99 |
12 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1420 |
1 |
|
|
T38 |
32 |
|
T98 |
46 |
|
T99 |
21 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
654 |
1 |
|
|
T38 |
18 |
|
T98 |
22 |
|
T99 |
12 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1405 |
1 |
|
|
T38 |
31 |
|
T98 |
43 |
|
T99 |
20 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
664 |
1 |
|
|
T38 |
13 |
|
T98 |
20 |
|
T99 |
12 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1388 |
1 |
|
|
T38 |
32 |
|
T98 |
44 |
|
T99 |
21 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
654 |
1 |
|
|
T38 |
18 |
|
T98 |
22 |
|
T99 |
12 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1383 |
1 |
|
|
T38 |
29 |
|
T98 |
43 |
|
T99 |
20 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
655 |
1 |
|
|
T38 |
13 |
|
T98 |
20 |
|
T99 |
11 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1369 |
1 |
|
|
T38 |
32 |
|
T98 |
44 |
|
T99 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
653 |
1 |
|
|
T38 |
18 |
|
T98 |
22 |
|
T99 |
12 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1360 |
1 |
|
|
T38 |
28 |
|
T98 |
43 |
|
T99 |
20 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
655 |
1 |
|
|
T38 |
13 |
|
T98 |
20 |
|
T99 |
11 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1337 |
1 |
|
|
T38 |
30 |
|
T98 |
42 |
|
T99 |
21 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
653 |
1 |
|
|
T38 |
18 |
|
T98 |
22 |
|
T99 |
12 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1333 |
1 |
|
|
T38 |
28 |
|
T98 |
41 |
|
T99 |
20 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
653 |
1 |
|
|
T38 |
12 |
|
T98 |
20 |
|
T99 |
11 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1311 |
1 |
|
|
T38 |
30 |
|
T98 |
42 |
|
T99 |
19 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
651 |
1 |
|
|
T38 |
18 |
|
T98 |
22 |
|
T99 |
12 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1306 |
1 |
|
|
T38 |
27 |
|
T98 |
40 |
|
T99 |
20 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
653 |
1 |
|
|
T38 |
12 |
|
T98 |
20 |
|
T99 |
11 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1286 |
1 |
|
|
T38 |
29 |
|
T98 |
41 |
|
T99 |
19 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
651 |
1 |
|
|
T38 |
18 |
|
T98 |
22 |
|
T99 |
12 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1274 |
1 |
|
|
T38 |
26 |
|
T98 |
39 |
|
T99 |
20 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
651 |
1 |
|
|
T38 |
12 |
|
T98 |
20 |
|
T99 |
11 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1250 |
1 |
|
|
T38 |
29 |
|
T98 |
41 |
|
T99 |
19 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
647 |
1 |
|
|
T38 |
18 |
|
T98 |
22 |
|
T99 |
12 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1245 |
1 |
|
|
T38 |
26 |
|
T98 |
39 |
|
T99 |
19 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
651 |
1 |
|
|
T38 |
12 |
|
T98 |
20 |
|
T99 |
11 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1216 |
1 |
|
|
T38 |
28 |
|
T98 |
40 |
|
T99 |
18 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
647 |
1 |
|
|
T38 |
18 |
|
T98 |
22 |
|
T99 |
12 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1215 |
1 |
|
|
T38 |
26 |
|
T98 |
39 |
|
T99 |
19 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
648 |
1 |
|
|
T38 |
12 |
|
T98 |
20 |
|
T99 |
11 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1184 |
1 |
|
|
T38 |
28 |
|
T98 |
40 |
|
T99 |
17 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
646 |
1 |
|
|
T38 |
18 |
|
T98 |
22 |
|
T99 |
12 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1184 |
1 |
|
|
T38 |
26 |
|
T98 |
39 |
|
T99 |
19 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
648 |
1 |
|
|
T38 |
12 |
|
T98 |
20 |
|
T99 |
11 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1153 |
1 |
|
|
T38 |
26 |
|
T98 |
38 |
|
T99 |
16 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
646 |
1 |
|
|
T38 |
18 |
|
T98 |
22 |
|
T99 |
12 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1158 |
1 |
|
|
T38 |
25 |
|
T98 |
38 |
|
T99 |
19 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
648 |
1 |
|
|
T38 |
12 |
|
T98 |
20 |
|
T99 |
11 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1125 |
1 |
|
|
T38 |
26 |
|
T98 |
37 |
|
T99 |
16 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
645 |
1 |
|
|
T38 |
18 |
|
T98 |
22 |
|
T99 |
12 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1130 |
1 |
|
|
T38 |
25 |
|
T98 |
38 |
|
T99 |
18 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
648 |
1 |
|
|
T38 |
12 |
|
T98 |
20 |
|
T99 |
11 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1096 |
1 |
|
|
T38 |
25 |
|
T98 |
37 |
|
T99 |
16 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
645 |
1 |
|
|
T38 |
18 |
|
T98 |
22 |
|
T99 |
12 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1098 |
1 |
|
|
T38 |
23 |
|
T98 |
37 |
|
T99 |
18 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
648 |
1 |
|
|
T38 |
12 |
|
T98 |
20 |
|
T99 |
11 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1064 |
1 |
|
|
T38 |
24 |
|
T98 |
34 |
|
T99 |
16 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
645 |
1 |
|
|
T38 |
18 |
|
T98 |
22 |
|
T99 |
12 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1072 |
1 |
|
|
T38 |
22 |
|
T98 |
36 |
|
T99 |
18 |