Summary for Variable intr_en
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
8182160 |
1 |
|
|
T30 |
1 |
|
T31 |
273 |
|
T32 |
55284 |
auto[1] |
6029130 |
1 |
|
|
T34 |
584 |
|
T35 |
372 |
|
T37 |
278767 |
Summary for Variable intr_state
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
11692612 |
1 |
|
|
T30 |
1 |
|
T31 |
273 |
|
T32 |
55284 |
auto[1] |
2518678 |
1 |
|
|
T34 |
261 |
|
T35 |
131 |
|
T37 |
105715 |
Summary for Variable type_ctrl_en
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
8170487 |
1 |
|
|
T30 |
1 |
|
T31 |
273 |
|
T32 |
55284 |
auto[1] |
6040803 |
1 |
|
|
T34 |
534 |
|
T35 |
235 |
|
T37 |
277991 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
TOTAL |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[1] |
auto[0] |
auto[0] |
1758098 |
1 |
|
|
T34 |
111 |
|
T35 |
13 |
|
T37 |
86422 |
auto[1] |
auto[0] |
auto[1] |
1260918 |
1 |
|
|
T34 |
111 |
|
T35 |
8 |
|
T37 |
54462 |
auto[1] |
auto[1] |
auto[0] |
1764027 |
1 |
|
|
T34 |
162 |
|
T35 |
91 |
|
T37 |
85854 |
auto[1] |
auto[1] |
auto[1] |
1257760 |
1 |
|
|
T34 |
150 |
|
T35 |
123 |
|
T37 |
51253 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
NAME | COUNT | STATUS |
intr_type_disabled |
0 |
Excluded |