Unified Coverage Report :: Group :: cip_base_pkg::intr_test_cg::SHAPE{(num_interrupts - 1)=31}

Group : cip_base_pkg::intr_test_cg::SHAPE{(num_interrupts - 1)=31}

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_cip_lib_0/cip_base_env_cov.sv

---

Summary for Group cip_base_pkg::intr_test_cg::SHAPE{(num_interrupts - 1)=31}

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	38	0	38	100.00
Crosses	192	0	192	100.00

Variables for Group cip_base_pkg::intr_test_cg::SHAPE{(num_interrupts - 1)=31}

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_intr	32	0	32	100.00	100	1	1	0
cp_intr_en	2	0	2	100.00	100	1	1	2
cp_intr_state	2	0	2	100.00	100	1	1	2
cp_intr_test	2	0	2	100.00	100	1	1	2

Crosses for Group cip_base_pkg::intr_test_cg::SHAPE{(num_interrupts - 1)=31}

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
intr_test_cg_cc	192	0	192	100.00	100	1	1	0

Summary for Variable cp_intr

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	32	0	32	100.00

User Defined Bins for cp_intr

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_values[0]	14118675	1			T1	15123		T11	333		T12	209
all_values[1]	14118675	1			T1	15123		T11	333		T12	209
all_values[2]	14118675	1			T1	15123		T11	333		T12	209
all_values[3]	14118675	1			T1	15123		T11	333		T12	209
all_values[4]	14118675	1			T1	15123		T11	333		T12	209
all_values[5]	14118675	1			T1	15123		T11	333		T12	209
all_values[6]	14118675	1			T1	15123		T11	333		T12	209
all_values[7]	14118675	1			T1	15123		T11	333		T12	209
all_values[8]	14118675	1			T1	15123		T11	333		T12	209
all_values[9]	14118675	1			T1	15123		T11	333		T12	209
all_values[10]	14118675	1			T1	15123		T11	333		T12	209
all_values[11]	14118675	1			T1	15123		T11	333		T12	209
all_values[12]	14118675	1			T1	15123		T11	333		T12	209
all_values[13]	14118675	1			T1	15123		T11	333		T12	209
all_values[14]	14118675	1			T1	15123		T11	333		T12	209
all_values[15]	14118675	1			T1	15123		T11	333		T12	209
all_values[16]	14118675	1			T1	15123		T11	333		T12	209
all_values[17]	14118675	1			T1	15123		T11	333		T12	209
all_values[18]	14118675	1			T1	15123		T11	333		T12	209
all_values[19]	14118675	1			T1	15123		T11	333		T12	209
all_values[20]	14118675	1			T1	15123		T11	333		T12	209
all_values[21]	14118675	1			T1	15123		T11	333		T12	209
all_values[22]	14118675	1			T1	15123		T11	333		T12	209
all_values[23]	14118675	1			T1	15123		T11	333		T12	209
all_values[24]	14118675	1			T1	15123		T11	333		T12	209
all_values[25]	14118675	1			T1	15123		T11	333		T12	209
all_values[26]	14118675	1			T1	15123		T11	333		T12	209
all_values[27]	14118675	1			T1	15123		T11	333		T12	209
all_values[28]	14118675	1			T1	15123		T11	333		T12	209
all_values[29]	14118675	1			T1	15123		T11	333		T12	209
all_values[30]	14118675	1			T1	15123		T11	333		T12	209
all_values[31]	14118675	1			T1	15123		T11	333		T12	209

---

Summary for Variable cp_intr_en

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_intr_en

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

260051766

1

T1

276951

T11

10656

T12

6688

auto[1]

191745834

1

T1

206985

T14

145658

T17

1389

---

Summary for Variable cp_intr_state

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_intr_state

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

105080203

1

T1

90955

T11

10656

T12

6688

auto[1]

346717397

1

T1

392981

T14

262649

T17

2955

---

Summary for Variable cp_intr_test

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_intr_test

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

446862926

1

T1

482680

T11

10656

T12

6688

auto[1]

4934674

1

T1

1256

T14

42647

T25

83981

---

Summary for Cross intr_test_cg_cc

Samples crossed: cp_intr cp_intr_test cp_intr_en cp_intr_state

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
TOTAL	192	0	192	100.00
Automatically Generated Cross Bins	192	0	192	100.00
User Defined Cross Bins	0	0	0

Automatically Generated Cross Bins for intr_test_cg_cc

Bins

cp_intr	cp_intr_test	cp_intr_en	cp_intr_state	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_values[0]	auto[0]	auto[0]	auto[0]	2707789	1			T1	2279		T11	333		T12	209
all_values[0]	auto[0]	auto[0]	auto[1]	5333221	1			T1	6805		T14	40338		T17	40
all_values[0]	auto[0]	auto[1]	auto[0]	577902	1			T1	655		T14	5161		T17	4
all_values[0]	auto[0]	auto[1]	auto[1]	5345953	1			T1	5343		T14	39710		T17	67
all_values[0]	auto[1]	auto[0]	auto[1]	77064	1			T1	28		T14	672		T25	1314
all_values[0]	auto[1]	auto[1]	auto[1]	76746	1			T1	13		T14	707		T25	1225
all_values[1]	auto[0]	auto[0]	auto[0]	2700987	1			T1	2219		T11	333		T12	209
all_values[1]	auto[0]	auto[0]	auto[1]	5320329	1			T1	7160		T14	40120		T17	52
all_values[1]	auto[0]	auto[1]	auto[0]	573599	1			T1	486		T14	4251		T17	14
all_values[1]	auto[0]	auto[1]	auto[1]	5369462	1			T1	5224		T14	40792		T17	27
all_values[1]	auto[1]	auto[0]	auto[1]	77604	1			T1	19		T14	715		T25	1309
all_values[1]	auto[1]	auto[1]	auto[1]	76694	1			T1	15		T14	646		T25	1313
all_values[2]	auto[0]	auto[0]	auto[0]	2706080	1			T1	2418		T11	333		T12	209
all_values[2]	auto[0]	auto[0]	auto[1]	5348804	1			T1	6564		T14	38904		T17	61
all_values[2]	auto[0]	auto[1]	auto[0]	582695	1			T1	512		T14	4268		T17	1
all_values[2]	auto[0]	auto[1]	auto[1]	5327355	1			T1	5589		T14	42419		T17	39
all_values[2]	auto[1]	auto[0]	auto[1]	77130	1			T1	20		T14	672		T25	1355
all_values[2]	auto[1]	auto[1]	auto[1]	76611	1			T1	20		T14	650		T25	1317
all_values[3]	auto[0]	auto[0]	auto[0]	2698391	1			T1	2338		T11	333		T12	209
all_values[3]	auto[0]	auto[0]	auto[1]	5351940	1			T1	6346		T14	40121		T17	43
all_values[3]	auto[0]	auto[1]	auto[0]	578116	1			T1	450		T14	4362		T17	1
all_values[3]	auto[0]	auto[1]	auto[1]	5335284	1			T1	5952		T14	40670		T17	53
all_values[3]	auto[1]	auto[0]	auto[1]	77853	1			T1	20		T14	684		T25	1317
all_values[3]	auto[1]	auto[1]	auto[1]	77091	1			T1	17		T14	679		T25	1322
all_values[4]	auto[0]	auto[0]	auto[0]	2705344	1			T1	2247		T11	333		T12	209
all_values[4]	auto[0]	auto[0]	auto[1]	5331949	1			T1	4715		T14	40744		T17	61
all_values[4]	auto[0]	auto[1]	auto[0]	587984	1			T1	640		T14	4282		T17	12
all_values[4]	auto[0]	auto[1]	auto[1]	5339283	1			T1	7484		T14	40869		T17	24
all_values[4]	auto[1]	auto[0]	auto[1]	77413	1			T1	19		T14	652		T25	1329
all_values[4]	auto[1]	auto[1]	auto[1]	76702	1			T1	18		T14	680		T25	1259
all_values[5]	auto[0]	auto[0]	auto[0]	2700805	1			T1	2488		T11	333		T12	209
all_values[5]	auto[0]	auto[0]	auto[1]	5363601	1			T1	7036		T14	40659		T17	49
all_values[5]	auto[0]	auto[1]	auto[0]	587230	1			T1	692		T14	4119		T17	19
all_values[5]	auto[0]	auto[1]	auto[1]	5313079	1			T1	4868		T14	40845		T17	29
all_values[5]	auto[1]	auto[0]	auto[1]	77318	1			T1	18		T14	616		T25	1363
all_values[5]	auto[1]	auto[1]	auto[1]	76642	1			T1	21		T14	695		T25	1287
all_values[6]	auto[0]	auto[0]	auto[0]	2702952	1			T1	2286		T11	333		T12	209
all_values[6]	auto[0]	auto[0]	auto[1]	5375944	1			T1	6539		T14	41074		T17	49
all_values[6]	auto[0]	auto[1]	auto[0]	585985	1			T1	557		T14	3995		T17	7
all_values[6]	auto[0]	auto[1]	auto[1]	5299099	1			T1	5702		T14	40423		T17	50
all_values[6]	auto[1]	auto[0]	auto[1]	77401	1			T1	17		T14	637		T25	1306
all_values[6]	auto[1]	auto[1]	auto[1]	77294	1			T1	22		T14	672		T25	1332
all_values[7]	auto[0]	auto[0]	auto[0]	2697628	1			T1	2334		T11	333		T12	209
all_values[7]	auto[0]	auto[0]	auto[1]	5332559	1			T1	6165		T14	41092		T17	61
all_values[7]	auto[0]	auto[1]	auto[0]	580926	1			T1	370		T14	4542		T17	2
all_values[7]	auto[0]	auto[1]	auto[1]	5353515	1			T1	6213		T14	39390		T17	44
all_values[7]	auto[1]	auto[0]	auto[1]	77369	1			T1	20		T14	654		T25	1306
all_values[7]	auto[1]	auto[1]	auto[1]	76678	1			T1	21		T14	648		T25	1285
all_values[8]	auto[0]	auto[0]	auto[0]	2703438	1			T1	2458		T11	333		T12	209
all_values[8]	auto[0]	auto[0]	auto[1]	5342911	1			T1	5844		T14	41029		T17	44
all_values[8]	auto[0]	auto[1]	auto[0]	586938	1			T1	453		T14	4418		T18	18
all_values[8]	auto[0]	auto[1]	auto[1]	5330916	1			T1	6331		T14	39795		T17	46
all_values[8]	auto[1]	auto[0]	auto[1]	77683	1			T1	18		T14	656		T25	1345
all_values[8]	auto[1]	auto[1]	auto[1]	76789	1			T1	19		T14	685		T25	1328
all_values[9]	auto[0]	auto[0]	auto[0]	2699716	1			T1	2426		T11	333		T12	209
all_values[9]	auto[0]	auto[0]	auto[1]	5362553	1			T1	7267		T14	40179		T17	41
all_values[9]	auto[0]	auto[1]	auto[0]	578504	1			T1	414		T14	4344		T17	13
all_values[9]	auto[0]	auto[1]	auto[1]	5324125	1			T1	4971		T14	40721		T17	53
all_values[9]	auto[1]	auto[0]	auto[1]	77576	1			T1	28		T14	673		T25	1293
all_values[9]	auto[1]	auto[1]	auto[1]	76201	1			T1	17		T14	615		T25	1311
all_values[10]	auto[0]	auto[0]	auto[0]	2693748	1			T1	2375		T11	333		T12	209
all_values[10]	auto[0]	auto[0]	auto[1]	5349333	1			T1	6345		T14	39925		T17	49
all_values[10]	auto[0]	auto[1]	auto[0]	581211	1			T1	600		T14	4421		T17	20
all_values[10]	auto[0]	auto[1]	auto[1]	5339762	1			T1	5764		T14	41047		T17	35
all_values[10]	auto[1]	auto[0]	auto[1]	77295	1			T1	22		T14	709		T25	1281
all_values[10]	auto[1]	auto[1]	auto[1]	77326	1			T1	17		T14	664		T25	1301
all_values[11]	auto[0]	auto[0]	auto[0]	2694180	1			T1	2280		T11	333		T12	209
all_values[11]	auto[0]	auto[0]	auto[1]	5322653	1			T1	6035		T14	43395		T17	69
all_values[11]	auto[0]	auto[1]	auto[0]	580489	1			T1	542		T14	4509		T17	3
all_values[11]	auto[0]	auto[1]	auto[1]	5366587	1			T1	6227		T14	37118		T17	35
all_values[11]	auto[1]	auto[0]	auto[1]	77625	1			T1	10		T14	690		T25	1315
all_values[11]	auto[1]	auto[1]	auto[1]	77141	1			T1	29		T14	653		T25	1319
all_values[12]	auto[0]	auto[0]	auto[0]	2707074	1			T1	2335		T11	333		T12	209
all_values[12]	auto[0]	auto[0]	auto[1]	5406747	1			T1	6549		T14	41483		T17	59
all_values[12]	auto[0]	auto[1]	auto[0]	577673	1			T1	421		T14	4190		T17	7
all_values[12]	auto[0]	auto[1]	auto[1]	5272923	1			T1	5778		T14	39285		T17	39
all_values[12]	auto[1]	auto[0]	auto[1]	77297	1			T1	25		T14	671		T25	1349
all_values[12]	auto[1]	auto[1]	auto[1]	76961	1			T1	15		T14	656		T25	1313
all_values[13]	auto[0]	auto[0]	auto[0]	2706571	1			T1	2295		T11	333		T12	209
all_values[13]	auto[0]	auto[0]	auto[1]	5345663	1			T1	6680		T14	41025		T17	65
all_values[13]	auto[0]	auto[1]	auto[0]	584684	1			T1	490		T14	4721		T17	15
all_values[13]	auto[0]	auto[1]	auto[1]	5327480	1			T1	5620		T14	39200		T17	26
all_values[13]	auto[1]	auto[0]	auto[1]	77535	1			T1	17		T14	682		T25	1346
all_values[13]	auto[1]	auto[1]	auto[1]	76742	1			T1	21		T14	654		T25	1281
all_values[14]	auto[0]	auto[0]	auto[0]	2702669	1			T1	2382		T11	333		T12	209
all_values[14]	auto[0]	auto[0]	auto[1]	5360395	1			T1	6452		T14	40103		T17	66
all_values[14]	auto[0]	auto[1]	auto[0]	582823	1			T1	664		T14	4456		T17	14
all_values[14]	auto[0]	auto[1]	auto[1]	5318775	1			T1	5578		T14	40958		T17	19
all_values[14]	auto[1]	auto[0]	auto[1]	77255	1			T1	16		T14	699		T25	1277
all_values[14]	auto[1]	auto[1]	auto[1]	76758	1			T1	31		T14	620		T25	1441
all_values[15]	auto[0]	auto[0]	auto[0]	2698535	1			T1	2338		T11	333		T12	209
all_values[15]	auto[0]	auto[0]	auto[1]	5348837	1			T1	4903		T14	40218		T17	49
all_values[15]	auto[0]	auto[1]	auto[0]	580173	1			T1	698		T14	4388		T17	10
all_values[15]	auto[0]	auto[1]	auto[1]	5336859	1			T1	7144		T14	40696		T17	26
all_values[15]	auto[1]	auto[0]	auto[1]	77373	1			T1	20		T14	673		T25	1318
all_values[15]	auto[1]	auto[1]	auto[1]	76898	1			T1	20		T14	664		T25	1280
all_values[16]	auto[0]	auto[0]	auto[0]	2700119	1			T1	2244		T11	333		T12	209
all_values[16]	auto[0]	auto[0]	auto[1]	5385222	1			T1	6785		T14	40972		T17	61
all_values[16]	auto[0]	auto[1]	auto[0]	584665	1			T1	552		T14	4538		T17	8
all_values[16]	auto[0]	auto[1]	auto[1]	5294396	1			T1	5505		T14	40126		T17	37
all_values[16]	auto[1]	auto[0]	auto[1]	77287	1			T1	12		T14	596		T25	1398
all_values[16]	auto[1]	auto[1]	auto[1]	76986	1			T1	25		T14	702		T25	1313
all_values[17]	auto[0]	auto[0]	auto[0]	2704254	1			T1	2395		T11	333		T12	209
all_values[17]	auto[0]	auto[0]	auto[1]	5333500	1			T1	5345		T14	39918		T17	18
all_values[17]	auto[0]	auto[1]	auto[0]	583193	1			T1	575		T14	4603		T17	22
all_values[17]	auto[0]	auto[1]	auto[1]	5343488	1			T1	6768		T14	41113		T17	58
all_values[17]	auto[1]	auto[0]	auto[1]	76959	1			T1	26		T14	694		T25	1319
all_values[17]	auto[1]	auto[1]	auto[1]	77281	1			T1	14		T14	668		T25	1329
all_values[18]	auto[0]	auto[0]	auto[0]	2705229	1			T1	2314		T11	333		T12	209
all_values[18]	auto[0]	auto[0]	auto[1]	5350447	1			T1	6310		T14	40211		T17	59
all_values[18]	auto[0]	auto[1]	auto[0]	587258	1			T1	470		T14	4441		T17	19
all_values[18]	auto[0]	auto[1]	auto[1]	5321572	1			T1	5992		T14	40346		T17	27
all_values[18]	auto[1]	auto[0]	auto[1]	77274	1			T1	20		T14	667		T25	1351
all_values[18]	auto[1]	auto[1]	auto[1]	76895	1			T1	17		T14	735		T25	1296
all_values[19]	auto[0]	auto[0]	auto[0]	2703938	1			T1	2385		T11	333		T12	209
all_values[19]	auto[0]	auto[0]	auto[1]	5342534	1			T1	6059		T14	40523		T17	64
all_values[19]	auto[0]	auto[1]	auto[0]	585211	1			T1	457		T14	4526		T17	3
all_values[19]	auto[0]	auto[1]	auto[1]	5332971	1			T1	6173		T14	40051		T17	7
all_values[19]	auto[1]	auto[0]	auto[1]	76688	1			T1	26		T14	640		T25	1283
all_values[19]	auto[1]	auto[1]	auto[1]	77333	1			T1	23		T14	686		T25	1286
all_values[20]	auto[0]	auto[0]	auto[0]	2697424	1			T1	2673		T11	333		T12	209
all_values[20]	auto[0]	auto[0]	auto[1]	5346965	1			T1	6689		T14	40832		T17	46
all_values[20]	auto[0]	auto[1]	auto[0]	576107	1			T1	397		T14	4777		T17	2
all_values[20]	auto[0]	auto[1]	auto[1]	5343923	1			T1	5321		T14	39134		T17	43
all_values[20]	auto[1]	auto[0]	auto[1]	76735	1			T1	24		T14	657		T25	1261
all_values[20]	auto[1]	auto[1]	auto[1]	77521	1			T1	19		T14	668		T25	1383
all_values[21]	auto[0]	auto[0]	auto[0]	2702473	1			T1	2433		T11	333		T12	209
all_values[21]	auto[0]	auto[0]	auto[1]	5330126	1			T1	6634		T14	41110		T17	51
all_values[21]	auto[0]	auto[1]	auto[0]	578546	1			T1	362		T14	4389		T17	5
all_values[21]	auto[0]	auto[1]	auto[1]	5353422	1			T1	5657		T14	39620		T17	39
all_values[21]	auto[1]	auto[0]	auto[1]	76931	1			T1	26		T14	668		T25	1346
all_values[21]	auto[1]	auto[1]	auto[1]	77177	1			T1	11		T14	645		T25	1326
all_values[22]	auto[0]	auto[0]	auto[0]	2705627	1			T1	2157		T11	333		T12	209
all_values[22]	auto[0]	auto[0]	auto[1]	5365561	1			T1	6802		T14	39177		T17	73
all_values[22]	auto[0]	auto[1]	auto[0]	579183	1			T1	406		T14	4621		T17	4
all_values[22]	auto[0]	auto[1]	auto[1]	5314395	1			T1	5721		T14	41121		T17	18
all_values[22]	auto[1]	auto[0]	auto[1]	77167	1			T1	16		T14	680		T25	1263
all_values[22]	auto[1]	auto[1]	auto[1]	76742	1			T1	21		T14	689		T25	1347
all_values[23]	auto[0]	auto[0]	auto[0]	2698216	1			T1	2452		T11	333		T12	209
all_values[23]	auto[0]	auto[0]	auto[1]	5338102	1			T1	7359		T14	39092		T17	75
all_values[23]	auto[0]	auto[1]	auto[0]	582142	1			T1	456		T14	4674		T17	1
all_values[23]	auto[0]	auto[1]	auto[1]	5346030	1			T1	4820		T14	41595		T17	29
all_values[23]	auto[1]	auto[0]	auto[1]	76861	1			T1	18		T14	656		T25	1241
all_values[23]	auto[1]	auto[1]	auto[1]	77324	1			T1	18		T14	679		T25	1346
all_values[24]	auto[0]	auto[0]	auto[0]	2706250	1			T1	2290		T11	333		T12	209
all_values[24]	auto[0]	auto[0]	auto[1]	5354417	1			T1	5054		T14	38646		T17	75
all_values[24]	auto[0]	auto[1]	auto[0]	578190	1			T1	711		T14	4213		T17	7
all_values[24]	auto[0]	auto[1]	auto[1]	5325467	1			T1	7033		T14	42487		T17	29
all_values[24]	auto[1]	auto[0]	auto[1]	77391	1			T1	22		T14	678		T25	1390
all_values[24]	auto[1]	auto[1]	auto[1]	76960	1			T1	13		T14	624		T25	1234
all_values[25]	auto[0]	auto[0]	auto[0]	2707199	1			T1	2336		T11	333		T12	209
all_values[25]	auto[0]	auto[0]	auto[1]	5334020	1			T1	6229		T14	40822		T17	56
all_values[25]	auto[0]	auto[1]	auto[0]	577853	1			T1	382		T14	5257		T17	1
all_values[25]	auto[0]	auto[1]	auto[1]	5345710	1			T1	6135		T14	39352		T17	40
all_values[25]	auto[1]	auto[0]	auto[1]	77193	1			T1	29		T14	665		T25	1281
all_values[25]	auto[1]	auto[1]	auto[1]	76700	1			T1	12		T14	640		T25	1325
all_values[26]	auto[0]	auto[0]	auto[0]	2698686	1			T1	2299		T11	333		T12	209
all_values[26]	auto[0]	auto[0]	auto[1]	5363897	1			T1	6470		T14	41918		T17	88
all_values[26]	auto[0]	auto[1]	auto[0]	570296	1			T1	427		T14	4626		T17	4
all_values[26]	auto[0]	auto[1]	auto[1]	5331213	1			T1	5887		T14	38787		T17	17
all_values[26]	auto[1]	auto[0]	auto[1]	77582	1			T1	30		T14	702		T25	1329
all_values[26]	auto[1]	auto[1]	auto[1]	77001	1			T1	10		T14	636		T25	1327
all_values[27]	auto[0]	auto[0]	auto[0]	2702055	1			T1	2267		T11	333		T12	209
all_values[27]	auto[0]	auto[0]	auto[1]	5300893	1			T1	6788		T14	40013		T17	84
all_values[27]	auto[0]	auto[1]	auto[0]	579564	1			T1	528		T14	4513		T17	1
all_values[27]	auto[0]	auto[1]	auto[1]	5382343	1			T1	5502		T14	40718		T17	11
all_values[27]	auto[1]	auto[0]	auto[1]	76951	1			T1	17		T14	639		T25	1316
all_values[27]	auto[1]	auto[1]	auto[1]	76869	1			T1	21		T14	675		T25	1236
all_values[28]	auto[0]	auto[0]	auto[0]	2709636	1			T1	2231		T11	333		T12	209
all_values[28]	auto[0]	auto[0]	auto[1]	5329539	1			T1	5102		T14	38390		T17	67
all_values[28]	auto[0]	auto[1]	auto[0]	583028	1			T1	482		T14	4355		T17	13
all_values[28]	auto[0]	auto[1]	auto[1]	5342292	1			T1	7263		T14	42644		T17	24
all_values[28]	auto[1]	auto[0]	auto[1]	77660	1			T1	28		T14	661		T25	1341
all_values[28]	auto[1]	auto[1]	auto[1]	76520	1			T1	17		T14	691		T25	1279
all_values[29]	auto[0]	auto[0]	auto[0]	2697649	1			T1	2267		T11	333		T12	209
all_values[29]	auto[0]	auto[0]	auto[1]	5343874	1			T1	5780		T14	39636		T17	53
all_values[29]	auto[0]	auto[1]	auto[0]	584067	1			T1	420		T14	5283		T17	19
all_values[29]	auto[0]	auto[1]	auto[1]	5338837	1			T1	6615		T14	40010		T17	31
all_values[29]	auto[1]	auto[0]	auto[1]	77569	1			T1	28		T14	664		T25	1302
all_values[29]	auto[1]	auto[1]	auto[1]	76679	1			T1	13		T14	655		T25	1336
all_values[30]	auto[0]	auto[0]	auto[0]	2706545	1			T1	2262		T11	333		T12	209
all_values[30]	auto[0]	auto[0]	auto[1]	5352834	1			T1	6765		T14	40732		T17	31
all_values[30]	auto[0]	auto[1]	auto[0]	581992	1			T1	466		T14	4418		T17	2
all_values[30]	auto[0]	auto[1]	auto[1]	5322916	1			T1	5595		T14	39917		T17	72
all_values[30]	auto[1]	auto[0]	auto[1]	77290	1			T1	21		T14	698		T25	1248
all_values[30]	auto[1]	auto[1]	auto[1]	77098	1			T1	14		T14	677		T25	1311
all_values[31]	auto[0]	auto[0]	auto[0]	2705693	1			T1	2200		T11	333		T12	209
all_values[31]	auto[0]	auto[0]	auto[1]	5332433	1			T1	5998		T14	40198		T17	60
all_values[31]	auto[0]	auto[1]	auto[0]	585076	1			T1	517		T14	4388		T18	37
all_values[31]	auto[0]	auto[1]	auto[1]	5341488	1			T1	6376		T14	40293		T17	42
all_values[31]	auto[1]	auto[0]	auto[1]	76734	1			T1	14		T14	648		T25	1284
all_values[31]	auto[1]	auto[1]	auto[1]	77251	1			T1	18		T14	621		T25	1317

User Defined Cross Bins for intr_test_cg_cc

Excluded/Illegal bins

NAME	COUNT	STATUS
test_1_state_0	0	Illegal