Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8139845 |
1 |
|
|
T1 |
9721 |
|
T11 |
333 |
|
T12 |
209 |
| auto[1] |
5978830 |
1 |
|
|
T1 |
5402 |
|
T14 |
45680 |
|
T17 |
66 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
13354236 |
1 |
|
|
T1 |
14200 |
|
T11 |
333 |
|
T12 |
209 |
| auto[1] |
764439 |
1 |
|
|
T1 |
923 |
|
T14 |
5326 |
|
T17 |
5 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8158332 |
1 |
|
|
T1 |
9456 |
|
T11 |
333 |
|
T12 |
209 |
| auto[1] |
5960343 |
1 |
|
|
T1 |
5667 |
|
T14 |
44371 |
|
T17 |
72 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
2600874 |
1 |
|
|
T1 |
2498 |
|
T14 |
19663 |
|
T17 |
35 |
| auto[1] |
auto[0] |
auto[1] |
381514 |
1 |
|
|
T1 |
494 |
|
T14 |
2607 |
|
T17 |
1 |
| auto[1] |
auto[1] |
auto[0] |
2595030 |
1 |
|
|
T1 |
2246 |
|
T14 |
19382 |
|
T17 |
32 |
| auto[1] |
auto[1] |
auto[1] |
382925 |
1 |
|
|
T1 |
429 |
|
T14 |
2719 |
|
T17 |
4 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |