Summary for Variable intr_en
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
8191118 |
1 |
|
|
T1 |
8909 |
|
T11 |
333 |
|
T12 |
209 |
auto[1] |
5927557 |
1 |
|
|
T1 |
6214 |
|
T14 |
44131 |
|
T17 |
46 |
Summary for Variable intr_state
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
11657839 |
1 |
|
|
T1 |
11885 |
|
T11 |
333 |
|
T12 |
209 |
auto[1] |
2460836 |
1 |
|
|
T1 |
3238 |
|
T14 |
16497 |
|
T17 |
18 |
Summary for Variable type_ctrl_en
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
8151656 |
1 |
|
|
T1 |
7598 |
|
T11 |
333 |
|
T12 |
209 |
auto[1] |
5967019 |
1 |
|
|
T1 |
7525 |
|
T14 |
42856 |
|
T17 |
48 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
TOTAL |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[1] |
auto[0] |
auto[0] |
1778633 |
1 |
|
|
T1 |
2182 |
|
T14 |
13624 |
|
T17 |
19 |
auto[1] |
auto[0] |
auto[1] |
1243838 |
1 |
|
|
T1 |
1791 |
|
T14 |
8606 |
|
T17 |
12 |
auto[1] |
auto[1] |
auto[0] |
1727550 |
1 |
|
|
T1 |
2105 |
|
T14 |
12735 |
|
T17 |
11 |
auto[1] |
auto[1] |
auto[1] |
1216998 |
1 |
|
|
T1 |
1447 |
|
T14 |
7891 |
|
T17 |
6 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
NAME | COUNT | STATUS |
intr_type_disabled |
0 |
Excluded |