Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8129769 |
1 |
|
|
T1 |
8992 |
|
T11 |
333 |
|
T12 |
209 |
| auto[1] |
5988906 |
1 |
|
|
T1 |
6131 |
|
T14 |
44575 |
|
T17 |
41 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
11662167 |
1 |
|
|
T1 |
11809 |
|
T11 |
333 |
|
T12 |
209 |
| auto[1] |
2456508 |
1 |
|
|
T1 |
3314 |
|
T14 |
18153 |
|
T17 |
18 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8143552 |
1 |
|
|
T1 |
8100 |
|
T11 |
333 |
|
T12 |
209 |
| auto[1] |
5975123 |
1 |
|
|
T1 |
7023 |
|
T14 |
46617 |
|
T17 |
40 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1761163 |
1 |
|
|
T1 |
1963 |
|
T14 |
14846 |
|
T17 |
16 |
| auto[1] |
auto[0] |
auto[1] |
1228745 |
1 |
|
|
T1 |
1721 |
|
T14 |
9060 |
|
T17 |
13 |
| auto[1] |
auto[1] |
auto[0] |
1757452 |
1 |
|
|
T1 |
1746 |
|
T14 |
13618 |
|
T17 |
6 |
| auto[1] |
auto[1] |
auto[1] |
1227763 |
1 |
|
|
T1 |
1593 |
|
T14 |
9093 |
|
T17 |
5 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |