Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8132950 |
1 |
|
|
T1 |
8644 |
|
T11 |
333 |
|
T12 |
209 |
| auto[1] |
5985725 |
1 |
|
|
T1 |
6479 |
|
T14 |
45522 |
|
T17 |
46 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
11656043 |
1 |
|
|
T1 |
12095 |
|
T11 |
333 |
|
T12 |
209 |
| auto[1] |
2462632 |
1 |
|
|
T1 |
3028 |
|
T14 |
17141 |
|
T17 |
37 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8148222 |
1 |
|
|
T1 |
8246 |
|
T11 |
333 |
|
T12 |
209 |
| auto[1] |
5970453 |
1 |
|
|
T1 |
6877 |
|
T14 |
45869 |
|
T17 |
51 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1761197 |
1 |
|
|
T1 |
1769 |
|
T14 |
14986 |
|
T17 |
11 |
| auto[1] |
auto[0] |
auto[1] |
1237185 |
1 |
|
|
T1 |
1464 |
|
T14 |
8787 |
|
T17 |
20 |
| auto[1] |
auto[1] |
auto[0] |
1746624 |
1 |
|
|
T1 |
2080 |
|
T14 |
13742 |
|
T17 |
3 |
| auto[1] |
auto[1] |
auto[1] |
1225447 |
1 |
|
|
T1 |
1564 |
|
T14 |
8354 |
|
T17 |
17 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |