Summary for Variable intr_en
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
8123160 |
1 |
|
|
T1 |
8470 |
|
T11 |
333 |
|
T12 |
209 |
auto[1] |
5995515 |
1 |
|
|
T1 |
6653 |
|
T14 |
45263 |
|
T17 |
10 |
Summary for Variable intr_state
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
11654263 |
1 |
|
|
T1 |
12177 |
|
T11 |
333 |
|
T12 |
209 |
auto[1] |
2464412 |
1 |
|
|
T1 |
2946 |
|
T14 |
17508 |
|
T17 |
29 |
Summary for Variable type_ctrl_en
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
8125498 |
1 |
|
|
T1 |
8641 |
|
T11 |
333 |
|
T12 |
209 |
auto[1] |
5993177 |
1 |
|
|
T1 |
6482 |
|
T14 |
45427 |
|
T17 |
77 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
TOTAL |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[1] |
auto[0] |
auto[0] |
1771373 |
1 |
|
|
T1 |
1998 |
|
T14 |
13742 |
|
T17 |
48 |
auto[1] |
auto[0] |
auto[1] |
1236063 |
1 |
|
|
T1 |
1608 |
|
T14 |
8839 |
|
T17 |
22 |
auto[1] |
auto[1] |
auto[0] |
1757392 |
1 |
|
|
T1 |
1538 |
|
T14 |
14177 |
|
T18 |
56 |
auto[1] |
auto[1] |
auto[1] |
1228349 |
1 |
|
|
T1 |
1338 |
|
T14 |
8669 |
|
T17 |
7 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
NAME | COUNT | STATUS |
intr_type_disabled |
0 |
Excluded |