Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8132014 |
1 |
|
|
T1 |
9002 |
|
T11 |
333 |
|
T12 |
209 |
| auto[1] |
5986661 |
1 |
|
|
T1 |
6121 |
|
T14 |
47337 |
|
T17 |
40 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
11656217 |
1 |
|
|
T1 |
12235 |
|
T11 |
333 |
|
T12 |
209 |
| auto[1] |
2462458 |
1 |
|
|
T1 |
2888 |
|
T14 |
17558 |
|
T17 |
36 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8129970 |
1 |
|
|
T1 |
8601 |
|
T11 |
333 |
|
T12 |
209 |
| auto[1] |
5988705 |
1 |
|
|
T1 |
6522 |
|
T14 |
47180 |
|
T17 |
77 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1764339 |
1 |
|
|
T1 |
2050 |
|
T14 |
14837 |
|
T17 |
29 |
| auto[1] |
auto[0] |
auto[1] |
1231635 |
1 |
|
|
T1 |
1505 |
|
T14 |
8443 |
|
T17 |
23 |
| auto[1] |
auto[1] |
auto[0] |
1761908 |
1 |
|
|
T1 |
1584 |
|
T14 |
14785 |
|
T17 |
12 |
| auto[1] |
auto[1] |
auto[1] |
1230823 |
1 |
|
|
T1 |
1383 |
|
T14 |
9115 |
|
T17 |
13 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |