Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8079899 |
1 |
|
|
T1 |
9072 |
|
T11 |
333 |
|
T12 |
209 |
| auto[1] |
6038776 |
1 |
|
|
T1 |
6051 |
|
T14 |
45906 |
|
T17 |
12 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
13349280 |
1 |
|
|
T1 |
13892 |
|
T11 |
333 |
|
T12 |
209 |
| auto[1] |
769395 |
1 |
|
|
T1 |
1231 |
|
T14 |
5791 |
|
T17 |
8 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8119467 |
1 |
|
|
T1 |
7583 |
|
T11 |
333 |
|
T12 |
209 |
| auto[1] |
5999208 |
1 |
|
|
T1 |
7540 |
|
T14 |
46989 |
|
T17 |
107 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
2600568 |
1 |
|
|
T1 |
3552 |
|
T14 |
20496 |
|
T17 |
88 |
| auto[1] |
auto[0] |
auto[1] |
382651 |
1 |
|
|
T1 |
678 |
|
T14 |
2852 |
|
T17 |
7 |
| auto[1] |
auto[1] |
auto[0] |
2629245 |
1 |
|
|
T1 |
2757 |
|
T14 |
20702 |
|
T17 |
11 |
| auto[1] |
auto[1] |
auto[1] |
386744 |
1 |
|
|
T1 |
553 |
|
T14 |
2939 |
|
T17 |
1 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |