Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8136669 |
1 |
|
|
T1 |
9048 |
|
T11 |
333 |
|
T12 |
209 |
| auto[1] |
5982006 |
1 |
|
|
T1 |
6075 |
|
T14 |
45012 |
|
T17 |
74 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
13348553 |
1 |
|
|
T1 |
13943 |
|
T11 |
333 |
|
T12 |
209 |
| auto[1] |
770122 |
1 |
|
|
T1 |
1180 |
|
T14 |
5460 |
|
T17 |
3 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8131902 |
1 |
|
|
T1 |
7899 |
|
T11 |
333 |
|
T12 |
209 |
| auto[1] |
5986773 |
1 |
|
|
T1 |
7224 |
|
T14 |
45011 |
|
T17 |
41 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
2617126 |
1 |
|
|
T1 |
3041 |
|
T14 |
19962 |
|
T17 |
27 |
| auto[1] |
auto[0] |
auto[1] |
387262 |
1 |
|
|
T1 |
566 |
|
T14 |
2842 |
|
T17 |
2 |
| auto[1] |
auto[1] |
auto[0] |
2599525 |
1 |
|
|
T1 |
3003 |
|
T14 |
19589 |
|
T17 |
11 |
| auto[1] |
auto[1] |
auto[1] |
382860 |
1 |
|
|
T1 |
614 |
|
T14 |
2618 |
|
T17 |
1 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |