cp_pins | cp_stable_cycles | cp_pin_value | cp_filter_en | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[0] |
auto[0] |
67276 |
1 |
|
|
T28 |
2136 |
|
T95 |
1433 |
|
T96 |
1321 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[0] |
auto[1] |
43780 |
1 |
|
|
T28 |
1016 |
|
T95 |
486 |
|
T96 |
1562 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[1] |
auto[0] |
55378 |
1 |
|
|
T28 |
1205 |
|
T95 |
611 |
|
T96 |
1432 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[1] |
auto[1] |
43788 |
1 |
|
|
T28 |
766 |
|
T95 |
611 |
|
T96 |
1265 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T28 |
19 |
|
T95 |
13 |
|
T96 |
28 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1594 |
1 |
|
|
T28 |
33 |
|
T95 |
22 |
|
T96 |
57 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T28 |
18 |
|
T95 |
9 |
|
T96 |
31 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1606 |
1 |
|
|
T28 |
33 |
|
T95 |
26 |
|
T96 |
54 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T28 |
19 |
|
T95 |
13 |
|
T96 |
28 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1567 |
1 |
|
|
T28 |
32 |
|
T95 |
22 |
|
T96 |
57 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T28 |
18 |
|
T95 |
9 |
|
T96 |
31 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1582 |
1 |
|
|
T28 |
33 |
|
T95 |
26 |
|
T96 |
54 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T28 |
19 |
|
T95 |
13 |
|
T96 |
28 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1542 |
1 |
|
|
T28 |
32 |
|
T95 |
21 |
|
T96 |
55 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T28 |
18 |
|
T95 |
9 |
|
T96 |
31 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1548 |
1 |
|
|
T28 |
33 |
|
T95 |
25 |
|
T96 |
52 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T28 |
19 |
|
T95 |
13 |
|
T96 |
28 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1514 |
1 |
|
|
T28 |
32 |
|
T95 |
21 |
|
T96 |
54 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T28 |
18 |
|
T95 |
9 |
|
T96 |
31 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1524 |
1 |
|
|
T28 |
33 |
|
T95 |
25 |
|
T96 |
51 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T28 |
19 |
|
T95 |
13 |
|
T96 |
28 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1484 |
1 |
|
|
T28 |
31 |
|
T95 |
21 |
|
T96 |
54 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T28 |
18 |
|
T95 |
9 |
|
T96 |
31 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1497 |
1 |
|
|
T28 |
32 |
|
T95 |
25 |
|
T96 |
51 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T28 |
19 |
|
T95 |
13 |
|
T96 |
28 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1450 |
1 |
|
|
T28 |
30 |
|
T95 |
21 |
|
T96 |
54 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T28 |
18 |
|
T95 |
9 |
|
T96 |
31 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1466 |
1 |
|
|
T28 |
32 |
|
T95 |
25 |
|
T96 |
50 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T28 |
19 |
|
T95 |
13 |
|
T96 |
28 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1420 |
1 |
|
|
T28 |
29 |
|
T95 |
19 |
|
T96 |
54 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T28 |
18 |
|
T95 |
8 |
|
T96 |
30 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1430 |
1 |
|
|
T28 |
32 |
|
T95 |
24 |
|
T96 |
50 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T28 |
19 |
|
T95 |
13 |
|
T96 |
28 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1391 |
1 |
|
|
T28 |
27 |
|
T95 |
19 |
|
T96 |
53 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T28 |
18 |
|
T95 |
8 |
|
T96 |
30 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1405 |
1 |
|
|
T28 |
32 |
|
T95 |
24 |
|
T96 |
49 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T28 |
19 |
|
T95 |
13 |
|
T96 |
28 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1357 |
1 |
|
|
T28 |
27 |
|
T95 |
19 |
|
T96 |
52 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T28 |
18 |
|
T95 |
8 |
|
T96 |
30 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1378 |
1 |
|
|
T28 |
30 |
|
T95 |
23 |
|
T96 |
49 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T28 |
19 |
|
T95 |
13 |
|
T96 |
28 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1322 |
1 |
|
|
T28 |
27 |
|
T95 |
18 |
|
T96 |
52 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T28 |
18 |
|
T95 |
8 |
|
T96 |
30 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1331 |
1 |
|
|
T28 |
29 |
|
T95 |
23 |
|
T96 |
48 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T28 |
19 |
|
T95 |
13 |
|
T96 |
28 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1294 |
1 |
|
|
T28 |
26 |
|
T95 |
18 |
|
T96 |
51 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T28 |
18 |
|
T95 |
8 |
|
T96 |
30 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1304 |
1 |
|
|
T28 |
28 |
|
T95 |
22 |
|
T96 |
48 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T28 |
19 |
|
T95 |
13 |
|
T96 |
28 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1258 |
1 |
|
|
T28 |
25 |
|
T95 |
16 |
|
T96 |
47 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T28 |
18 |
|
T95 |
8 |
|
T96 |
30 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1270 |
1 |
|
|
T28 |
28 |
|
T95 |
22 |
|
T96 |
48 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T28 |
19 |
|
T95 |
13 |
|
T96 |
28 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1230 |
1 |
|
|
T28 |
25 |
|
T95 |
16 |
|
T96 |
46 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T28 |
18 |
|
T95 |
8 |
|
T96 |
30 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1236 |
1 |
|
|
T28 |
28 |
|
T95 |
21 |
|
T96 |
47 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T28 |
19 |
|
T95 |
13 |
|
T96 |
28 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1202 |
1 |
|
|
T28 |
25 |
|
T95 |
16 |
|
T96 |
46 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T28 |
18 |
|
T95 |
8 |
|
T96 |
30 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1206 |
1 |
|
|
T28 |
28 |
|
T95 |
21 |
|
T96 |
47 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T28 |
19 |
|
T95 |
13 |
|
T96 |
28 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1173 |
1 |
|
|
T28 |
24 |
|
T95 |
14 |
|
T96 |
44 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T28 |
18 |
|
T95 |
8 |
|
T96 |
30 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1165 |
1 |
|
|
T28 |
27 |
|
T95 |
21 |
|
T96 |
42 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[0] |
auto[0] |
53865 |
1 |
|
|
T28 |
1793 |
|
T95 |
708 |
|
T96 |
1521 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45729 |
1 |
|
|
T28 |
941 |
|
T95 |
668 |
|
T96 |
850 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59374 |
1 |
|
|
T28 |
1528 |
|
T95 |
636 |
|
T96 |
1822 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[1] |
auto[1] |
50992 |
1 |
|
|
T28 |
761 |
|
T95 |
1229 |
|
T96 |
1847 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T28 |
15 |
|
T95 |
10 |
|
T96 |
21 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1675 |
1 |
|
|
T28 |
41 |
|
T95 |
22 |
|
T96 |
49 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
693 |
1 |
|
|
T28 |
16 |
|
T95 |
10 |
|
T96 |
21 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1697 |
1 |
|
|
T28 |
40 |
|
T95 |
23 |
|
T96 |
50 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T28 |
15 |
|
T95 |
10 |
|
T96 |
21 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1645 |
1 |
|
|
T28 |
40 |
|
T95 |
20 |
|
T96 |
49 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
693 |
1 |
|
|
T28 |
16 |
|
T95 |
10 |
|
T96 |
21 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1665 |
1 |
|
|
T28 |
40 |
|
T95 |
23 |
|
T96 |
49 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T28 |
15 |
|
T95 |
10 |
|
T96 |
21 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1607 |
1 |
|
|
T28 |
40 |
|
T95 |
19 |
|
T96 |
48 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T28 |
16 |
|
T95 |
10 |
|
T96 |
21 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1642 |
1 |
|
|
T28 |
40 |
|
T95 |
23 |
|
T96 |
49 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T28 |
15 |
|
T95 |
10 |
|
T96 |
21 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1569 |
1 |
|
|
T28 |
40 |
|
T95 |
18 |
|
T96 |
47 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T28 |
16 |
|
T95 |
10 |
|
T96 |
21 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1607 |
1 |
|
|
T28 |
39 |
|
T95 |
22 |
|
T96 |
48 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T28 |
15 |
|
T95 |
10 |
|
T96 |
21 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1539 |
1 |
|
|
T28 |
39 |
|
T95 |
18 |
|
T96 |
45 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T28 |
16 |
|
T95 |
10 |
|
T96 |
21 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1578 |
1 |
|
|
T28 |
38 |
|
T95 |
22 |
|
T96 |
48 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T28 |
15 |
|
T95 |
10 |
|
T96 |
21 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1493 |
1 |
|
|
T28 |
39 |
|
T95 |
18 |
|
T96 |
44 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T28 |
16 |
|
T95 |
10 |
|
T96 |
21 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1533 |
1 |
|
|
T28 |
38 |
|
T95 |
21 |
|
T96 |
47 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T28 |
15 |
|
T95 |
10 |
|
T96 |
21 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1450 |
1 |
|
|
T28 |
39 |
|
T95 |
18 |
|
T96 |
44 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
680 |
1 |
|
|
T28 |
16 |
|
T95 |
9 |
|
T96 |
21 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1506 |
1 |
|
|
T28 |
36 |
|
T95 |
21 |
|
T96 |
46 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T28 |
15 |
|
T95 |
10 |
|
T96 |
21 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1417 |
1 |
|
|
T28 |
38 |
|
T95 |
18 |
|
T96 |
42 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
680 |
1 |
|
|
T28 |
16 |
|
T95 |
9 |
|
T96 |
21 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1479 |
1 |
|
|
T28 |
34 |
|
T95 |
21 |
|
T96 |
46 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
689 |
1 |
|
|
T28 |
15 |
|
T95 |
10 |
|
T96 |
21 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1390 |
1 |
|
|
T28 |
37 |
|
T95 |
18 |
|
T96 |
40 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
676 |
1 |
|
|
T28 |
16 |
|
T95 |
9 |
|
T96 |
21 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1448 |
1 |
|
|
T28 |
34 |
|
T95 |
20 |
|
T96 |
46 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
689 |
1 |
|
|
T28 |
15 |
|
T95 |
10 |
|
T96 |
21 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1365 |
1 |
|
|
T28 |
37 |
|
T95 |
18 |
|
T96 |
39 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
676 |
1 |
|
|
T28 |
16 |
|
T95 |
9 |
|
T96 |
21 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1410 |
1 |
|
|
T28 |
31 |
|
T95 |
17 |
|
T96 |
46 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
689 |
1 |
|
|
T28 |
15 |
|
T95 |
10 |
|
T96 |
21 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1338 |
1 |
|
|
T28 |
37 |
|
T95 |
18 |
|
T96 |
36 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
673 |
1 |
|
|
T28 |
16 |
|
T95 |
9 |
|
T96 |
21 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1374 |
1 |
|
|
T28 |
30 |
|
T95 |
17 |
|
T96 |
46 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
689 |
1 |
|
|
T28 |
15 |
|
T95 |
10 |
|
T96 |
21 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1300 |
1 |
|
|
T28 |
36 |
|
T95 |
18 |
|
T96 |
33 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
673 |
1 |
|
|
T28 |
16 |
|
T95 |
9 |
|
T96 |
21 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1342 |
1 |
|
|
T28 |
29 |
|
T95 |
15 |
|
T96 |
45 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
689 |
1 |
|
|
T28 |
15 |
|
T95 |
10 |
|
T96 |
21 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1267 |
1 |
|
|
T28 |
33 |
|
T95 |
18 |
|
T96 |
31 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
671 |
1 |
|
|
T28 |
16 |
|
T95 |
9 |
|
T96 |
21 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1311 |
1 |
|
|
T28 |
29 |
|
T95 |
15 |
|
T96 |
44 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
689 |
1 |
|
|
T28 |
15 |
|
T95 |
10 |
|
T96 |
21 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1235 |
1 |
|
|
T28 |
32 |
|
T95 |
18 |
|
T96 |
31 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
671 |
1 |
|
|
T28 |
16 |
|
T95 |
9 |
|
T96 |
21 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1274 |
1 |
|
|
T28 |
28 |
|
T95 |
15 |
|
T96 |
43 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
689 |
1 |
|
|
T28 |
15 |
|
T95 |
10 |
|
T96 |
21 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1204 |
1 |
|
|
T28 |
31 |
|
T95 |
18 |
|
T96 |
31 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
671 |
1 |
|
|
T28 |
16 |
|
T95 |
9 |
|
T96 |
21 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1248 |
1 |
|
|
T28 |
28 |
|
T95 |
14 |
|
T96 |
40 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[0] |
auto[0] |
59921 |
1 |
|
|
T28 |
901 |
|
T95 |
1460 |
|
T96 |
2284 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[0] |
auto[1] |
42643 |
1 |
|
|
T28 |
766 |
|
T95 |
589 |
|
T96 |
1126 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[1] |
auto[0] |
61471 |
1 |
|
|
T28 |
867 |
|
T95 |
553 |
|
T96 |
1255 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44094 |
1 |
|
|
T28 |
1911 |
|
T95 |
553 |
|
T96 |
1019 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T28 |
19 |
|
T95 |
9 |
|
T96 |
24 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1722 |
1 |
|
|
T28 |
59 |
|
T95 |
26 |
|
T96 |
62 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T28 |
23 |
|
T95 |
8 |
|
T96 |
29 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1712 |
1 |
|
|
T28 |
55 |
|
T95 |
27 |
|
T96 |
57 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T28 |
19 |
|
T95 |
9 |
|
T96 |
24 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1690 |
1 |
|
|
T28 |
58 |
|
T95 |
26 |
|
T96 |
60 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T28 |
23 |
|
T95 |
8 |
|
T96 |
29 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1676 |
1 |
|
|
T28 |
54 |
|
T95 |
27 |
|
T96 |
57 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T28 |
19 |
|
T95 |
9 |
|
T96 |
24 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1659 |
1 |
|
|
T28 |
58 |
|
T95 |
24 |
|
T96 |
60 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T28 |
23 |
|
T95 |
8 |
|
T96 |
29 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1646 |
1 |
|
|
T28 |
53 |
|
T95 |
27 |
|
T96 |
56 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T28 |
19 |
|
T95 |
9 |
|
T96 |
24 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1619 |
1 |
|
|
T28 |
56 |
|
T95 |
24 |
|
T96 |
59 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T28 |
23 |
|
T95 |
8 |
|
T96 |
29 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1612 |
1 |
|
|
T28 |
53 |
|
T95 |
26 |
|
T96 |
55 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T28 |
19 |
|
T95 |
9 |
|
T96 |
24 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1593 |
1 |
|
|
T28 |
55 |
|
T95 |
23 |
|
T96 |
58 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T28 |
23 |
|
T95 |
8 |
|
T96 |
29 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1591 |
1 |
|
|
T28 |
53 |
|
T95 |
26 |
|
T96 |
50 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T28 |
19 |
|
T95 |
9 |
|
T96 |
24 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1557 |
1 |
|
|
T28 |
53 |
|
T95 |
22 |
|
T96 |
57 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T28 |
23 |
|
T95 |
8 |
|
T96 |
29 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1566 |
1 |
|
|
T28 |
53 |
|
T95 |
26 |
|
T96 |
47 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T28 |
18 |
|
T95 |
9 |
|
T96 |
24 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1518 |
1 |
|
|
T28 |
50 |
|
T95 |
22 |
|
T96 |
54 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T28 |
23 |
|
T95 |
7 |
|
T96 |
29 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1537 |
1 |
|
|
T28 |
53 |
|
T95 |
26 |
|
T96 |
45 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T28 |
18 |
|
T95 |
9 |
|
T96 |
24 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1480 |
1 |
|
|
T28 |
48 |
|
T95 |
22 |
|
T96 |
54 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T28 |
23 |
|
T95 |
7 |
|
T96 |
29 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1506 |
1 |
|
|
T28 |
52 |
|
T95 |
25 |
|
T96 |
42 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T28 |
18 |
|
T95 |
9 |
|
T96 |
24 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1441 |
1 |
|
|
T28 |
46 |
|
T95 |
22 |
|
T96 |
53 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T28 |
23 |
|
T95 |
7 |
|
T96 |
29 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1476 |
1 |
|
|
T28 |
52 |
|
T95 |
24 |
|
T96 |
41 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T28 |
18 |
|
T95 |
9 |
|
T96 |
24 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1411 |
1 |
|
|
T28 |
43 |
|
T95 |
21 |
|
T96 |
53 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T28 |
23 |
|
T95 |
7 |
|
T96 |
29 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1442 |
1 |
|
|
T28 |
51 |
|
T95 |
22 |
|
T96 |
39 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T28 |
18 |
|
T95 |
9 |
|
T96 |
24 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1381 |
1 |
|
|
T28 |
41 |
|
T95 |
20 |
|
T96 |
52 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T28 |
23 |
|
T95 |
7 |
|
T96 |
29 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1402 |
1 |
|
|
T28 |
50 |
|
T95 |
22 |
|
T96 |
39 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T28 |
18 |
|
T95 |
9 |
|
T96 |
24 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1359 |
1 |
|
|
T28 |
40 |
|
T95 |
20 |
|
T96 |
51 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T28 |
23 |
|
T95 |
7 |
|
T96 |
29 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1364 |
1 |
|
|
T28 |
50 |
|
T95 |
22 |
|
T96 |
39 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T28 |
18 |
|
T95 |
9 |
|
T96 |
24 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1330 |
1 |
|
|
T28 |
39 |
|
T95 |
20 |
|
T96 |
50 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T28 |
23 |
|
T95 |
7 |
|
T96 |
29 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1323 |
1 |
|
|
T28 |
50 |
|
T95 |
22 |
|
T96 |
39 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T28 |
18 |
|
T95 |
9 |
|
T96 |
24 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1292 |
1 |
|
|
T28 |
36 |
|
T95 |
20 |
|
T96 |
47 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T28 |
23 |
|
T95 |
7 |
|
T96 |
29 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1292 |
1 |
|
|
T28 |
50 |
|
T95 |
22 |
|
T96 |
37 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T28 |
18 |
|
T95 |
9 |
|
T96 |
24 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1260 |
1 |
|
|
T28 |
34 |
|
T95 |
20 |
|
T96 |
44 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T28 |
23 |
|
T95 |
7 |
|
T96 |
29 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1251 |
1 |
|
|
T28 |
50 |
|
T95 |
21 |
|
T96 |
36 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57187 |
1 |
|
|
T28 |
1302 |
|
T95 |
850 |
|
T96 |
1858 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46808 |
1 |
|
|
T28 |
1237 |
|
T95 |
331 |
|
T96 |
1296 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[1] |
auto[0] |
54730 |
1 |
|
|
T28 |
750 |
|
T95 |
964 |
|
T96 |
1058 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[1] |
auto[1] |
51397 |
1 |
|
|
T28 |
1572 |
|
T95 |
1252 |
|
T96 |
1614 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T28 |
16 |
|
T95 |
9 |
|
T96 |
24 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1697 |
1 |
|
|
T28 |
48 |
|
T95 |
16 |
|
T96 |
54 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
667 |
1 |
|
|
T28 |
15 |
|
T95 |
9 |
|
T96 |
22 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1709 |
1 |
|
|
T28 |
49 |
|
T95 |
17 |
|
T96 |
57 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T28 |
16 |
|
T95 |
9 |
|
T96 |
24 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1665 |
1 |
|
|
T28 |
46 |
|
T95 |
16 |
|
T96 |
54 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
667 |
1 |
|
|
T28 |
15 |
|
T95 |
9 |
|
T96 |
22 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1674 |
1 |
|
|
T28 |
46 |
|
T95 |
17 |
|
T96 |
56 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
669 |
1 |
|
|
T28 |
16 |
|
T95 |
9 |
|
T96 |
24 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1641 |
1 |
|
|
T28 |
46 |
|
T95 |
16 |
|
T96 |
54 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
667 |
1 |
|
|
T28 |
15 |
|
T95 |
9 |
|
T96 |
22 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1638 |
1 |
|
|
T28 |
45 |
|
T95 |
17 |
|
T96 |
56 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
669 |
1 |
|
|
T28 |
16 |
|
T95 |
9 |
|
T96 |
24 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1599 |
1 |
|
|
T28 |
46 |
|
T95 |
15 |
|
T96 |
54 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
667 |
1 |
|
|
T28 |
15 |
|
T95 |
9 |
|
T96 |
22 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1611 |
1 |
|
|
T28 |
44 |
|
T95 |
17 |
|
T96 |
52 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
667 |
1 |
|
|
T28 |
16 |
|
T95 |
9 |
|
T96 |
24 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1551 |
1 |
|
|
T28 |
44 |
|
T95 |
15 |
|
T96 |
50 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T28 |
15 |
|
T95 |
9 |
|
T96 |
22 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1586 |
1 |
|
|
T28 |
42 |
|
T95 |
17 |
|
T96 |
52 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
667 |
1 |
|
|
T28 |
16 |
|
T95 |
9 |
|
T96 |
24 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1507 |
1 |
|
|
T28 |
43 |
|
T95 |
15 |
|
T96 |
49 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T28 |
15 |
|
T95 |
9 |
|
T96 |
22 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1560 |
1 |
|
|
T28 |
42 |
|
T95 |
17 |
|
T96 |
51 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
664 |
1 |
|
|
T28 |
16 |
|
T95 |
9 |
|
T96 |
24 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1487 |
1 |
|
|
T28 |
43 |
|
T95 |
15 |
|
T96 |
49 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
654 |
1 |
|
|
T28 |
15 |
|
T95 |
8 |
|
T96 |
21 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1526 |
1 |
|
|
T28 |
41 |
|
T95 |
16 |
|
T96 |
50 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
664 |
1 |
|
|
T28 |
16 |
|
T95 |
9 |
|
T96 |
24 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1453 |
1 |
|
|
T28 |
43 |
|
T95 |
15 |
|
T96 |
47 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
654 |
1 |
|
|
T28 |
15 |
|
T95 |
8 |
|
T96 |
21 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1501 |
1 |
|
|
T28 |
39 |
|
T95 |
16 |
|
T96 |
50 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
661 |
1 |
|
|
T28 |
16 |
|
T95 |
9 |
|
T96 |
24 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1427 |
1 |
|
|
T28 |
43 |
|
T95 |
14 |
|
T96 |
47 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
648 |
1 |
|
|
T28 |
15 |
|
T95 |
8 |
|
T96 |
21 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1470 |
1 |
|
|
T28 |
39 |
|
T95 |
16 |
|
T96 |
49 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
661 |
1 |
|
|
T28 |
16 |
|
T95 |
9 |
|
T96 |
24 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1393 |
1 |
|
|
T28 |
42 |
|
T95 |
12 |
|
T96 |
44 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
648 |
1 |
|
|
T28 |
15 |
|
T95 |
8 |
|
T96 |
21 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1436 |
1 |
|
|
T28 |
36 |
|
T95 |
16 |
|
T96 |
48 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
661 |
1 |
|
|
T28 |
16 |
|
T95 |
9 |
|
T96 |
24 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1356 |
1 |
|
|
T28 |
42 |
|
T95 |
11 |
|
T96 |
44 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
646 |
1 |
|
|
T28 |
15 |
|
T95 |
8 |
|
T96 |
21 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1405 |
1 |
|
|
T28 |
36 |
|
T95 |
15 |
|
T96 |
47 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
661 |
1 |
|
|
T28 |
16 |
|
T95 |
9 |
|
T96 |
24 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1322 |
1 |
|
|
T28 |
40 |
|
T95 |
10 |
|
T96 |
43 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
646 |
1 |
|
|
T28 |
15 |
|
T95 |
8 |
|
T96 |
21 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1383 |
1 |
|
|
T28 |
35 |
|
T95 |
15 |
|
T96 |
47 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
661 |
1 |
|
|
T28 |
16 |
|
T95 |
9 |
|
T96 |
24 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1282 |
1 |
|
|
T28 |
38 |
|
T95 |
10 |
|
T96 |
43 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
645 |
1 |
|
|
T28 |
15 |
|
T95 |
8 |
|
T96 |
21 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1342 |
1 |
|
|
T28 |
35 |
|
T95 |
15 |
|
T96 |
47 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
661 |
1 |
|
|
T28 |
16 |
|
T95 |
9 |
|
T96 |
24 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1251 |
1 |
|
|
T28 |
37 |
|
T95 |
10 |
|
T96 |
41 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
645 |
1 |
|
|
T28 |
15 |
|
T95 |
8 |
|
T96 |
21 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1309 |
1 |
|
|
T28 |
35 |
|
T95 |
15 |
|
T96 |
45 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
661 |
1 |
|
|
T28 |
16 |
|
T95 |
9 |
|
T96 |
24 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1219 |
1 |
|
|
T28 |
36 |
|
T95 |
10 |
|
T96 |
41 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
645 |
1 |
|
|
T28 |
15 |
|
T95 |
8 |
|
T96 |
21 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1284 |
1 |
|
|
T28 |
34 |
|
T95 |
14 |
|
T96 |
44 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58170 |
1 |
|
|
T28 |
1297 |
|
T95 |
755 |
|
T96 |
1326 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[0] |
auto[1] |
43176 |
1 |
|
|
T28 |
857 |
|
T95 |
513 |
|
T96 |
1095 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[1] |
auto[0] |
60002 |
1 |
|
|
T28 |
1103 |
|
T95 |
1411 |
|
T96 |
2299 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48909 |
1 |
|
|
T28 |
1594 |
|
T95 |
443 |
|
T96 |
1133 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T28 |
23 |
|
T95 |
6 |
|
T96 |
28 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1647 |
1 |
|
|
T28 |
41 |
|
T95 |
30 |
|
T96 |
51 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T28 |
22 |
|
T95 |
7 |
|
T96 |
30 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1656 |
1 |
|
|
T28 |
42 |
|
T95 |
30 |
|
T96 |
50 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T28 |
23 |
|
T95 |
6 |
|
T96 |
28 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1614 |
1 |
|
|
T28 |
40 |
|
T95 |
29 |
|
T96 |
48 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T28 |
22 |
|
T95 |
7 |
|
T96 |
30 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1632 |
1 |
|
|
T28 |
41 |
|
T95 |
30 |
|
T96 |
49 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T28 |
23 |
|
T95 |
6 |
|
T96 |
28 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1586 |
1 |
|
|
T28 |
40 |
|
T95 |
29 |
|
T96 |
48 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T28 |
22 |
|
T95 |
7 |
|
T96 |
30 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1594 |
1 |
|
|
T28 |
41 |
|
T95 |
30 |
|
T96 |
46 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T28 |
23 |
|
T95 |
6 |
|
T96 |
28 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1559 |
1 |
|
|
T28 |
39 |
|
T95 |
29 |
|
T96 |
47 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T28 |
22 |
|
T95 |
7 |
|
T96 |
30 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1564 |
1 |
|
|
T28 |
40 |
|
T95 |
28 |
|
T96 |
45 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T28 |
23 |
|
T95 |
6 |
|
T96 |
28 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1524 |
1 |
|
|
T28 |
39 |
|
T95 |
29 |
|
T96 |
46 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T28 |
22 |
|
T95 |
7 |
|
T96 |
30 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1537 |
1 |
|
|
T28 |
39 |
|
T95 |
28 |
|
T96 |
44 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T28 |
23 |
|
T95 |
6 |
|
T96 |
28 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1487 |
1 |
|
|
T28 |
39 |
|
T95 |
27 |
|
T96 |
42 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T28 |
22 |
|
T95 |
7 |
|
T96 |
30 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1511 |
1 |
|
|
T28 |
39 |
|
T95 |
28 |
|
T96 |
43 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T28 |
23 |
|
T95 |
6 |
|
T96 |
28 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1452 |
1 |
|
|
T28 |
33 |
|
T95 |
27 |
|
T96 |
42 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T28 |
22 |
|
T95 |
7 |
|
T96 |
29 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1481 |
1 |
|
|
T28 |
35 |
|
T95 |
27 |
|
T96 |
43 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T28 |
23 |
|
T95 |
6 |
|
T96 |
28 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1415 |
1 |
|
|
T28 |
32 |
|
T95 |
25 |
|
T96 |
39 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T28 |
22 |
|
T95 |
7 |
|
T96 |
29 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1444 |
1 |
|
|
T28 |
34 |
|
T95 |
27 |
|
T96 |
42 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T28 |
23 |
|
T95 |
6 |
|
T96 |
28 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1384 |
1 |
|
|
T28 |
31 |
|
T95 |
24 |
|
T96 |
38 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T28 |
22 |
|
T95 |
7 |
|
T96 |
29 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1410 |
1 |
|
|
T28 |
32 |
|
T95 |
27 |
|
T96 |
42 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T28 |
23 |
|
T95 |
6 |
|
T96 |
28 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1348 |
1 |
|
|
T28 |
30 |
|
T95 |
24 |
|
T96 |
38 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T28 |
22 |
|
T95 |
7 |
|
T96 |
29 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1368 |
1 |
|
|
T28 |
32 |
|
T95 |
27 |
|
T96 |
41 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T28 |
23 |
|
T95 |
6 |
|
T96 |
28 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1323 |
1 |
|
|
T28 |
30 |
|
T95 |
23 |
|
T96 |
37 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T28 |
22 |
|
T95 |
7 |
|
T96 |
29 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1334 |
1 |
|
|
T28 |
32 |
|
T95 |
27 |
|
T96 |
41 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T28 |
23 |
|
T95 |
6 |
|
T96 |
28 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1294 |
1 |
|
|
T28 |
29 |
|
T95 |
23 |
|
T96 |
35 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T28 |
22 |
|
T95 |
7 |
|
T96 |
29 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1294 |
1 |
|
|
T28 |
31 |
|
T95 |
25 |
|
T96 |
40 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T28 |
23 |
|
T95 |
6 |
|
T96 |
28 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1261 |
1 |
|
|
T28 |
29 |
|
T95 |
21 |
|
T96 |
34 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T28 |
22 |
|
T95 |
7 |
|
T96 |
29 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1256 |
1 |
|
|
T28 |
30 |
|
T95 |
24 |
|
T96 |
40 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T28 |
23 |
|
T95 |
6 |
|
T96 |
28 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1235 |
1 |
|
|
T28 |
29 |
|
T95 |
20 |
|
T96 |
34 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T28 |
22 |
|
T95 |
7 |
|
T96 |
29 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1240 |
1 |
|
|
T28 |
29 |
|
T95 |
22 |
|
T96 |
40 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T28 |
23 |
|
T95 |
6 |
|
T96 |
28 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1201 |
1 |
|
|
T28 |
29 |
|
T95 |
20 |
|
T96 |
33 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T28 |
22 |
|
T95 |
7 |
|
T96 |
29 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1217 |
1 |
|
|
T28 |
28 |
|
T95 |
21 |
|
T96 |
40 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[0] |
auto[0] |
59758 |
1 |
|
|
T28 |
824 |
|
T95 |
1596 |
|
T96 |
1692 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48820 |
1 |
|
|
T28 |
1553 |
|
T95 |
470 |
|
T96 |
828 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[1] |
auto[0] |
58007 |
1 |
|
|
T28 |
950 |
|
T95 |
692 |
|
T96 |
1637 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[1] |
auto[1] |
43575 |
1 |
|
|
T28 |
1337 |
|
T95 |
393 |
|
T96 |
1659 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T28 |
13 |
|
T95 |
15 |
|
T96 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1645 |
1 |
|
|
T28 |
61 |
|
T95 |
20 |
|
T96 |
52 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T28 |
13 |
|
T95 |
11 |
|
T96 |
25 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1641 |
1 |
|
|
T28 |
60 |
|
T95 |
24 |
|
T96 |
55 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T28 |
13 |
|
T95 |
15 |
|
T96 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1616 |
1 |
|
|
T28 |
59 |
|
T95 |
19 |
|
T96 |
51 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T28 |
13 |
|
T95 |
11 |
|
T96 |
25 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1600 |
1 |
|
|
T28 |
59 |
|
T95 |
23 |
|
T96 |
55 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T28 |
13 |
|
T95 |
15 |
|
T96 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1582 |
1 |
|
|
T28 |
55 |
|
T95 |
19 |
|
T96 |
51 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T28 |
13 |
|
T95 |
11 |
|
T96 |
25 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1571 |
1 |
|
|
T28 |
58 |
|
T95 |
23 |
|
T96 |
53 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T28 |
13 |
|
T95 |
15 |
|
T96 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1555 |
1 |
|
|
T28 |
53 |
|
T95 |
18 |
|
T96 |
49 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T28 |
13 |
|
T95 |
11 |
|
T96 |
25 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1543 |
1 |
|
|
T28 |
57 |
|
T95 |
22 |
|
T96 |
53 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T28 |
13 |
|
T95 |
15 |
|
T96 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1535 |
1 |
|
|
T28 |
51 |
|
T95 |
18 |
|
T96 |
48 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T28 |
13 |
|
T95 |
11 |
|
T96 |
25 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1515 |
1 |
|
|
T28 |
56 |
|
T95 |
22 |
|
T96 |
51 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T28 |
13 |
|
T95 |
15 |
|
T96 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1500 |
1 |
|
|
T28 |
50 |
|
T95 |
18 |
|
T96 |
48 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T28 |
13 |
|
T95 |
11 |
|
T96 |
25 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1486 |
1 |
|
|
T28 |
56 |
|
T95 |
22 |
|
T96 |
51 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T28 |
13 |
|
T95 |
15 |
|
T96 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1461 |
1 |
|
|
T28 |
50 |
|
T95 |
18 |
|
T96 |
48 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T28 |
13 |
|
T95 |
10 |
|
T96 |
24 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1456 |
1 |
|
|
T28 |
54 |
|
T95 |
22 |
|
T96 |
50 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T28 |
13 |
|
T95 |
15 |
|
T96 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1418 |
1 |
|
|
T28 |
48 |
|
T95 |
17 |
|
T96 |
45 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T28 |
13 |
|
T95 |
10 |
|
T96 |
24 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1414 |
1 |
|
|
T28 |
52 |
|
T95 |
21 |
|
T96 |
48 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T28 |
13 |
|
T95 |
15 |
|
T96 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1389 |
1 |
|
|
T28 |
47 |
|
T95 |
16 |
|
T96 |
44 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T28 |
13 |
|
T95 |
10 |
|
T96 |
24 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1388 |
1 |
|
|
T28 |
51 |
|
T95 |
21 |
|
T96 |
48 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T28 |
13 |
|
T95 |
15 |
|
T96 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1357 |
1 |
|
|
T28 |
43 |
|
T95 |
15 |
|
T96 |
41 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T28 |
13 |
|
T95 |
10 |
|
T96 |
24 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1358 |
1 |
|
|
T28 |
51 |
|
T95 |
21 |
|
T96 |
47 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T28 |
13 |
|
T95 |
15 |
|
T96 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1324 |
1 |
|
|
T28 |
43 |
|
T95 |
14 |
|
T96 |
39 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T28 |
13 |
|
T95 |
10 |
|
T96 |
24 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1336 |
1 |
|
|
T28 |
51 |
|
T95 |
20 |
|
T96 |
46 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T28 |
13 |
|
T95 |
15 |
|
T96 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1300 |
1 |
|
|
T28 |
41 |
|
T95 |
14 |
|
T96 |
38 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T28 |
13 |
|
T95 |
10 |
|
T96 |
24 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1299 |
1 |
|
|
T28 |
50 |
|
T95 |
20 |
|
T96 |
44 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T28 |
13 |
|
T95 |
15 |
|
T96 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1260 |
1 |
|
|
T28 |
38 |
|
T95 |
14 |
|
T96 |
37 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T28 |
13 |
|
T95 |
10 |
|
T96 |
24 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1262 |
1 |
|
|
T28 |
48 |
|
T95 |
19 |
|
T96 |
42 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T28 |
13 |
|
T95 |
15 |
|
T96 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1228 |
1 |
|
|
T28 |
38 |
|
T95 |
14 |
|
T96 |
34 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T28 |
13 |
|
T95 |
10 |
|
T96 |
24 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1229 |
1 |
|
|
T28 |
46 |
|
T95 |
19 |
|
T96 |
42 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T28 |
13 |
|
T95 |
15 |
|
T96 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1206 |
1 |
|
|
T28 |
35 |
|
T95 |
14 |
|
T96 |
34 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T28 |
13 |
|
T95 |
10 |
|
T96 |
24 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1197 |
1 |
|
|
T28 |
46 |
|
T95 |
19 |
|
T96 |
41 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[0] |
auto[0] |
55848 |
1 |
|
|
T28 |
1072 |
|
T95 |
605 |
|
T96 |
2095 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[0] |
auto[1] |
51656 |
1 |
|
|
T28 |
1005 |
|
T95 |
488 |
|
T96 |
1100 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[1] |
auto[0] |
58362 |
1 |
|
|
T28 |
1854 |
|
T95 |
786 |
|
T96 |
1712 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[1] |
auto[1] |
43600 |
1 |
|
|
T28 |
882 |
|
T95 |
1263 |
|
T96 |
959 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T28 |
21 |
|
T95 |
12 |
|
T96 |
26 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1671 |
1 |
|
|
T28 |
42 |
|
T95 |
24 |
|
T96 |
50 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T28 |
22 |
|
T95 |
13 |
|
T96 |
28 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1647 |
1 |
|
|
T28 |
41 |
|
T95 |
24 |
|
T96 |
49 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T28 |
21 |
|
T95 |
12 |
|
T96 |
26 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1654 |
1 |
|
|
T28 |
42 |
|
T95 |
23 |
|
T96 |
50 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T28 |
22 |
|
T95 |
13 |
|
T96 |
28 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1616 |
1 |
|
|
T28 |
41 |
|
T95 |
24 |
|
T96 |
48 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T28 |
21 |
|
T95 |
12 |
|
T96 |
26 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1630 |
1 |
|
|
T28 |
42 |
|
T95 |
22 |
|
T96 |
49 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T28 |
22 |
|
T95 |
13 |
|
T96 |
28 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1580 |
1 |
|
|
T28 |
39 |
|
T95 |
22 |
|
T96 |
46 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T28 |
21 |
|
T95 |
12 |
|
T96 |
26 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1592 |
1 |
|
|
T28 |
40 |
|
T95 |
22 |
|
T96 |
48 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T28 |
22 |
|
T95 |
13 |
|
T96 |
28 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1542 |
1 |
|
|
T28 |
39 |
|
T95 |
22 |
|
T96 |
46 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T28 |
21 |
|
T95 |
12 |
|
T96 |
26 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1562 |
1 |
|
|
T28 |
40 |
|
T95 |
21 |
|
T96 |
47 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T28 |
22 |
|
T95 |
13 |
|
T96 |
28 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1520 |
1 |
|
|
T28 |
38 |
|
T95 |
21 |
|
T96 |
45 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T28 |
21 |
|
T95 |
12 |
|
T96 |
26 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1523 |
1 |
|
|
T28 |
40 |
|
T95 |
21 |
|
T96 |
46 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T28 |
22 |
|
T95 |
13 |
|
T96 |
28 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1477 |
1 |
|
|
T28 |
35 |
|
T95 |
20 |
|
T96 |
44 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T28 |
21 |
|
T95 |
12 |
|
T96 |
26 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1494 |
1 |
|
|
T28 |
40 |
|
T95 |
20 |
|
T96 |
46 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T28 |
22 |
|
T95 |
12 |
|
T96 |
27 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1450 |
1 |
|
|
T28 |
34 |
|
T95 |
20 |
|
T96 |
42 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T28 |
21 |
|
T95 |
12 |
|
T96 |
26 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1462 |
1 |
|
|
T28 |
38 |
|
T95 |
19 |
|
T96 |
46 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T28 |
22 |
|
T95 |
12 |
|
T96 |
27 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1411 |
1 |
|
|
T28 |
34 |
|
T95 |
19 |
|
T96 |
42 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T28 |
21 |
|
T95 |
12 |
|
T96 |
26 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1432 |
1 |
|
|
T28 |
38 |
|
T95 |
18 |
|
T96 |
45 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T28 |
22 |
|
T95 |
12 |
|
T96 |
27 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1387 |
1 |
|
|
T28 |
33 |
|
T95 |
19 |
|
T96 |
41 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T28 |
21 |
|
T95 |
12 |
|
T96 |
26 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1406 |
1 |
|
|
T28 |
38 |
|
T95 |
17 |
|
T96 |
44 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T28 |
22 |
|
T95 |
12 |
|
T96 |
27 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1353 |
1 |
|
|
T28 |
33 |
|
T95 |
19 |
|
T96 |
39 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T28 |
21 |
|
T95 |
12 |
|
T96 |
26 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1378 |
1 |
|
|
T28 |
37 |
|
T95 |
17 |
|
T96 |
44 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T28 |
22 |
|
T95 |
12 |
|
T96 |
27 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1318 |
1 |
|
|
T28 |
33 |
|
T95 |
19 |
|
T96 |
39 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T28 |
21 |
|
T95 |
12 |
|
T96 |
26 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1353 |
1 |
|
|
T28 |
36 |
|
T95 |
17 |
|
T96 |
43 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T28 |
22 |
|
T95 |
12 |
|
T96 |
27 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1285 |
1 |
|
|
T28 |
33 |
|
T95 |
19 |
|
T96 |
38 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T28 |
21 |
|
T95 |
12 |
|
T96 |
26 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1316 |
1 |
|
|
T28 |
36 |
|
T95 |
17 |
|
T96 |
41 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T28 |
22 |
|
T95 |
12 |
|
T96 |
27 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1244 |
1 |
|
|
T28 |
31 |
|
T95 |
17 |
|
T96 |
37 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T28 |
21 |
|
T95 |
12 |
|
T96 |
26 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1293 |
1 |
|
|
T28 |
36 |
|
T95 |
17 |
|
T96 |
40 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T28 |
22 |
|
T95 |
12 |
|
T96 |
27 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1211 |
1 |
|
|
T28 |
31 |
|
T95 |
17 |
|
T96 |
37 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T28 |
21 |
|
T95 |
12 |
|
T96 |
26 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1257 |
1 |
|
|
T28 |
35 |
|
T95 |
16 |
|
T96 |
39 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T28 |
22 |
|
T95 |
12 |
|
T96 |
27 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1179 |
1 |
|
|
T28 |
28 |
|
T95 |
17 |
|
T96 |
34 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[0] |
auto[0] |
60585 |
1 |
|
|
T28 |
1316 |
|
T95 |
1617 |
|
T96 |
970 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[0] |
auto[1] |
49633 |
1 |
|
|
T28 |
656 |
|
T95 |
481 |
|
T96 |
1601 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57354 |
1 |
|
|
T28 |
2040 |
|
T95 |
599 |
|
T96 |
1572 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[1] |
auto[1] |
42228 |
1 |
|
|
T28 |
877 |
|
T95 |
490 |
|
T96 |
1610 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T28 |
26 |
|
T95 |
11 |
|
T96 |
22 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1669 |
1 |
|
|
T28 |
35 |
|
T95 |
22 |
|
T96 |
59 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T28 |
22 |
|
T95 |
9 |
|
T96 |
18 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1672 |
1 |
|
|
T28 |
39 |
|
T95 |
24 |
|
T96 |
63 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T28 |
26 |
|
T95 |
11 |
|
T96 |
22 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1624 |
1 |
|
|
T28 |
34 |
|
T95 |
21 |
|
T96 |
57 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T28 |
22 |
|
T95 |
9 |
|
T96 |
18 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1643 |
1 |
|
|
T28 |
38 |
|
T95 |
24 |
|
T96 |
63 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T28 |
26 |
|
T95 |
11 |
|
T96 |
22 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1594 |
1 |
|
|
T28 |
33 |
|
T95 |
20 |
|
T96 |
56 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T28 |
22 |
|
T95 |
9 |
|
T96 |
18 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1621 |
1 |
|
|
T28 |
37 |
|
T95 |
24 |
|
T96 |
63 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T28 |
26 |
|
T95 |
11 |
|
T96 |
22 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1565 |
1 |
|
|
T28 |
31 |
|
T95 |
20 |
|
T96 |
54 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T28 |
22 |
|
T95 |
9 |
|
T96 |
18 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1580 |
1 |
|
|
T28 |
37 |
|
T95 |
24 |
|
T96 |
63 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T28 |
26 |
|
T95 |
11 |
|
T96 |
22 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1549 |
1 |
|
|
T28 |
31 |
|
T95 |
20 |
|
T96 |
53 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T28 |
22 |
|
T95 |
9 |
|
T96 |
18 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1548 |
1 |
|
|
T28 |
37 |
|
T95 |
24 |
|
T96 |
62 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T28 |
26 |
|
T95 |
11 |
|
T96 |
22 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1517 |
1 |
|
|
T28 |
30 |
|
T95 |
19 |
|
T96 |
52 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T28 |
22 |
|
T95 |
9 |
|
T96 |
18 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1513 |
1 |
|
|
T28 |
36 |
|
T95 |
24 |
|
T96 |
62 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T28 |
26 |
|
T95 |
11 |
|
T96 |
22 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1480 |
1 |
|
|
T28 |
28 |
|
T95 |
19 |
|
T96 |
51 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T28 |
22 |
|
T95 |
9 |
|
T96 |
17 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1478 |
1 |
|
|
T28 |
35 |
|
T95 |
24 |
|
T96 |
60 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T28 |
26 |
|
T95 |
11 |
|
T96 |
22 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1456 |
1 |
|
|
T28 |
28 |
|
T95 |
19 |
|
T96 |
51 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T28 |
22 |
|
T95 |
9 |
|
T96 |
17 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1444 |
1 |
|
|
T28 |
35 |
|
T95 |
23 |
|
T96 |
59 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T28 |
26 |
|
T95 |
11 |
|
T96 |
22 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1418 |
1 |
|
|
T28 |
28 |
|
T95 |
17 |
|
T96 |
50 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
689 |
1 |
|
|
T28 |
22 |
|
T95 |
9 |
|
T96 |
17 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1410 |
1 |
|
|
T28 |
34 |
|
T95 |
23 |
|
T96 |
57 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T28 |
26 |
|
T95 |
11 |
|
T96 |
22 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1388 |
1 |
|
|
T28 |
27 |
|
T95 |
17 |
|
T96 |
50 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
689 |
1 |
|
|
T28 |
22 |
|
T95 |
9 |
|
T96 |
17 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1375 |
1 |
|
|
T28 |
34 |
|
T95 |
22 |
|
T96 |
55 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T28 |
26 |
|
T95 |
11 |
|
T96 |
22 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1369 |
1 |
|
|
T28 |
26 |
|
T95 |
17 |
|
T96 |
49 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
685 |
1 |
|
|
T28 |
22 |
|
T95 |
9 |
|
T96 |
17 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1333 |
1 |
|
|
T28 |
34 |
|
T95 |
21 |
|
T96 |
54 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T28 |
26 |
|
T95 |
11 |
|
T96 |
22 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1338 |
1 |
|
|
T28 |
26 |
|
T95 |
17 |
|
T96 |
49 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
685 |
1 |
|
|
T28 |
22 |
|
T95 |
9 |
|
T96 |
17 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1302 |
1 |
|
|
T28 |
34 |
|
T95 |
20 |
|
T96 |
52 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T28 |
26 |
|
T95 |
11 |
|
T96 |
22 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1317 |
1 |
|
|
T28 |
23 |
|
T95 |
17 |
|
T96 |
46 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T28 |
22 |
|
T95 |
9 |
|
T96 |
17 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1276 |
1 |
|
|
T28 |
33 |
|
T95 |
20 |
|
T96 |
50 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T28 |
26 |
|
T95 |
11 |
|
T96 |
22 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1283 |
1 |
|
|
T28 |
23 |
|
T95 |
17 |
|
T96 |
44 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T28 |
22 |
|
T95 |
9 |
|
T96 |
17 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1237 |
1 |
|
|
T28 |
32 |
|
T95 |
19 |
|
T96 |
50 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T28 |
26 |
|
T95 |
11 |
|
T96 |
22 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1254 |
1 |
|
|
T28 |
23 |
|
T95 |
17 |
|
T96 |
44 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T28 |
22 |
|
T95 |
9 |
|
T96 |
17 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1201 |
1 |
|
|
T28 |
31 |
|
T95 |
16 |
|
T96 |
50 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[0] |
auto[0] |
63621 |
1 |
|
|
T28 |
964 |
|
T95 |
1737 |
|
T96 |
2128 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45367 |
1 |
|
|
T28 |
817 |
|
T95 |
343 |
|
T96 |
1026 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[1] |
auto[0] |
55187 |
1 |
|
|
T28 |
2267 |
|
T95 |
679 |
|
T96 |
1710 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46174 |
1 |
|
|
T28 |
817 |
|
T95 |
366 |
|
T96 |
1304 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T28 |
21 |
|
T95 |
10 |
|
T96 |
20 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1644 |
1 |
|
|
T28 |
39 |
|
T95 |
25 |
|
T96 |
44 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T28 |
23 |
|
T95 |
16 |
|
T96 |
18 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1664 |
1 |
|
|
T28 |
37 |
|
T95 |
19 |
|
T96 |
46 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T28 |
21 |
|
T95 |
10 |
|
T96 |
20 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1607 |
1 |
|
|
T28 |
39 |
|
T95 |
25 |
|
T96 |
44 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T28 |
23 |
|
T95 |
16 |
|
T96 |
18 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1632 |
1 |
|
|
T28 |
37 |
|
T95 |
19 |
|
T96 |
46 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T28 |
21 |
|
T95 |
10 |
|
T96 |
20 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1581 |
1 |
|
|
T28 |
39 |
|
T95 |
25 |
|
T96 |
43 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T28 |
23 |
|
T95 |
16 |
|
T96 |
18 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1600 |
1 |
|
|
T28 |
37 |
|
T95 |
19 |
|
T96 |
45 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T28 |
21 |
|
T95 |
10 |
|
T96 |
20 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1551 |
1 |
|
|
T28 |
38 |
|
T95 |
25 |
|
T96 |
43 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T28 |
23 |
|
T95 |
16 |
|
T96 |
18 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1563 |
1 |
|
|
T28 |
36 |
|
T95 |
19 |
|
T96 |
44 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T28 |
21 |
|
T95 |
10 |
|
T96 |
20 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1517 |
1 |
|
|
T28 |
36 |
|
T95 |
24 |
|
T96 |
43 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
693 |
1 |
|
|
T28 |
23 |
|
T95 |
16 |
|
T96 |
18 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1533 |
1 |
|
|
T28 |
36 |
|
T95 |
19 |
|
T96 |
44 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T28 |
21 |
|
T95 |
10 |
|
T96 |
20 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1494 |
1 |
|
|
T28 |
36 |
|
T95 |
24 |
|
T96 |
41 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
693 |
1 |
|
|
T28 |
23 |
|
T95 |
16 |
|
T96 |
18 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1497 |
1 |
|
|
T28 |
35 |
|
T95 |
19 |
|
T96 |
43 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T28 |
20 |
|
T95 |
10 |
|
T96 |
20 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1460 |
1 |
|
|
T28 |
36 |
|
T95 |
23 |
|
T96 |
39 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T28 |
23 |
|
T95 |
15 |
|
T96 |
18 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1467 |
1 |
|
|
T28 |
34 |
|
T95 |
19 |
|
T96 |
42 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T28 |
20 |
|
T95 |
10 |
|
T96 |
20 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1435 |
1 |
|
|
T28 |
36 |
|
T95 |
22 |
|
T96 |
39 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T28 |
23 |
|
T95 |
15 |
|
T96 |
18 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1445 |
1 |
|
|
T28 |
34 |
|
T95 |
18 |
|
T96 |
42 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T28 |
20 |
|
T95 |
10 |
|
T96 |
20 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1400 |
1 |
|
|
T28 |
34 |
|
T95 |
21 |
|
T96 |
39 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T28 |
23 |
|
T95 |
15 |
|
T96 |
18 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1412 |
1 |
|
|
T28 |
34 |
|
T95 |
18 |
|
T96 |
42 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T28 |
20 |
|
T95 |
10 |
|
T96 |
20 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1371 |
1 |
|
|
T28 |
34 |
|
T95 |
20 |
|
T96 |
39 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T28 |
23 |
|
T95 |
15 |
|
T96 |
18 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1375 |
1 |
|
|
T28 |
34 |
|
T95 |
17 |
|
T96 |
41 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T28 |
20 |
|
T95 |
10 |
|
T96 |
20 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1339 |
1 |
|
|
T28 |
34 |
|
T95 |
20 |
|
T96 |
39 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
679 |
1 |
|
|
T28 |
23 |
|
T95 |
15 |
|
T96 |
18 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1344 |
1 |
|
|
T28 |
33 |
|
T95 |
17 |
|
T96 |
41 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T28 |
20 |
|
T95 |
10 |
|
T96 |
20 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1310 |
1 |
|
|
T28 |
34 |
|
T95 |
19 |
|
T96 |
38 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
679 |
1 |
|
|
T28 |
23 |
|
T95 |
15 |
|
T96 |
18 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1304 |
1 |
|
|
T28 |
33 |
|
T95 |
17 |
|
T96 |
41 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T28 |
20 |
|
T95 |
10 |
|
T96 |
20 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1280 |
1 |
|
|
T28 |
34 |
|
T95 |
18 |
|
T96 |
38 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
678 |
1 |
|
|
T28 |
23 |
|
T95 |
15 |
|
T96 |
18 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1266 |
1 |
|
|
T28 |
31 |
|
T95 |
16 |
|
T96 |
40 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T28 |
20 |
|
T95 |
10 |
|
T96 |
20 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1251 |
1 |
|
|
T28 |
34 |
|
T95 |
18 |
|
T96 |
37 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
678 |
1 |
|
|
T28 |
23 |
|
T95 |
15 |
|
T96 |
18 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1221 |
1 |
|
|
T28 |
30 |
|
T95 |
16 |
|
T96 |
38 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T28 |
20 |
|
T95 |
10 |
|
T96 |
20 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1213 |
1 |
|
|
T28 |
33 |
|
T95 |
16 |
|
T96 |
35 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
678 |
1 |
|
|
T28 |
23 |
|
T95 |
15 |
|
T96 |
18 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1199 |
1 |
|
|
T28 |
28 |
|
T95 |
15 |
|
T96 |
38 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[0] |
auto[0] |
67596 |
1 |
|
|
T28 |
1539 |
|
T95 |
704 |
|
T96 |
2018 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44436 |
1 |
|
|
T28 |
838 |
|
T95 |
556 |
|
T96 |
1178 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57611 |
1 |
|
|
T28 |
1804 |
|
T95 |
1390 |
|
T96 |
1677 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[1] |
auto[1] |
39595 |
1 |
|
|
T28 |
709 |
|
T95 |
513 |
|
T96 |
984 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T28 |
25 |
|
T95 |
12 |
|
T96 |
24 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1625 |
1 |
|
|
T28 |
37 |
|
T95 |
21 |
|
T96 |
51 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T28 |
22 |
|
T95 |
9 |
|
T96 |
29 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1637 |
1 |
|
|
T28 |
40 |
|
T95 |
25 |
|
T96 |
46 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T28 |
25 |
|
T95 |
12 |
|
T96 |
24 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1588 |
1 |
|
|
T28 |
37 |
|
T95 |
20 |
|
T96 |
50 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T28 |
22 |
|
T95 |
9 |
|
T96 |
29 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1619 |
1 |
|
|
T28 |
40 |
|
T95 |
25 |
|
T96 |
46 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T28 |
25 |
|
T95 |
12 |
|
T96 |
24 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1561 |
1 |
|
|
T28 |
37 |
|
T95 |
19 |
|
T96 |
49 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T28 |
22 |
|
T95 |
9 |
|
T96 |
29 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1594 |
1 |
|
|
T28 |
39 |
|
T95 |
25 |
|
T96 |
46 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T28 |
25 |
|
T95 |
12 |
|
T96 |
24 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1535 |
1 |
|
|
T28 |
35 |
|
T95 |
19 |
|
T96 |
49 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T28 |
22 |
|
T95 |
9 |
|
T96 |
29 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1552 |
1 |
|
|
T28 |
37 |
|
T95 |
25 |
|
T96 |
44 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T28 |
25 |
|
T95 |
12 |
|
T96 |
24 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1516 |
1 |
|
|
T28 |
35 |
|
T95 |
19 |
|
T96 |
48 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T28 |
22 |
|
T95 |
9 |
|
T96 |
29 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1526 |
1 |
|
|
T28 |
36 |
|
T95 |
25 |
|
T96 |
43 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T28 |
25 |
|
T95 |
12 |
|
T96 |
24 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1498 |
1 |
|
|
T28 |
33 |
|
T95 |
18 |
|
T96 |
48 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T28 |
22 |
|
T95 |
9 |
|
T96 |
29 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1495 |
1 |
|
|
T28 |
34 |
|
T95 |
25 |
|
T96 |
43 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T28 |
25 |
|
T95 |
12 |
|
T96 |
24 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1479 |
1 |
|
|
T28 |
33 |
|
T95 |
18 |
|
T96 |
48 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
731 |
1 |
|
|
T28 |
22 |
|
T95 |
8 |
|
T96 |
29 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1457 |
1 |
|
|
T28 |
30 |
|
T95 |
25 |
|
T96 |
43 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T28 |
25 |
|
T95 |
12 |
|
T96 |
24 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1444 |
1 |
|
|
T28 |
32 |
|
T95 |
18 |
|
T96 |
47 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
731 |
1 |
|
|
T28 |
22 |
|
T95 |
8 |
|
T96 |
29 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1423 |
1 |
|
|
T28 |
29 |
|
T95 |
24 |
|
T96 |
42 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T28 |
25 |
|
T95 |
12 |
|
T96 |
24 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1402 |
1 |
|
|
T28 |
32 |
|
T95 |
18 |
|
T96 |
46 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T28 |
22 |
|
T95 |
8 |
|
T96 |
29 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1384 |
1 |
|
|
T28 |
28 |
|
T95 |
23 |
|
T96 |
42 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T28 |
25 |
|
T95 |
12 |
|
T96 |
24 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1372 |
1 |
|
|
T28 |
31 |
|
T95 |
18 |
|
T96 |
46 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T28 |
22 |
|
T95 |
8 |
|
T96 |
29 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1361 |
1 |
|
|
T28 |
28 |
|
T95 |
22 |
|
T96 |
42 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T28 |
25 |
|
T95 |
12 |
|
T96 |
24 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1340 |
1 |
|
|
T28 |
31 |
|
T95 |
18 |
|
T96 |
45 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T28 |
22 |
|
T95 |
8 |
|
T96 |
29 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1335 |
1 |
|
|
T28 |
28 |
|
T95 |
22 |
|
T96 |
41 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T28 |
25 |
|
T95 |
12 |
|
T96 |
24 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1309 |
1 |
|
|
T28 |
30 |
|
T95 |
18 |
|
T96 |
45 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T28 |
22 |
|
T95 |
8 |
|
T96 |
29 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1300 |
1 |
|
|
T28 |
26 |
|
T95 |
22 |
|
T96 |
41 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T28 |
25 |
|
T95 |
12 |
|
T96 |
24 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1284 |
1 |
|
|
T28 |
30 |
|
T95 |
18 |
|
T96 |
43 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T28 |
22 |
|
T95 |
8 |
|
T96 |
29 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1263 |
1 |
|
|
T28 |
26 |
|
T95 |
22 |
|
T96 |
37 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T28 |
25 |
|
T95 |
12 |
|
T96 |
24 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1241 |
1 |
|
|
T28 |
30 |
|
T95 |
17 |
|
T96 |
42 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T28 |
22 |
|
T95 |
8 |
|
T96 |
29 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1227 |
1 |
|
|
T28 |
26 |
|
T95 |
22 |
|
T96 |
34 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T28 |
25 |
|
T95 |
12 |
|
T96 |
24 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1209 |
1 |
|
|
T28 |
30 |
|
T95 |
16 |
|
T96 |
39 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T28 |
22 |
|
T95 |
8 |
|
T96 |
29 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1197 |
1 |
|
|
T28 |
26 |
|
T95 |
22 |
|
T96 |
34 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[0] |
auto[0] |
53602 |
1 |
|
|
T28 |
917 |
|
T95 |
547 |
|
T96 |
2163 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[0] |
auto[1] |
50326 |
1 |
|
|
T28 |
1806 |
|
T95 |
661 |
|
T96 |
1039 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56387 |
1 |
|
|
T28 |
922 |
|
T95 |
624 |
|
T96 |
1486 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48367 |
1 |
|
|
T28 |
1136 |
|
T95 |
1226 |
|
T96 |
1243 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
685 |
1 |
|
|
T28 |
13 |
|
T95 |
10 |
|
T96 |
19 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1731 |
1 |
|
|
T28 |
56 |
|
T95 |
26 |
|
T96 |
56 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T28 |
9 |
|
T95 |
13 |
|
T96 |
24 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1718 |
1 |
|
|
T28 |
59 |
|
T95 |
24 |
|
T96 |
51 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
685 |
1 |
|
|
T28 |
13 |
|
T95 |
10 |
|
T96 |
19 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1693 |
1 |
|
|
T28 |
53 |
|
T95 |
26 |
|
T96 |
55 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T28 |
9 |
|
T95 |
13 |
|
T96 |
24 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1679 |
1 |
|
|
T28 |
59 |
|
T95 |
24 |
|
T96 |
51 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T28 |
13 |
|
T95 |
10 |
|
T96 |
19 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1666 |
1 |
|
|
T28 |
50 |
|
T95 |
26 |
|
T96 |
54 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T28 |
9 |
|
T95 |
13 |
|
T96 |
24 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1651 |
1 |
|
|
T28 |
58 |
|
T95 |
24 |
|
T96 |
48 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T28 |
13 |
|
T95 |
10 |
|
T96 |
19 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1632 |
1 |
|
|
T28 |
49 |
|
T95 |
26 |
|
T96 |
53 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T28 |
9 |
|
T95 |
13 |
|
T96 |
24 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1632 |
1 |
|
|
T28 |
58 |
|
T95 |
24 |
|
T96 |
48 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T28 |
13 |
|
T95 |
10 |
|
T96 |
19 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1606 |
1 |
|
|
T28 |
49 |
|
T95 |
26 |
|
T96 |
53 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T28 |
9 |
|
T95 |
13 |
|
T96 |
24 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1601 |
1 |
|
|
T28 |
57 |
|
T95 |
22 |
|
T96 |
46 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T28 |
13 |
|
T95 |
10 |
|
T96 |
19 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1571 |
1 |
|
|
T28 |
46 |
|
T95 |
26 |
|
T96 |
53 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T28 |
9 |
|
T95 |
13 |
|
T96 |
24 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1565 |
1 |
|
|
T28 |
55 |
|
T95 |
22 |
|
T96 |
46 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
679 |
1 |
|
|
T28 |
13 |
|
T95 |
10 |
|
T96 |
19 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1538 |
1 |
|
|
T28 |
44 |
|
T95 |
26 |
|
T96 |
52 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T28 |
9 |
|
T95 |
12 |
|
T96 |
23 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1531 |
1 |
|
|
T28 |
54 |
|
T95 |
21 |
|
T96 |
45 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
679 |
1 |
|
|
T28 |
13 |
|
T95 |
10 |
|
T96 |
19 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1503 |
1 |
|
|
T28 |
43 |
|
T95 |
26 |
|
T96 |
50 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T28 |
9 |
|
T95 |
12 |
|
T96 |
23 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1499 |
1 |
|
|
T28 |
51 |
|
T95 |
21 |
|
T96 |
44 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
676 |
1 |
|
|
T28 |
13 |
|
T95 |
10 |
|
T96 |
19 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1471 |
1 |
|
|
T28 |
43 |
|
T95 |
26 |
|
T96 |
49 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T28 |
9 |
|
T95 |
12 |
|
T96 |
23 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1464 |
1 |
|
|
T28 |
51 |
|
T95 |
21 |
|
T96 |
44 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
676 |
1 |
|
|
T28 |
13 |
|
T95 |
10 |
|
T96 |
19 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1439 |
1 |
|
|
T28 |
42 |
|
T95 |
26 |
|
T96 |
48 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T28 |
9 |
|
T95 |
12 |
|
T96 |
23 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1430 |
1 |
|
|
T28 |
47 |
|
T95 |
21 |
|
T96 |
42 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
676 |
1 |
|
|
T28 |
13 |
|
T95 |
10 |
|
T96 |
19 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1401 |
1 |
|
|
T28 |
42 |
|
T95 |
25 |
|
T96 |
44 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T28 |
9 |
|
T95 |
12 |
|
T96 |
23 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1395 |
1 |
|
|
T28 |
47 |
|
T95 |
20 |
|
T96 |
42 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
676 |
1 |
|
|
T28 |
13 |
|
T95 |
10 |
|
T96 |
19 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1365 |
1 |
|
|
T28 |
42 |
|
T95 |
25 |
|
T96 |
43 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T28 |
9 |
|
T95 |
12 |
|
T96 |
23 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1360 |
1 |
|
|
T28 |
47 |
|
T95 |
20 |
|
T96 |
42 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
676 |
1 |
|
|
T28 |
13 |
|
T95 |
10 |
|
T96 |
19 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1337 |
1 |
|
|
T28 |
40 |
|
T95 |
25 |
|
T96 |
43 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
685 |
1 |
|
|
T28 |
9 |
|
T95 |
12 |
|
T96 |
23 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1327 |
1 |
|
|
T28 |
44 |
|
T95 |
20 |
|
T96 |
42 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
676 |
1 |
|
|
T28 |
13 |
|
T95 |
10 |
|
T96 |
19 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1297 |
1 |
|
|
T28 |
40 |
|
T95 |
25 |
|
T96 |
40 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
685 |
1 |
|
|
T28 |
9 |
|
T95 |
12 |
|
T96 |
23 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1294 |
1 |
|
|
T28 |
43 |
|
T95 |
19 |
|
T96 |
42 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
676 |
1 |
|
|
T28 |
13 |
|
T95 |
10 |
|
T96 |
19 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1265 |
1 |
|
|
T28 |
40 |
|
T95 |
23 |
|
T96 |
39 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
685 |
1 |
|
|
T28 |
9 |
|
T95 |
12 |
|
T96 |
23 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1254 |
1 |
|
|
T28 |
41 |
|
T95 |
18 |
|
T96 |
40 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57685 |
1 |
|
|
T28 |
2161 |
|
T95 |
1065 |
|
T96 |
2083 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[0] |
auto[1] |
50071 |
1 |
|
|
T28 |
827 |
|
T95 |
405 |
|
T96 |
1115 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59686 |
1 |
|
|
T28 |
1175 |
|
T95 |
1351 |
|
T96 |
1892 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[1] |
auto[1] |
43308 |
1 |
|
|
T28 |
777 |
|
T95 |
318 |
|
T96 |
889 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
778 |
1 |
|
|
T28 |
24 |
|
T95 |
17 |
|
T96 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1544 |
1 |
|
|
T28 |
38 |
|
T95 |
16 |
|
T96 |
50 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
765 |
1 |
|
|
T28 |
19 |
|
T95 |
17 |
|
T96 |
25 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1560 |
1 |
|
|
T28 |
42 |
|
T95 |
17 |
|
T96 |
47 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
778 |
1 |
|
|
T28 |
24 |
|
T95 |
17 |
|
T96 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1519 |
1 |
|
|
T28 |
36 |
|
T95 |
16 |
|
T96 |
48 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
765 |
1 |
|
|
T28 |
19 |
|
T95 |
17 |
|
T96 |
25 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1538 |
1 |
|
|
T28 |
41 |
|
T95 |
17 |
|
T96 |
47 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
778 |
1 |
|
|
T28 |
24 |
|
T95 |
17 |
|
T96 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1490 |
1 |
|
|
T28 |
36 |
|
T95 |
16 |
|
T96 |
48 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T28 |
19 |
|
T95 |
17 |
|
T96 |
25 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1509 |
1 |
|
|
T28 |
38 |
|
T95 |
17 |
|
T96 |
46 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
778 |
1 |
|
|
T28 |
24 |
|
T95 |
17 |
|
T96 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1459 |
1 |
|
|
T28 |
34 |
|
T95 |
16 |
|
T96 |
48 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T28 |
19 |
|
T95 |
17 |
|
T96 |
25 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1487 |
1 |
|
|
T28 |
37 |
|
T95 |
17 |
|
T96 |
46 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
775 |
1 |
|
|
T28 |
24 |
|
T95 |
17 |
|
T96 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1434 |
1 |
|
|
T28 |
34 |
|
T95 |
16 |
|
T96 |
48 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
759 |
1 |
|
|
T28 |
19 |
|
T95 |
17 |
|
T96 |
25 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1463 |
1 |
|
|
T28 |
36 |
|
T95 |
17 |
|
T96 |
45 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
775 |
1 |
|
|
T28 |
24 |
|
T95 |
17 |
|
T96 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1400 |
1 |
|
|
T28 |
33 |
|
T95 |
16 |
|
T96 |
47 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
759 |
1 |
|
|
T28 |
19 |
|
T95 |
17 |
|
T96 |
25 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1428 |
1 |
|
|
T28 |
35 |
|
T95 |
16 |
|
T96 |
44 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
774 |
1 |
|
|
T28 |
24 |
|
T95 |
17 |
|
T96 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1365 |
1 |
|
|
T28 |
30 |
|
T95 |
15 |
|
T96 |
47 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T28 |
19 |
|
T95 |
17 |
|
T96 |
25 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1402 |
1 |
|
|
T28 |
35 |
|
T95 |
16 |
|
T96 |
44 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
774 |
1 |
|
|
T28 |
24 |
|
T95 |
17 |
|
T96 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1329 |
1 |
|
|
T28 |
30 |
|
T95 |
15 |
|
T96 |
46 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T28 |
19 |
|
T95 |
17 |
|
T96 |
25 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1380 |
1 |
|
|
T28 |
35 |
|
T95 |
16 |
|
T96 |
42 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
768 |
1 |
|
|
T28 |
24 |
|
T95 |
17 |
|
T96 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1295 |
1 |
|
|
T28 |
30 |
|
T95 |
13 |
|
T96 |
46 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T28 |
19 |
|
T95 |
17 |
|
T96 |
25 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1347 |
1 |
|
|
T28 |
34 |
|
T95 |
16 |
|
T96 |
39 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
768 |
1 |
|
|
T28 |
24 |
|
T95 |
17 |
|
T96 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1267 |
1 |
|
|
T28 |
28 |
|
T95 |
13 |
|
T96 |
45 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T28 |
19 |
|
T95 |
17 |
|
T96 |
25 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1322 |
1 |
|
|
T28 |
32 |
|
T95 |
16 |
|
T96 |
38 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
767 |
1 |
|
|
T28 |
24 |
|
T95 |
17 |
|
T96 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1234 |
1 |
|
|
T28 |
27 |
|
T95 |
13 |
|
T96 |
44 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T28 |
19 |
|
T95 |
17 |
|
T96 |
25 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1287 |
1 |
|
|
T28 |
32 |
|
T95 |
16 |
|
T96 |
36 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
767 |
1 |
|
|
T28 |
24 |
|
T95 |
17 |
|
T96 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1206 |
1 |
|
|
T28 |
27 |
|
T95 |
12 |
|
T96 |
44 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T28 |
19 |
|
T95 |
17 |
|
T96 |
25 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1251 |
1 |
|
|
T28 |
30 |
|
T95 |
15 |
|
T96 |
35 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
767 |
1 |
|
|
T28 |
24 |
|
T95 |
17 |
|
T96 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1177 |
1 |
|
|
T28 |
26 |
|
T95 |
12 |
|
T96 |
43 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T28 |
19 |
|
T95 |
17 |
|
T96 |
25 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1226 |
1 |
|
|
T28 |
30 |
|
T95 |
14 |
|
T96 |
33 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
767 |
1 |
|
|
T28 |
24 |
|
T95 |
17 |
|
T96 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1152 |
1 |
|
|
T28 |
26 |
|
T95 |
12 |
|
T96 |
42 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T28 |
19 |
|
T95 |
17 |
|
T96 |
25 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1197 |
1 |
|
|
T28 |
30 |
|
T95 |
13 |
|
T96 |
31 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
767 |
1 |
|
|
T28 |
24 |
|
T95 |
17 |
|
T96 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1118 |
1 |
|
|
T28 |
26 |
|
T95 |
12 |
|
T96 |
38 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T28 |
19 |
|
T95 |
17 |
|
T96 |
25 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1167 |
1 |
|
|
T28 |
28 |
|
T95 |
13 |
|
T96 |
31 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[0] |
auto[0] |
60413 |
1 |
|
|
T28 |
975 |
|
T95 |
1460 |
|
T96 |
2430 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46039 |
1 |
|
|
T28 |
800 |
|
T95 |
409 |
|
T96 |
855 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[1] |
auto[0] |
63806 |
1 |
|
|
T28 |
1873 |
|
T95 |
965 |
|
T96 |
1806 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[1] |
auto[1] |
40385 |
1 |
|
|
T28 |
1095 |
|
T95 |
372 |
|
T96 |
810 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T28 |
17 |
|
T95 |
16 |
|
T96 |
29 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1615 |
1 |
|
|
T28 |
55 |
|
T95 |
16 |
|
T96 |
47 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
784 |
1 |
|
|
T28 |
18 |
|
T95 |
18 |
|
T96 |
35 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1560 |
1 |
|
|
T28 |
54 |
|
T95 |
14 |
|
T96 |
41 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T28 |
17 |
|
T95 |
16 |
|
T96 |
29 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1578 |
1 |
|
|
T28 |
50 |
|
T95 |
15 |
|
T96 |
46 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
784 |
1 |
|
|
T28 |
18 |
|
T95 |
18 |
|
T96 |
35 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1524 |
1 |
|
|
T28 |
51 |
|
T95 |
14 |
|
T96 |
40 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T28 |
17 |
|
T95 |
16 |
|
T96 |
29 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1549 |
1 |
|
|
T28 |
46 |
|
T95 |
15 |
|
T96 |
44 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
783 |
1 |
|
|
T28 |
18 |
|
T95 |
18 |
|
T96 |
35 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1509 |
1 |
|
|
T28 |
50 |
|
T95 |
14 |
|
T96 |
40 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T28 |
17 |
|
T95 |
16 |
|
T96 |
29 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1520 |
1 |
|
|
T28 |
44 |
|
T95 |
14 |
|
T96 |
44 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
783 |
1 |
|
|
T28 |
18 |
|
T95 |
18 |
|
T96 |
35 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1477 |
1 |
|
|
T28 |
48 |
|
T95 |
14 |
|
T96 |
39 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T28 |
17 |
|
T95 |
16 |
|
T96 |
29 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1486 |
1 |
|
|
T28 |
43 |
|
T95 |
13 |
|
T96 |
43 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
779 |
1 |
|
|
T28 |
18 |
|
T95 |
18 |
|
T96 |
35 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1449 |
1 |
|
|
T28 |
46 |
|
T95 |
14 |
|
T96 |
38 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T28 |
17 |
|
T95 |
16 |
|
T96 |
29 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1463 |
1 |
|
|
T28 |
43 |
|
T95 |
13 |
|
T96 |
43 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
779 |
1 |
|
|
T28 |
18 |
|
T95 |
18 |
|
T96 |
35 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1415 |
1 |
|
|
T28 |
46 |
|
T95 |
14 |
|
T96 |
37 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T28 |
17 |
|
T95 |
16 |
|
T96 |
29 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1427 |
1 |
|
|
T28 |
43 |
|
T95 |
12 |
|
T96 |
41 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
771 |
1 |
|
|
T28 |
18 |
|
T95 |
18 |
|
T96 |
34 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1378 |
1 |
|
|
T28 |
44 |
|
T95 |
13 |
|
T96 |
36 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T28 |
17 |
|
T95 |
16 |
|
T96 |
29 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1403 |
1 |
|
|
T28 |
43 |
|
T95 |
12 |
|
T96 |
40 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
771 |
1 |
|
|
T28 |
18 |
|
T95 |
18 |
|
T96 |
34 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1344 |
1 |
|
|
T28 |
43 |
|
T95 |
13 |
|
T96 |
35 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T28 |
17 |
|
T95 |
16 |
|
T96 |
29 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1366 |
1 |
|
|
T28 |
41 |
|
T95 |
12 |
|
T96 |
38 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T28 |
18 |
|
T95 |
18 |
|
T96 |
34 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1324 |
1 |
|
|
T28 |
43 |
|
T95 |
13 |
|
T96 |
34 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T28 |
17 |
|
T95 |
16 |
|
T96 |
29 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1322 |
1 |
|
|
T28 |
40 |
|
T95 |
12 |
|
T96 |
37 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T28 |
18 |
|
T95 |
18 |
|
T96 |
34 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1295 |
1 |
|
|
T28 |
43 |
|
T95 |
12 |
|
T96 |
33 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T28 |
17 |
|
T95 |
16 |
|
T96 |
29 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1294 |
1 |
|
|
T28 |
39 |
|
T95 |
12 |
|
T96 |
36 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T28 |
18 |
|
T95 |
18 |
|
T96 |
34 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1266 |
1 |
|
|
T28 |
41 |
|
T95 |
12 |
|
T96 |
33 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T28 |
17 |
|
T95 |
16 |
|
T96 |
29 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1270 |
1 |
|
|
T28 |
38 |
|
T95 |
11 |
|
T96 |
36 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T28 |
18 |
|
T95 |
18 |
|
T96 |
34 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1236 |
1 |
|
|
T28 |
39 |
|
T95 |
12 |
|
T96 |
32 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T28 |
17 |
|
T95 |
16 |
|
T96 |
29 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1237 |
1 |
|
|
T28 |
37 |
|
T95 |
10 |
|
T96 |
33 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T28 |
18 |
|
T95 |
18 |
|
T96 |
34 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1196 |
1 |
|
|
T28 |
38 |
|
T95 |
12 |
|
T96 |
32 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T28 |
17 |
|
T95 |
16 |
|
T96 |
29 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1209 |
1 |
|
|
T28 |
35 |
|
T95 |
10 |
|
T96 |
32 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T28 |
18 |
|
T95 |
18 |
|
T96 |
34 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1172 |
1 |
|
|
T28 |
38 |
|
T95 |
12 |
|
T96 |
31 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T28 |
17 |
|
T95 |
16 |
|
T96 |
29 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1174 |
1 |
|
|
T28 |
34 |
|
T95 |
10 |
|
T96 |
28 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T28 |
18 |
|
T95 |
18 |
|
T96 |
34 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1148 |
1 |
|
|
T28 |
38 |
|
T95 |
12 |
|
T96 |
31 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57117 |
1 |
|
|
T28 |
2199 |
|
T95 |
783 |
|
T96 |
1479 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47372 |
1 |
|
|
T28 |
684 |
|
T95 |
432 |
|
T96 |
1087 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[1] |
auto[0] |
58686 |
1 |
|
|
T28 |
1344 |
|
T95 |
1545 |
|
T96 |
1953 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47023 |
1 |
|
|
T28 |
817 |
|
T95 |
398 |
|
T96 |
1280 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T28 |
21 |
|
T95 |
13 |
|
T96 |
20 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1623 |
1 |
|
|
T28 |
35 |
|
T95 |
20 |
|
T96 |
60 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T28 |
18 |
|
T95 |
14 |
|
T96 |
22 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1617 |
1 |
|
|
T28 |
37 |
|
T95 |
20 |
|
T96 |
59 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T28 |
21 |
|
T95 |
13 |
|
T96 |
20 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1602 |
1 |
|
|
T28 |
34 |
|
T95 |
20 |
|
T96 |
59 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T28 |
18 |
|
T95 |
14 |
|
T96 |
22 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1588 |
1 |
|
|
T28 |
37 |
|
T95 |
19 |
|
T96 |
57 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T28 |
21 |
|
T95 |
13 |
|
T96 |
20 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1571 |
1 |
|
|
T28 |
32 |
|
T95 |
20 |
|
T96 |
58 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T28 |
18 |
|
T95 |
14 |
|
T96 |
22 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1553 |
1 |
|
|
T28 |
37 |
|
T95 |
19 |
|
T96 |
56 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T28 |
21 |
|
T95 |
13 |
|
T96 |
20 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1539 |
1 |
|
|
T28 |
32 |
|
T95 |
20 |
|
T96 |
57 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T28 |
18 |
|
T95 |
14 |
|
T96 |
22 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1516 |
1 |
|
|
T28 |
36 |
|
T95 |
18 |
|
T96 |
55 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T28 |
21 |
|
T95 |
13 |
|
T96 |
20 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1511 |
1 |
|
|
T28 |
30 |
|
T95 |
20 |
|
T96 |
57 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T28 |
18 |
|
T95 |
14 |
|
T96 |
22 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1480 |
1 |
|
|
T28 |
35 |
|
T95 |
18 |
|
T96 |
54 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T28 |
21 |
|
T95 |
13 |
|
T96 |
20 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1470 |
1 |
|
|
T28 |
29 |
|
T95 |
18 |
|
T96 |
54 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T28 |
18 |
|
T95 |
14 |
|
T96 |
22 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1458 |
1 |
|
|
T28 |
35 |
|
T95 |
18 |
|
T96 |
53 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T28 |
21 |
|
T95 |
13 |
|
T96 |
20 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1438 |
1 |
|
|
T28 |
26 |
|
T95 |
18 |
|
T96 |
54 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T28 |
18 |
|
T95 |
14 |
|
T96 |
22 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1434 |
1 |
|
|
T28 |
35 |
|
T95 |
18 |
|
T96 |
53 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T28 |
21 |
|
T95 |
13 |
|
T96 |
20 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1414 |
1 |
|
|
T28 |
26 |
|
T95 |
18 |
|
T96 |
53 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T28 |
18 |
|
T95 |
14 |
|
T96 |
22 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1412 |
1 |
|
|
T28 |
35 |
|
T95 |
18 |
|
T96 |
51 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T28 |
21 |
|
T95 |
13 |
|
T96 |
20 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1383 |
1 |
|
|
T28 |
25 |
|
T95 |
18 |
|
T96 |
53 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T28 |
18 |
|
T95 |
14 |
|
T96 |
22 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1374 |
1 |
|
|
T28 |
35 |
|
T95 |
18 |
|
T96 |
49 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T28 |
21 |
|
T95 |
13 |
|
T96 |
20 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1342 |
1 |
|
|
T28 |
25 |
|
T95 |
18 |
|
T96 |
52 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T28 |
18 |
|
T95 |
14 |
|
T96 |
22 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1342 |
1 |
|
|
T28 |
35 |
|
T95 |
18 |
|
T96 |
47 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T28 |
21 |
|
T95 |
13 |
|
T96 |
20 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1308 |
1 |
|
|
T28 |
24 |
|
T95 |
18 |
|
T96 |
50 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T28 |
18 |
|
T95 |
14 |
|
T96 |
22 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1319 |
1 |
|
|
T28 |
35 |
|
T95 |
17 |
|
T96 |
45 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T28 |
21 |
|
T95 |
13 |
|
T96 |
20 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1265 |
1 |
|
|
T28 |
23 |
|
T95 |
18 |
|
T96 |
48 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T28 |
18 |
|
T95 |
14 |
|
T96 |
22 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1294 |
1 |
|
|
T28 |
35 |
|
T95 |
15 |
|
T96 |
44 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T28 |
21 |
|
T95 |
13 |
|
T96 |
20 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1231 |
1 |
|
|
T28 |
22 |
|
T95 |
18 |
|
T96 |
46 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T28 |
18 |
|
T95 |
14 |
|
T96 |
22 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1264 |
1 |
|
|
T28 |
33 |
|
T95 |
14 |
|
T96 |
44 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T28 |
21 |
|
T95 |
13 |
|
T96 |
20 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1202 |
1 |
|
|
T28 |
22 |
|
T95 |
18 |
|
T96 |
45 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T28 |
18 |
|
T95 |
14 |
|
T96 |
22 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1235 |
1 |
|
|
T28 |
33 |
|
T95 |
13 |
|
T96 |
44 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T28 |
21 |
|
T95 |
13 |
|
T96 |
20 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1165 |
1 |
|
|
T28 |
21 |
|
T95 |
18 |
|
T96 |
44 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T28 |
18 |
|
T95 |
14 |
|
T96 |
22 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1208 |
1 |
|
|
T28 |
33 |
|
T95 |
12 |
|
T96 |
42 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57394 |
1 |
|
|
T28 |
1219 |
|
T95 |
1831 |
|
T96 |
1976 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46903 |
1 |
|
|
T28 |
1133 |
|
T95 |
306 |
|
T96 |
1057 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57790 |
1 |
|
|
T28 |
1180 |
|
T95 |
860 |
|
T96 |
1894 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47579 |
1 |
|
|
T28 |
1388 |
|
T95 |
279 |
|
T96 |
1084 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
682 |
1 |
|
|
T28 |
16 |
|
T95 |
17 |
|
T96 |
26 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1709 |
1 |
|
|
T28 |
47 |
|
T95 |
12 |
|
T96 |
47 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
668 |
1 |
|
|
T28 |
16 |
|
T95 |
11 |
|
T96 |
22 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1731 |
1 |
|
|
T28 |
47 |
|
T95 |
18 |
|
T96 |
52 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
682 |
1 |
|
|
T28 |
16 |
|
T95 |
17 |
|
T96 |
26 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1675 |
1 |
|
|
T28 |
47 |
|
T95 |
12 |
|
T96 |
44 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
668 |
1 |
|
|
T28 |
16 |
|
T95 |
11 |
|
T96 |
22 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1694 |
1 |
|
|
T28 |
47 |
|
T95 |
18 |
|
T96 |
51 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T28 |
16 |
|
T95 |
17 |
|
T96 |
26 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1635 |
1 |
|
|
T28 |
46 |
|
T95 |
12 |
|
T96 |
42 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
668 |
1 |
|
|
T28 |
16 |
|
T95 |
11 |
|
T96 |
22 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1659 |
1 |
|
|
T28 |
45 |
|
T95 |
17 |
|
T96 |
51 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T28 |
16 |
|
T95 |
17 |
|
T96 |
26 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1607 |
1 |
|
|
T28 |
43 |
|
T95 |
11 |
|
T96 |
42 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
668 |
1 |
|
|
T28 |
16 |
|
T95 |
11 |
|
T96 |
22 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1626 |
1 |
|
|
T28 |
43 |
|
T95 |
17 |
|
T96 |
51 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
678 |
1 |
|
|
T28 |
16 |
|
T95 |
17 |
|
T96 |
26 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1579 |
1 |
|
|
T28 |
43 |
|
T95 |
11 |
|
T96 |
37 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
665 |
1 |
|
|
T28 |
16 |
|
T95 |
11 |
|
T96 |
22 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1589 |
1 |
|
|
T28 |
41 |
|
T95 |
17 |
|
T96 |
50 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
678 |
1 |
|
|
T28 |
16 |
|
T95 |
17 |
|
T96 |
26 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1550 |
1 |
|
|
T28 |
42 |
|
T95 |
10 |
|
T96 |
36 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
665 |
1 |
|
|
T28 |
16 |
|
T95 |
11 |
|
T96 |
22 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1553 |
1 |
|
|
T28 |
41 |
|
T95 |
17 |
|
T96 |
49 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
675 |
1 |
|
|
T28 |
15 |
|
T95 |
17 |
|
T96 |
26 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1509 |
1 |
|
|
T28 |
40 |
|
T95 |
10 |
|
T96 |
35 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
658 |
1 |
|
|
T28 |
16 |
|
T95 |
11 |
|
T96 |
21 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1524 |
1 |
|
|
T28 |
39 |
|
T95 |
17 |
|
T96 |
49 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
675 |
1 |
|
|
T28 |
15 |
|
T95 |
17 |
|
T96 |
26 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1474 |
1 |
|
|
T28 |
40 |
|
T95 |
10 |
|
T96 |
35 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
658 |
1 |
|
|
T28 |
16 |
|
T95 |
11 |
|
T96 |
21 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1489 |
1 |
|
|
T28 |
38 |
|
T95 |
17 |
|
T96 |
48 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
671 |
1 |
|
|
T28 |
15 |
|
T95 |
17 |
|
T96 |
26 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1447 |
1 |
|
|
T28 |
39 |
|
T95 |
10 |
|
T96 |
35 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
653 |
1 |
|
|
T28 |
16 |
|
T95 |
11 |
|
T96 |
21 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1461 |
1 |
|
|
T28 |
36 |
|
T95 |
17 |
|
T96 |
48 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
671 |
1 |
|
|
T28 |
15 |
|
T95 |
17 |
|
T96 |
26 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1406 |
1 |
|
|
T28 |
38 |
|
T95 |
10 |
|
T96 |
32 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
653 |
1 |
|
|
T28 |
16 |
|
T95 |
11 |
|
T96 |
21 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1421 |
1 |
|
|
T28 |
35 |
|
T95 |
16 |
|
T96 |
48 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
671 |
1 |
|
|
T28 |
15 |
|
T95 |
17 |
|
T96 |
26 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1385 |
1 |
|
|
T28 |
38 |
|
T95 |
10 |
|
T96 |
31 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
650 |
1 |
|
|
T28 |
16 |
|
T95 |
11 |
|
T96 |
21 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1389 |
1 |
|
|
T28 |
33 |
|
T95 |
16 |
|
T96 |
46 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
671 |
1 |
|
|
T28 |
15 |
|
T95 |
17 |
|
T96 |
26 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1361 |
1 |
|
|
T28 |
37 |
|
T95 |
10 |
|
T96 |
30 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
650 |
1 |
|
|
T28 |
16 |
|
T95 |
11 |
|
T96 |
21 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1346 |
1 |
|
|
T28 |
31 |
|
T95 |
16 |
|
T96 |
45 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
671 |
1 |
|
|
T28 |
15 |
|
T95 |
17 |
|
T96 |
26 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1332 |
1 |
|
|
T28 |
37 |
|
T95 |
9 |
|
T96 |
30 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
650 |
1 |
|
|
T28 |
16 |
|
T95 |
11 |
|
T96 |
21 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1312 |
1 |
|
|
T28 |
29 |
|
T95 |
16 |
|
T96 |
44 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
671 |
1 |
|
|
T28 |
15 |
|
T95 |
17 |
|
T96 |
26 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1300 |
1 |
|
|
T28 |
37 |
|
T95 |
9 |
|
T96 |
30 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
650 |
1 |
|
|
T28 |
16 |
|
T95 |
11 |
|
T96 |
21 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1273 |
1 |
|
|
T28 |
28 |
|
T95 |
16 |
|
T96 |
41 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
671 |
1 |
|
|
T28 |
15 |
|
T95 |
17 |
|
T96 |
26 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1260 |
1 |
|
|
T28 |
37 |
|
T95 |
8 |
|
T96 |
30 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
650 |
1 |
|
|
T28 |
16 |
|
T95 |
11 |
|
T96 |
21 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1235 |
1 |
|
|
T28 |
26 |
|
T95 |
13 |
|
T96 |
41 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[0] |
auto[0] |
53823 |
1 |
|
|
T28 |
1182 |
|
T95 |
843 |
|
T96 |
2323 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[0] |
auto[1] |
43427 |
1 |
|
|
T28 |
1662 |
|
T95 |
1220 |
|
T96 |
1038 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[1] |
auto[0] |
62372 |
1 |
|
|
T28 |
1128 |
|
T95 |
673 |
|
T96 |
1532 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[1] |
auto[1] |
50591 |
1 |
|
|
T28 |
967 |
|
T95 |
470 |
|
T96 |
960 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T28 |
18 |
|
T95 |
17 |
|
T96 |
19 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1642 |
1 |
|
|
T28 |
44 |
|
T95 |
16 |
|
T96 |
59 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T28 |
20 |
|
T95 |
11 |
|
T96 |
23 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1635 |
1 |
|
|
T28 |
41 |
|
T95 |
22 |
|
T96 |
55 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T28 |
18 |
|
T95 |
17 |
|
T96 |
19 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1610 |
1 |
|
|
T28 |
43 |
|
T95 |
15 |
|
T96 |
58 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T28 |
20 |
|
T95 |
11 |
|
T96 |
23 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1605 |
1 |
|
|
T28 |
39 |
|
T95 |
22 |
|
T96 |
55 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T28 |
18 |
|
T95 |
17 |
|
T96 |
19 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1582 |
1 |
|
|
T28 |
42 |
|
T95 |
15 |
|
T96 |
55 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T28 |
20 |
|
T95 |
11 |
|
T96 |
23 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1571 |
1 |
|
|
T28 |
38 |
|
T95 |
22 |
|
T96 |
54 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T28 |
18 |
|
T95 |
17 |
|
T96 |
19 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1553 |
1 |
|
|
T28 |
41 |
|
T95 |
15 |
|
T96 |
55 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T28 |
20 |
|
T95 |
11 |
|
T96 |
23 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1536 |
1 |
|
|
T28 |
37 |
|
T95 |
21 |
|
T96 |
53 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T28 |
18 |
|
T95 |
17 |
|
T96 |
19 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1516 |
1 |
|
|
T28 |
40 |
|
T95 |
15 |
|
T96 |
55 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T28 |
20 |
|
T95 |
11 |
|
T96 |
23 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1506 |
1 |
|
|
T28 |
37 |
|
T95 |
19 |
|
T96 |
52 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T28 |
18 |
|
T95 |
17 |
|
T96 |
19 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1483 |
1 |
|
|
T28 |
39 |
|
T95 |
14 |
|
T96 |
54 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T28 |
20 |
|
T95 |
11 |
|
T96 |
23 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1473 |
1 |
|
|
T28 |
37 |
|
T95 |
18 |
|
T96 |
51 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T28 |
17 |
|
T95 |
17 |
|
T96 |
19 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1447 |
1 |
|
|
T28 |
35 |
|
T95 |
14 |
|
T96 |
52 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T28 |
20 |
|
T95 |
10 |
|
T96 |
23 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1436 |
1 |
|
|
T28 |
36 |
|
T95 |
18 |
|
T96 |
50 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T28 |
17 |
|
T95 |
17 |
|
T96 |
19 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1415 |
1 |
|
|
T28 |
34 |
|
T95 |
14 |
|
T96 |
51 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T28 |
20 |
|
T95 |
10 |
|
T96 |
23 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1406 |
1 |
|
|
T28 |
35 |
|
T95 |
18 |
|
T96 |
47 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T28 |
17 |
|
T95 |
17 |
|
T96 |
19 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1388 |
1 |
|
|
T28 |
34 |
|
T95 |
13 |
|
T96 |
51 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T28 |
20 |
|
T95 |
10 |
|
T96 |
23 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1381 |
1 |
|
|
T28 |
34 |
|
T95 |
18 |
|
T96 |
46 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T28 |
17 |
|
T95 |
17 |
|
T96 |
19 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1351 |
1 |
|
|
T28 |
33 |
|
T95 |
13 |
|
T96 |
51 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T28 |
20 |
|
T95 |
10 |
|
T96 |
23 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1346 |
1 |
|
|
T28 |
32 |
|
T95 |
18 |
|
T96 |
43 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T28 |
17 |
|
T95 |
17 |
|
T96 |
19 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1313 |
1 |
|
|
T28 |
32 |
|
T95 |
13 |
|
T96 |
51 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T28 |
20 |
|
T95 |
10 |
|
T96 |
23 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1317 |
1 |
|
|
T28 |
32 |
|
T95 |
17 |
|
T96 |
43 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T28 |
17 |
|
T95 |
17 |
|
T96 |
19 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1287 |
1 |
|
|
T28 |
31 |
|
T95 |
12 |
|
T96 |
50 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T28 |
20 |
|
T95 |
10 |
|
T96 |
23 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1283 |
1 |
|
|
T28 |
31 |
|
T95 |
16 |
|
T96 |
42 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T28 |
17 |
|
T95 |
17 |
|
T96 |
19 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1259 |
1 |
|
|
T28 |
31 |
|
T95 |
12 |
|
T96 |
48 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T28 |
20 |
|
T95 |
10 |
|
T96 |
23 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1242 |
1 |
|
|
T28 |
31 |
|
T95 |
16 |
|
T96 |
40 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T28 |
17 |
|
T95 |
17 |
|
T96 |
19 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1221 |
1 |
|
|
T28 |
31 |
|
T95 |
12 |
|
T96 |
48 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T28 |
20 |
|
T95 |
10 |
|
T96 |
23 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1213 |
1 |
|
|
T28 |
30 |
|
T95 |
16 |
|
T96 |
37 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T28 |
17 |
|
T95 |
17 |
|
T96 |
19 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1201 |
1 |
|
|
T28 |
31 |
|
T95 |
12 |
|
T96 |
47 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T28 |
20 |
|
T95 |
10 |
|
T96 |
23 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1184 |
1 |
|
|
T28 |
30 |
|
T95 |
15 |
|
T96 |
36 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[0] |
auto[0] |
53060 |
1 |
|
|
T28 |
1546 |
|
T95 |
664 |
|
T96 |
1200 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48597 |
1 |
|
|
T28 |
501 |
|
T95 |
488 |
|
T96 |
1175 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59412 |
1 |
|
|
T28 |
2398 |
|
T95 |
732 |
|
T96 |
2057 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[1] |
auto[1] |
49130 |
1 |
|
|
T28 |
653 |
|
T95 |
1292 |
|
T96 |
1429 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T28 |
27 |
|
T95 |
15 |
|
T96 |
21 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1642 |
1 |
|
|
T28 |
26 |
|
T95 |
18 |
|
T96 |
57 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T28 |
25 |
|
T95 |
12 |
|
T96 |
18 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1662 |
1 |
|
|
T28 |
28 |
|
T95 |
22 |
|
T96 |
61 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T28 |
27 |
|
T95 |
15 |
|
T96 |
21 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1605 |
1 |
|
|
T28 |
26 |
|
T95 |
18 |
|
T96 |
53 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T28 |
25 |
|
T95 |
12 |
|
T96 |
18 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1636 |
1 |
|
|
T28 |
28 |
|
T95 |
21 |
|
T96 |
60 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T28 |
27 |
|
T95 |
15 |
|
T96 |
21 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1579 |
1 |
|
|
T28 |
26 |
|
T95 |
18 |
|
T96 |
52 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T28 |
25 |
|
T95 |
12 |
|
T96 |
18 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1600 |
1 |
|
|
T28 |
26 |
|
T95 |
20 |
|
T96 |
59 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T28 |
27 |
|
T95 |
15 |
|
T96 |
21 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1545 |
1 |
|
|
T28 |
26 |
|
T95 |
17 |
|
T96 |
51 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T28 |
25 |
|
T95 |
12 |
|
T96 |
18 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1567 |
1 |
|
|
T28 |
26 |
|
T95 |
20 |
|
T96 |
59 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T28 |
27 |
|
T95 |
15 |
|
T96 |
21 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1514 |
1 |
|
|
T28 |
25 |
|
T95 |
17 |
|
T96 |
50 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T28 |
25 |
|
T95 |
12 |
|
T96 |
18 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1537 |
1 |
|
|
T28 |
26 |
|
T95 |
20 |
|
T96 |
57 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T28 |
27 |
|
T95 |
15 |
|
T96 |
21 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1482 |
1 |
|
|
T28 |
24 |
|
T95 |
16 |
|
T96 |
49 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T28 |
25 |
|
T95 |
12 |
|
T96 |
18 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1516 |
1 |
|
|
T28 |
26 |
|
T95 |
19 |
|
T96 |
57 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T28 |
26 |
|
T95 |
15 |
|
T96 |
21 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1452 |
1 |
|
|
T28 |
23 |
|
T95 |
16 |
|
T96 |
49 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
693 |
1 |
|
|
T28 |
25 |
|
T95 |
11 |
|
T96 |
18 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1488 |
1 |
|
|
T28 |
26 |
|
T95 |
19 |
|
T96 |
56 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T28 |
26 |
|
T95 |
15 |
|
T96 |
21 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1421 |
1 |
|
|
T28 |
23 |
|
T95 |
16 |
|
T96 |
47 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
693 |
1 |
|
|
T28 |
25 |
|
T95 |
11 |
|
T96 |
18 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1453 |
1 |
|
|
T28 |
25 |
|
T95 |
19 |
|
T96 |
54 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T28 |
26 |
|
T95 |
15 |
|
T96 |
21 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1395 |
1 |
|
|
T28 |
21 |
|
T95 |
16 |
|
T96 |
46 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
689 |
1 |
|
|
T28 |
25 |
|
T95 |
11 |
|
T96 |
18 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1421 |
1 |
|
|
T28 |
23 |
|
T95 |
19 |
|
T96 |
54 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T28 |
26 |
|
T95 |
15 |
|
T96 |
21 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1365 |
1 |
|
|
T28 |
21 |
|
T95 |
15 |
|
T96 |
44 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
689 |
1 |
|
|
T28 |
25 |
|
T95 |
11 |
|
T96 |
18 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1380 |
1 |
|
|
T28 |
22 |
|
T95 |
19 |
|
T96 |
52 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T28 |
26 |
|
T95 |
15 |
|
T96 |
21 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1333 |
1 |
|
|
T28 |
20 |
|
T95 |
15 |
|
T96 |
43 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T28 |
25 |
|
T95 |
11 |
|
T96 |
18 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1340 |
1 |
|
|
T28 |
22 |
|
T95 |
19 |
|
T96 |
52 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T28 |
26 |
|
T95 |
15 |
|
T96 |
21 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1299 |
1 |
|
|
T28 |
18 |
|
T95 |
15 |
|
T96 |
43 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T28 |
25 |
|
T95 |
11 |
|
T96 |
18 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1314 |
1 |
|
|
T28 |
22 |
|
T95 |
18 |
|
T96 |
52 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T28 |
26 |
|
T95 |
15 |
|
T96 |
21 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1263 |
1 |
|
|
T28 |
17 |
|
T95 |
15 |
|
T96 |
42 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
685 |
1 |
|
|
T28 |
25 |
|
T95 |
11 |
|
T96 |
18 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1275 |
1 |
|
|
T28 |
22 |
|
T95 |
17 |
|
T96 |
50 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T28 |
26 |
|
T95 |
15 |
|
T96 |
21 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1221 |
1 |
|
|
T28 |
16 |
|
T95 |
14 |
|
T96 |
42 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
685 |
1 |
|
|
T28 |
25 |
|
T95 |
11 |
|
T96 |
18 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1232 |
1 |
|
|
T28 |
22 |
|
T95 |
17 |
|
T96 |
48 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T28 |
26 |
|
T95 |
15 |
|
T96 |
21 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1193 |
1 |
|
|
T28 |
14 |
|
T95 |
14 |
|
T96 |
40 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
685 |
1 |
|
|
T28 |
25 |
|
T95 |
11 |
|
T96 |
18 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1206 |
1 |
|
|
T28 |
22 |
|
T95 |
17 |
|
T96 |
47 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57363 |
1 |
|
|
T28 |
1264 |
|
T95 |
608 |
|
T96 |
1758 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46797 |
1 |
|
|
T28 |
717 |
|
T95 |
701 |
|
T96 |
737 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[1] |
auto[0] |
61753 |
1 |
|
|
T28 |
1902 |
|
T95 |
1242 |
|
T96 |
1894 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[1] |
auto[1] |
43659 |
1 |
|
|
T28 |
1043 |
|
T95 |
515 |
|
T96 |
1600 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T28 |
21 |
|
T95 |
10 |
|
T96 |
32 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1632 |
1 |
|
|
T28 |
39 |
|
T95 |
26 |
|
T96 |
38 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T28 |
17 |
|
T95 |
11 |
|
T96 |
27 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1632 |
1 |
|
|
T28 |
43 |
|
T95 |
26 |
|
T96 |
44 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T28 |
21 |
|
T95 |
10 |
|
T96 |
32 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1595 |
1 |
|
|
T28 |
38 |
|
T95 |
26 |
|
T96 |
37 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T28 |
17 |
|
T95 |
11 |
|
T96 |
27 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1607 |
1 |
|
|
T28 |
43 |
|
T95 |
26 |
|
T96 |
44 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T28 |
21 |
|
T95 |
10 |
|
T96 |
32 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1561 |
1 |
|
|
T28 |
38 |
|
T95 |
25 |
|
T96 |
36 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T28 |
17 |
|
T95 |
11 |
|
T96 |
27 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1575 |
1 |
|
|
T28 |
42 |
|
T95 |
26 |
|
T96 |
44 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T28 |
21 |
|
T95 |
10 |
|
T96 |
32 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1536 |
1 |
|
|
T28 |
35 |
|
T95 |
25 |
|
T96 |
35 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T28 |
17 |
|
T95 |
11 |
|
T96 |
27 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1552 |
1 |
|
|
T28 |
42 |
|
T95 |
25 |
|
T96 |
43 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T28 |
21 |
|
T95 |
10 |
|
T96 |
32 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1516 |
1 |
|
|
T28 |
32 |
|
T95 |
25 |
|
T96 |
35 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T28 |
17 |
|
T95 |
11 |
|
T96 |
27 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1530 |
1 |
|
|
T28 |
42 |
|
T95 |
25 |
|
T96 |
43 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T28 |
21 |
|
T95 |
10 |
|
T96 |
32 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1478 |
1 |
|
|
T28 |
31 |
|
T95 |
25 |
|
T96 |
34 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T28 |
17 |
|
T95 |
11 |
|
T96 |
27 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1491 |
1 |
|
|
T28 |
42 |
|
T95 |
25 |
|
T96 |
43 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T28 |
21 |
|
T95 |
10 |
|
T96 |
32 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1451 |
1 |
|
|
T28 |
31 |
|
T95 |
25 |
|
T96 |
33 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T28 |
17 |
|
T95 |
11 |
|
T96 |
27 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1458 |
1 |
|
|
T28 |
42 |
|
T95 |
24 |
|
T96 |
43 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T28 |
21 |
|
T95 |
10 |
|
T96 |
32 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1424 |
1 |
|
|
T28 |
30 |
|
T95 |
25 |
|
T96 |
33 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T28 |
17 |
|
T95 |
11 |
|
T96 |
27 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1423 |
1 |
|
|
T28 |
42 |
|
T95 |
23 |
|
T96 |
43 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T28 |
21 |
|
T95 |
10 |
|
T96 |
32 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1394 |
1 |
|
|
T28 |
29 |
|
T95 |
25 |
|
T96 |
31 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T28 |
17 |
|
T95 |
11 |
|
T96 |
27 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1392 |
1 |
|
|
T28 |
41 |
|
T95 |
22 |
|
T96 |
43 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T28 |
21 |
|
T95 |
10 |
|
T96 |
32 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1359 |
1 |
|
|
T28 |
28 |
|
T95 |
25 |
|
T96 |
30 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T28 |
17 |
|
T95 |
11 |
|
T96 |
27 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1357 |
1 |
|
|
T28 |
41 |
|
T95 |
22 |
|
T96 |
41 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T28 |
21 |
|
T95 |
10 |
|
T96 |
32 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1332 |
1 |
|
|
T28 |
24 |
|
T95 |
25 |
|
T96 |
29 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T28 |
17 |
|
T95 |
11 |
|
T96 |
27 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1325 |
1 |
|
|
T28 |
41 |
|
T95 |
22 |
|
T96 |
40 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T28 |
21 |
|
T95 |
10 |
|
T96 |
32 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1293 |
1 |
|
|
T28 |
23 |
|
T95 |
24 |
|
T96 |
28 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T28 |
17 |
|
T95 |
11 |
|
T96 |
27 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1292 |
1 |
|
|
T28 |
41 |
|
T95 |
22 |
|
T96 |
39 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T28 |
21 |
|
T95 |
10 |
|
T96 |
32 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1258 |
1 |
|
|
T28 |
23 |
|
T95 |
24 |
|
T96 |
27 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T28 |
17 |
|
T95 |
11 |
|
T96 |
27 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1261 |
1 |
|
|
T28 |
40 |
|
T95 |
21 |
|
T96 |
37 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T28 |
21 |
|
T95 |
10 |
|
T96 |
32 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1225 |
1 |
|
|
T28 |
23 |
|
T95 |
23 |
|
T96 |
26 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T28 |
17 |
|
T95 |
11 |
|
T96 |
27 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1231 |
1 |
|
|
T28 |
40 |
|
T95 |
19 |
|
T96 |
37 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T28 |
21 |
|
T95 |
10 |
|
T96 |
32 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1180 |
1 |
|
|
T28 |
21 |
|
T95 |
22 |
|
T96 |
26 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T28 |
17 |
|
T95 |
11 |
|
T96 |
27 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1201 |
1 |
|
|
T28 |
38 |
|
T95 |
19 |
|
T96 |
36 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[0] |
auto[0] |
59142 |
1 |
|
|
T28 |
1423 |
|
T95 |
658 |
|
T96 |
1235 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44710 |
1 |
|
|
T28 |
875 |
|
T95 |
614 |
|
T96 |
1310 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[1] |
auto[0] |
60734 |
1 |
|
|
T28 |
1500 |
|
T95 |
1644 |
|
T96 |
1967 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45110 |
1 |
|
|
T28 |
995 |
|
T95 |
273 |
|
T96 |
1357 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T28 |
21 |
|
T95 |
12 |
|
T96 |
20 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1650 |
1 |
|
|
T28 |
44 |
|
T95 |
21 |
|
T96 |
57 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T28 |
19 |
|
T95 |
14 |
|
T96 |
17 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1654 |
1 |
|
|
T28 |
46 |
|
T95 |
20 |
|
T96 |
61 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T28 |
21 |
|
T95 |
12 |
|
T96 |
20 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1622 |
1 |
|
|
T28 |
43 |
|
T95 |
21 |
|
T96 |
57 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T28 |
19 |
|
T95 |
14 |
|
T96 |
17 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1621 |
1 |
|
|
T28 |
45 |
|
T95 |
20 |
|
T96 |
59 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T28 |
21 |
|
T95 |
12 |
|
T96 |
20 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1602 |
1 |
|
|
T28 |
43 |
|
T95 |
20 |
|
T96 |
56 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T28 |
19 |
|
T95 |
14 |
|
T96 |
17 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1592 |
1 |
|
|
T28 |
43 |
|
T95 |
19 |
|
T96 |
56 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T28 |
21 |
|
T95 |
12 |
|
T96 |
20 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1576 |
1 |
|
|
T28 |
43 |
|
T95 |
20 |
|
T96 |
56 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T28 |
19 |
|
T95 |
14 |
|
T96 |
17 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1554 |
1 |
|
|
T28 |
43 |
|
T95 |
18 |
|
T96 |
55 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T28 |
21 |
|
T95 |
12 |
|
T96 |
20 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1540 |
1 |
|
|
T28 |
42 |
|
T95 |
19 |
|
T96 |
56 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T28 |
19 |
|
T95 |
14 |
|
T96 |
17 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1529 |
1 |
|
|
T28 |
43 |
|
T95 |
18 |
|
T96 |
53 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T28 |
21 |
|
T95 |
12 |
|
T96 |
20 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1516 |
1 |
|
|
T28 |
42 |
|
T95 |
19 |
|
T96 |
56 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T28 |
19 |
|
T95 |
14 |
|
T96 |
17 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1499 |
1 |
|
|
T28 |
43 |
|
T95 |
18 |
|
T96 |
53 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T28 |
21 |
|
T95 |
12 |
|
T96 |
20 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1487 |
1 |
|
|
T28 |
39 |
|
T95 |
19 |
|
T96 |
55 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T28 |
19 |
|
T95 |
14 |
|
T96 |
17 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1469 |
1 |
|
|
T28 |
42 |
|
T95 |
17 |
|
T96 |
53 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T28 |
21 |
|
T95 |
12 |
|
T96 |
20 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1442 |
1 |
|
|
T28 |
37 |
|
T95 |
19 |
|
T96 |
52 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T28 |
19 |
|
T95 |
14 |
|
T96 |
17 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1433 |
1 |
|
|
T28 |
42 |
|
T95 |
17 |
|
T96 |
52 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T28 |
21 |
|
T95 |
12 |
|
T96 |
20 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1408 |
1 |
|
|
T28 |
36 |
|
T95 |
17 |
|
T96 |
50 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T28 |
19 |
|
T95 |
14 |
|
T96 |
17 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1410 |
1 |
|
|
T28 |
41 |
|
T95 |
16 |
|
T96 |
50 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T28 |
21 |
|
T95 |
12 |
|
T96 |
20 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1382 |
1 |
|
|
T28 |
36 |
|
T95 |
17 |
|
T96 |
49 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T28 |
19 |
|
T95 |
14 |
|
T96 |
17 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1364 |
1 |
|
|
T28 |
39 |
|
T95 |
14 |
|
T96 |
49 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T28 |
21 |
|
T95 |
12 |
|
T96 |
20 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1353 |
1 |
|
|
T28 |
34 |
|
T95 |
17 |
|
T96 |
49 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T28 |
19 |
|
T95 |
14 |
|
T96 |
17 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1339 |
1 |
|
|
T28 |
38 |
|
T95 |
14 |
|
T96 |
48 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T28 |
21 |
|
T95 |
12 |
|
T96 |
20 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1326 |
1 |
|
|
T28 |
33 |
|
T95 |
17 |
|
T96 |
47 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T28 |
19 |
|
T95 |
14 |
|
T96 |
17 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1310 |
1 |
|
|
T28 |
35 |
|
T95 |
13 |
|
T96 |
46 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T28 |
21 |
|
T95 |
12 |
|
T96 |
20 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1294 |
1 |
|
|
T28 |
32 |
|
T95 |
17 |
|
T96 |
46 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T28 |
19 |
|
T95 |
14 |
|
T96 |
17 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1276 |
1 |
|
|
T28 |
35 |
|
T95 |
13 |
|
T96 |
46 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T28 |
21 |
|
T95 |
12 |
|
T96 |
20 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1250 |
1 |
|
|
T28 |
32 |
|
T95 |
17 |
|
T96 |
46 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T28 |
19 |
|
T95 |
14 |
|
T96 |
17 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1242 |
1 |
|
|
T28 |
33 |
|
T95 |
13 |
|
T96 |
46 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T28 |
21 |
|
T95 |
12 |
|
T96 |
20 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1203 |
1 |
|
|
T28 |
31 |
|
T95 |
17 |
|
T96 |
45 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T28 |
19 |
|
T95 |
14 |
|
T96 |
17 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1211 |
1 |
|
|
T28 |
33 |
|
T95 |
12 |
|
T96 |
44 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[0] |
auto[0] |
54876 |
1 |
|
|
T28 |
1042 |
|
T95 |
832 |
|
T96 |
1616 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45507 |
1 |
|
|
T28 |
1014 |
|
T95 |
1200 |
|
T96 |
1124 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[1] |
auto[0] |
60951 |
1 |
|
|
T28 |
1430 |
|
T95 |
795 |
|
T96 |
1251 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48845 |
1 |
|
|
T28 |
1424 |
|
T95 |
334 |
|
T96 |
1833 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T28 |
18 |
|
T95 |
15 |
|
T96 |
28 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1610 |
1 |
|
|
T28 |
41 |
|
T95 |
19 |
|
T96 |
49 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T28 |
23 |
|
T95 |
16 |
|
T96 |
22 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1630 |
1 |
|
|
T28 |
36 |
|
T95 |
18 |
|
T96 |
56 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T28 |
18 |
|
T95 |
15 |
|
T96 |
28 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1574 |
1 |
|
|
T28 |
40 |
|
T95 |
19 |
|
T96 |
48 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T28 |
23 |
|
T95 |
16 |
|
T96 |
22 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1600 |
1 |
|
|
T28 |
36 |
|
T95 |
18 |
|
T96 |
56 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T28 |
18 |
|
T95 |
15 |
|
T96 |
28 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1540 |
1 |
|
|
T28 |
39 |
|
T95 |
19 |
|
T96 |
48 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T28 |
23 |
|
T95 |
16 |
|
T96 |
22 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1572 |
1 |
|
|
T28 |
36 |
|
T95 |
16 |
|
T96 |
56 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T28 |
18 |
|
T95 |
15 |
|
T96 |
28 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1510 |
1 |
|
|
T28 |
39 |
|
T95 |
19 |
|
T96 |
46 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T28 |
23 |
|
T95 |
16 |
|
T96 |
22 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1549 |
1 |
|
|
T28 |
36 |
|
T95 |
16 |
|
T96 |
55 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T28 |
18 |
|
T95 |
15 |
|
T96 |
28 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1487 |
1 |
|
|
T28 |
39 |
|
T95 |
19 |
|
T96 |
46 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T28 |
23 |
|
T95 |
16 |
|
T96 |
22 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1519 |
1 |
|
|
T28 |
36 |
|
T95 |
16 |
|
T96 |
54 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T28 |
18 |
|
T95 |
15 |
|
T96 |
28 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1443 |
1 |
|
|
T28 |
37 |
|
T95 |
19 |
|
T96 |
45 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T28 |
23 |
|
T95 |
16 |
|
T96 |
22 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1497 |
1 |
|
|
T28 |
36 |
|
T95 |
16 |
|
T96 |
53 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T28 |
18 |
|
T95 |
15 |
|
T96 |
28 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1414 |
1 |
|
|
T28 |
36 |
|
T95 |
18 |
|
T96 |
44 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T28 |
23 |
|
T95 |
15 |
|
T96 |
22 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1464 |
1 |
|
|
T28 |
36 |
|
T95 |
16 |
|
T96 |
51 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T28 |
18 |
|
T95 |
15 |
|
T96 |
28 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1383 |
1 |
|
|
T28 |
35 |
|
T95 |
18 |
|
T96 |
44 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T28 |
23 |
|
T95 |
15 |
|
T96 |
22 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1437 |
1 |
|
|
T28 |
35 |
|
T95 |
14 |
|
T96 |
51 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T28 |
18 |
|
T95 |
15 |
|
T96 |
28 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1350 |
1 |
|
|
T28 |
35 |
|
T95 |
17 |
|
T96 |
42 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T28 |
23 |
|
T95 |
15 |
|
T96 |
22 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1404 |
1 |
|
|
T28 |
34 |
|
T95 |
14 |
|
T96 |
47 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T28 |
18 |
|
T95 |
15 |
|
T96 |
28 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1323 |
1 |
|
|
T28 |
34 |
|
T95 |
16 |
|
T96 |
42 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T28 |
23 |
|
T95 |
15 |
|
T96 |
22 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1384 |
1 |
|
|
T28 |
34 |
|
T95 |
14 |
|
T96 |
47 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T28 |
18 |
|
T95 |
15 |
|
T96 |
28 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1291 |
1 |
|
|
T28 |
33 |
|
T95 |
16 |
|
T96 |
42 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T28 |
23 |
|
T95 |
15 |
|
T96 |
22 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1349 |
1 |
|
|
T28 |
32 |
|
T95 |
14 |
|
T96 |
46 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T28 |
18 |
|
T95 |
15 |
|
T96 |
28 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1251 |
1 |
|
|
T28 |
32 |
|
T95 |
15 |
|
T96 |
40 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T28 |
23 |
|
T95 |
15 |
|
T96 |
22 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1318 |
1 |
|
|
T28 |
30 |
|
T95 |
14 |
|
T96 |
45 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T28 |
18 |
|
T95 |
15 |
|
T96 |
28 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1210 |
1 |
|
|
T28 |
31 |
|
T95 |
14 |
|
T96 |
39 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T28 |
23 |
|
T95 |
15 |
|
T96 |
22 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1281 |
1 |
|
|
T28 |
30 |
|
T95 |
14 |
|
T96 |
44 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T28 |
18 |
|
T95 |
15 |
|
T96 |
28 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1178 |
1 |
|
|
T28 |
30 |
|
T95 |
14 |
|
T96 |
38 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T28 |
23 |
|
T95 |
15 |
|
T96 |
22 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1255 |
1 |
|
|
T28 |
30 |
|
T95 |
13 |
|
T96 |
44 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T28 |
18 |
|
T95 |
15 |
|
T96 |
28 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1138 |
1 |
|
|
T28 |
29 |
|
T95 |
13 |
|
T96 |
36 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T28 |
23 |
|
T95 |
15 |
|
T96 |
22 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1228 |
1 |
|
|
T28 |
29 |
|
T95 |
13 |
|
T96 |
44 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[0] |
auto[0] |
63229 |
1 |
|
|
T28 |
817 |
|
T95 |
676 |
|
T96 |
1944 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[0] |
auto[1] |
43196 |
1 |
|
|
T28 |
1642 |
|
T95 |
443 |
|
T96 |
1203 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56593 |
1 |
|
|
T28 |
1234 |
|
T95 |
689 |
|
T96 |
1977 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48193 |
1 |
|
|
T28 |
1187 |
|
T95 |
1324 |
|
T96 |
1021 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T28 |
16 |
|
T95 |
12 |
|
T96 |
15 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1596 |
1 |
|
|
T28 |
46 |
|
T95 |
22 |
|
T96 |
54 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
764 |
1 |
|
|
T28 |
17 |
|
T95 |
17 |
|
T96 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1559 |
1 |
|
|
T28 |
44 |
|
T95 |
18 |
|
T96 |
52 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T28 |
16 |
|
T95 |
12 |
|
T96 |
15 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1570 |
1 |
|
|
T28 |
45 |
|
T95 |
22 |
|
T96 |
54 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
764 |
1 |
|
|
T28 |
17 |
|
T95 |
17 |
|
T96 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1519 |
1 |
|
|
T28 |
44 |
|
T95 |
18 |
|
T96 |
51 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T28 |
16 |
|
T95 |
12 |
|
T96 |
15 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1534 |
1 |
|
|
T28 |
45 |
|
T95 |
21 |
|
T96 |
53 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T28 |
17 |
|
T95 |
17 |
|
T96 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1491 |
1 |
|
|
T28 |
43 |
|
T95 |
17 |
|
T96 |
51 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T28 |
16 |
|
T95 |
12 |
|
T96 |
15 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1497 |
1 |
|
|
T28 |
43 |
|
T95 |
20 |
|
T96 |
51 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T28 |
17 |
|
T95 |
17 |
|
T96 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1471 |
1 |
|
|
T28 |
40 |
|
T95 |
17 |
|
T96 |
50 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T28 |
16 |
|
T95 |
12 |
|
T96 |
15 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1471 |
1 |
|
|
T28 |
43 |
|
T95 |
20 |
|
T96 |
51 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T28 |
17 |
|
T95 |
17 |
|
T96 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1438 |
1 |
|
|
T28 |
40 |
|
T95 |
17 |
|
T96 |
45 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T28 |
16 |
|
T95 |
12 |
|
T96 |
15 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1438 |
1 |
|
|
T28 |
42 |
|
T95 |
19 |
|
T96 |
50 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T28 |
17 |
|
T95 |
17 |
|
T96 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1419 |
1 |
|
|
T28 |
40 |
|
T95 |
17 |
|
T96 |
44 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T28 |
15 |
|
T95 |
12 |
|
T96 |
15 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1410 |
1 |
|
|
T28 |
41 |
|
T95 |
19 |
|
T96 |
48 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T28 |
17 |
|
T95 |
17 |
|
T96 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1394 |
1 |
|
|
T28 |
40 |
|
T95 |
17 |
|
T96 |
43 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T28 |
15 |
|
T95 |
12 |
|
T96 |
15 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1370 |
1 |
|
|
T28 |
40 |
|
T95 |
18 |
|
T96 |
47 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T28 |
17 |
|
T95 |
17 |
|
T96 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1369 |
1 |
|
|
T28 |
40 |
|
T95 |
17 |
|
T96 |
42 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T28 |
15 |
|
T95 |
12 |
|
T96 |
15 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1340 |
1 |
|
|
T28 |
39 |
|
T95 |
18 |
|
T96 |
44 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T28 |
17 |
|
T95 |
17 |
|
T96 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1337 |
1 |
|
|
T28 |
40 |
|
T95 |
17 |
|
T96 |
41 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T28 |
15 |
|
T95 |
12 |
|
T96 |
15 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1318 |
1 |
|
|
T28 |
39 |
|
T95 |
18 |
|
T96 |
44 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T28 |
17 |
|
T95 |
17 |
|
T96 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1298 |
1 |
|
|
T28 |
40 |
|
T95 |
17 |
|
T96 |
39 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T28 |
15 |
|
T95 |
12 |
|
T96 |
15 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1288 |
1 |
|
|
T28 |
38 |
|
T95 |
18 |
|
T96 |
42 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T28 |
17 |
|
T95 |
17 |
|
T96 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1272 |
1 |
|
|
T28 |
38 |
|
T95 |
16 |
|
T96 |
38 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T28 |
15 |
|
T95 |
12 |
|
T96 |
15 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1249 |
1 |
|
|
T28 |
38 |
|
T95 |
17 |
|
T96 |
40 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T28 |
17 |
|
T95 |
17 |
|
T96 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1241 |
1 |
|
|
T28 |
36 |
|
T95 |
16 |
|
T96 |
37 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T28 |
15 |
|
T95 |
12 |
|
T96 |
15 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1222 |
1 |
|
|
T28 |
36 |
|
T95 |
17 |
|
T96 |
39 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T28 |
17 |
|
T95 |
17 |
|
T96 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1203 |
1 |
|
|
T28 |
36 |
|
T95 |
15 |
|
T96 |
36 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T28 |
15 |
|
T95 |
12 |
|
T96 |
15 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1191 |
1 |
|
|
T28 |
35 |
|
T95 |
17 |
|
T96 |
38 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T28 |
17 |
|
T95 |
17 |
|
T96 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1174 |
1 |
|
|
T28 |
35 |
|
T95 |
15 |
|
T96 |
35 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T28 |
15 |
|
T95 |
12 |
|
T96 |
15 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1162 |
1 |
|
|
T28 |
35 |
|
T95 |
17 |
|
T96 |
38 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T28 |
17 |
|
T95 |
17 |
|
T96 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1142 |
1 |
|
|
T28 |
34 |
|
T95 |
14 |
|
T96 |
35 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[0] |
auto[0] |
61573 |
1 |
|
|
T28 |
1118 |
|
T95 |
785 |
|
T96 |
1421 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47816 |
1 |
|
|
T28 |
1313 |
|
T95 |
1466 |
|
T96 |
1452 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56172 |
1 |
|
|
T28 |
1518 |
|
T95 |
558 |
|
T96 |
2107 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[1] |
auto[1] |
43604 |
1 |
|
|
T28 |
813 |
|
T95 |
372 |
|
T96 |
838 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T28 |
15 |
|
T95 |
10 |
|
T96 |
28 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1674 |
1 |
|
|
T28 |
53 |
|
T95 |
24 |
|
T96 |
49 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T28 |
16 |
|
T95 |
10 |
|
T96 |
32 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1673 |
1 |
|
|
T28 |
52 |
|
T95 |
24 |
|
T96 |
45 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T28 |
15 |
|
T95 |
10 |
|
T96 |
28 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1645 |
1 |
|
|
T28 |
53 |
|
T95 |
24 |
|
T96 |
48 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T28 |
16 |
|
T95 |
10 |
|
T96 |
32 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1649 |
1 |
|
|
T28 |
52 |
|
T95 |
23 |
|
T96 |
45 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T28 |
15 |
|
T95 |
10 |
|
T96 |
28 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1613 |
1 |
|
|
T28 |
53 |
|
T95 |
23 |
|
T96 |
48 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T28 |
16 |
|
T95 |
10 |
|
T96 |
32 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1609 |
1 |
|
|
T28 |
49 |
|
T95 |
23 |
|
T96 |
45 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T28 |
15 |
|
T95 |
10 |
|
T96 |
28 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1579 |
1 |
|
|
T28 |
52 |
|
T95 |
23 |
|
T96 |
46 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T28 |
16 |
|
T95 |
10 |
|
T96 |
32 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1578 |
1 |
|
|
T28 |
47 |
|
T95 |
22 |
|
T96 |
45 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T28 |
15 |
|
T95 |
10 |
|
T96 |
28 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1549 |
1 |
|
|
T28 |
52 |
|
T95 |
23 |
|
T96 |
46 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T28 |
16 |
|
T95 |
10 |
|
T96 |
32 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1543 |
1 |
|
|
T28 |
44 |
|
T95 |
22 |
|
T96 |
44 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T28 |
15 |
|
T95 |
10 |
|
T96 |
28 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1524 |
1 |
|
|
T28 |
51 |
|
T95 |
22 |
|
T96 |
44 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T28 |
16 |
|
T95 |
10 |
|
T96 |
32 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1509 |
1 |
|
|
T28 |
43 |
|
T95 |
22 |
|
T96 |
44 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T28 |
14 |
|
T95 |
10 |
|
T96 |
28 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1488 |
1 |
|
|
T28 |
51 |
|
T95 |
22 |
|
T96 |
43 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T28 |
16 |
|
T95 |
9 |
|
T96 |
31 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1476 |
1 |
|
|
T28 |
41 |
|
T95 |
21 |
|
T96 |
44 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T28 |
14 |
|
T95 |
10 |
|
T96 |
28 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1465 |
1 |
|
|
T28 |
50 |
|
T95 |
22 |
|
T96 |
42 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T28 |
16 |
|
T95 |
9 |
|
T96 |
31 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1443 |
1 |
|
|
T28 |
39 |
|
T95 |
20 |
|
T96 |
43 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T28 |
14 |
|
T95 |
10 |
|
T96 |
28 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1436 |
1 |
|
|
T28 |
50 |
|
T95 |
22 |
|
T96 |
42 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T28 |
16 |
|
T95 |
9 |
|
T96 |
31 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1408 |
1 |
|
|
T28 |
36 |
|
T95 |
20 |
|
T96 |
41 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T28 |
14 |
|
T95 |
10 |
|
T96 |
28 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1407 |
1 |
|
|
T28 |
49 |
|
T95 |
21 |
|
T96 |
40 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T28 |
16 |
|
T95 |
9 |
|
T96 |
31 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1377 |
1 |
|
|
T28 |
36 |
|
T95 |
19 |
|
T96 |
41 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T28 |
14 |
|
T95 |
10 |
|
T96 |
28 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1370 |
1 |
|
|
T28 |
47 |
|
T95 |
21 |
|
T96 |
40 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T28 |
16 |
|
T95 |
9 |
|
T96 |
31 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1344 |
1 |
|
|
T28 |
34 |
|
T95 |
18 |
|
T96 |
41 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T28 |
14 |
|
T95 |
10 |
|
T96 |
28 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1338 |
1 |
|
|
T28 |
47 |
|
T95 |
20 |
|
T96 |
38 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T28 |
16 |
|
T95 |
9 |
|
T96 |
31 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1304 |
1 |
|
|
T28 |
34 |
|
T95 |
17 |
|
T96 |
39 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T28 |
14 |
|
T95 |
10 |
|
T96 |
28 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1310 |
1 |
|
|
T28 |
46 |
|
T95 |
20 |
|
T96 |
38 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T28 |
16 |
|
T95 |
9 |
|
T96 |
31 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1261 |
1 |
|
|
T28 |
33 |
|
T95 |
17 |
|
T96 |
38 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T28 |
14 |
|
T95 |
10 |
|
T96 |
28 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1283 |
1 |
|
|
T28 |
46 |
|
T95 |
20 |
|
T96 |
36 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T28 |
16 |
|
T95 |
9 |
|
T96 |
31 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1229 |
1 |
|
|
T28 |
32 |
|
T95 |
16 |
|
T96 |
37 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T28 |
14 |
|
T95 |
10 |
|
T96 |
28 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1237 |
1 |
|
|
T28 |
42 |
|
T95 |
20 |
|
T96 |
35 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T28 |
16 |
|
T95 |
9 |
|
T96 |
31 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1188 |
1 |
|
|
T28 |
29 |
|
T95 |
15 |
|
T96 |
36 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[0] |
auto[0] |
55678 |
1 |
|
|
T28 |
993 |
|
T95 |
337 |
|
T96 |
1348 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46654 |
1 |
|
|
T28 |
1583 |
|
T95 |
573 |
|
T96 |
1852 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[1] |
auto[0] |
61931 |
1 |
|
|
T28 |
1193 |
|
T95 |
668 |
|
T96 |
1171 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45401 |
1 |
|
|
T28 |
1029 |
|
T95 |
1423 |
|
T96 |
1472 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T28 |
18 |
|
T95 |
9 |
|
T96 |
16 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1669 |
1 |
|
|
T28 |
47 |
|
T95 |
31 |
|
T96 |
65 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T28 |
18 |
|
T95 |
9 |
|
T96 |
18 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1656 |
1 |
|
|
T28 |
46 |
|
T95 |
32 |
|
T96 |
63 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T28 |
18 |
|
T95 |
9 |
|
T96 |
16 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1627 |
1 |
|
|
T28 |
45 |
|
T95 |
28 |
|
T96 |
64 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T28 |
18 |
|
T95 |
9 |
|
T96 |
18 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1623 |
1 |
|
|
T28 |
45 |
|
T95 |
32 |
|
T96 |
61 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T28 |
18 |
|
T95 |
9 |
|
T96 |
16 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1598 |
1 |
|
|
T28 |
45 |
|
T95 |
27 |
|
T96 |
64 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T28 |
18 |
|
T95 |
9 |
|
T96 |
18 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1592 |
1 |
|
|
T28 |
44 |
|
T95 |
32 |
|
T96 |
59 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T28 |
18 |
|
T95 |
9 |
|
T96 |
16 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1569 |
1 |
|
|
T28 |
45 |
|
T95 |
27 |
|
T96 |
64 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T28 |
18 |
|
T95 |
9 |
|
T96 |
18 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1562 |
1 |
|
|
T28 |
43 |
|
T95 |
31 |
|
T96 |
58 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T28 |
18 |
|
T95 |
9 |
|
T96 |
16 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1539 |
1 |
|
|
T28 |
44 |
|
T95 |
27 |
|
T96 |
62 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T28 |
18 |
|
T95 |
9 |
|
T96 |
18 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1536 |
1 |
|
|
T28 |
41 |
|
T95 |
31 |
|
T96 |
57 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T28 |
18 |
|
T95 |
9 |
|
T96 |
16 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1503 |
1 |
|
|
T28 |
44 |
|
T95 |
27 |
|
T96 |
59 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T28 |
18 |
|
T95 |
9 |
|
T96 |
18 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1508 |
1 |
|
|
T28 |
41 |
|
T95 |
28 |
|
T96 |
55 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T28 |
18 |
|
T95 |
9 |
|
T96 |
16 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1465 |
1 |
|
|
T28 |
42 |
|
T95 |
27 |
|
T96 |
56 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T28 |
18 |
|
T95 |
9 |
|
T96 |
18 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1473 |
1 |
|
|
T28 |
41 |
|
T95 |
28 |
|
T96 |
53 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T28 |
18 |
|
T95 |
9 |
|
T96 |
16 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1435 |
1 |
|
|
T28 |
42 |
|
T95 |
27 |
|
T96 |
54 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T28 |
18 |
|
T95 |
9 |
|
T96 |
18 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1446 |
1 |
|
|
T28 |
40 |
|
T95 |
28 |
|
T96 |
51 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T28 |
18 |
|
T95 |
9 |
|
T96 |
16 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1401 |
1 |
|
|
T28 |
40 |
|
T95 |
27 |
|
T96 |
54 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T28 |
18 |
|
T95 |
9 |
|
T96 |
18 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1422 |
1 |
|
|
T28 |
39 |
|
T95 |
28 |
|
T96 |
50 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T28 |
18 |
|
T95 |
9 |
|
T96 |
16 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1369 |
1 |
|
|
T28 |
39 |
|
T95 |
27 |
|
T96 |
53 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T28 |
18 |
|
T95 |
9 |
|
T96 |
18 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1399 |
1 |
|
|
T28 |
38 |
|
T95 |
28 |
|
T96 |
50 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T28 |
18 |
|
T95 |
9 |
|
T96 |
16 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1336 |
1 |
|
|
T28 |
39 |
|
T95 |
26 |
|
T96 |
50 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T28 |
18 |
|
T95 |
9 |
|
T96 |
18 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1368 |
1 |
|
|
T28 |
38 |
|
T95 |
28 |
|
T96 |
50 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T28 |
18 |
|
T95 |
9 |
|
T96 |
16 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1300 |
1 |
|
|
T28 |
39 |
|
T95 |
26 |
|
T96 |
47 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T28 |
18 |
|
T95 |
9 |
|
T96 |
18 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1327 |
1 |
|
|
T28 |
37 |
|
T95 |
26 |
|
T96 |
49 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T28 |
18 |
|
T95 |
9 |
|
T96 |
16 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1263 |
1 |
|
|
T28 |
39 |
|
T95 |
25 |
|
T96 |
43 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T28 |
18 |
|
T95 |
9 |
|
T96 |
18 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1293 |
1 |
|
|
T28 |
35 |
|
T95 |
25 |
|
T96 |
49 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T28 |
18 |
|
T95 |
9 |
|
T96 |
16 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1230 |
1 |
|
|
T28 |
39 |
|
T95 |
25 |
|
T96 |
42 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T28 |
18 |
|
T95 |
9 |
|
T96 |
18 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1266 |
1 |
|
|
T28 |
35 |
|
T95 |
25 |
|
T96 |
49 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T28 |
18 |
|
T95 |
9 |
|
T96 |
16 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1194 |
1 |
|
|
T28 |
37 |
|
T95 |
23 |
|
T96 |
42 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T28 |
18 |
|
T95 |
9 |
|
T96 |
18 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1236 |
1 |
|
|
T28 |
34 |
|
T95 |
25 |
|
T96 |
46 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[0] |
auto[0] |
63458 |
1 |
|
|
T28 |
838 |
|
T95 |
1412 |
|
T96 |
1940 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45346 |
1 |
|
|
T28 |
1031 |
|
T95 |
602 |
|
T96 |
831 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[1] |
auto[0] |
55057 |
1 |
|
|
T28 |
2194 |
|
T95 |
385 |
|
T96 |
1665 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45211 |
1 |
|
|
T28 |
699 |
|
T95 |
671 |
|
T96 |
1429 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T28 |
21 |
|
T95 |
14 |
|
T96 |
29 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1657 |
1 |
|
|
T28 |
46 |
|
T95 |
23 |
|
T96 |
50 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T28 |
21 |
|
T95 |
13 |
|
T96 |
25 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1674 |
1 |
|
|
T28 |
46 |
|
T95 |
24 |
|
T96 |
54 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T28 |
21 |
|
T95 |
14 |
|
T96 |
29 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1624 |
1 |
|
|
T28 |
46 |
|
T95 |
22 |
|
T96 |
49 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T28 |
21 |
|
T95 |
13 |
|
T96 |
25 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1642 |
1 |
|
|
T28 |
46 |
|
T95 |
23 |
|
T96 |
52 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T28 |
21 |
|
T95 |
14 |
|
T96 |
29 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1594 |
1 |
|
|
T28 |
46 |
|
T95 |
21 |
|
T96 |
48 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T28 |
21 |
|
T95 |
13 |
|
T96 |
25 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1602 |
1 |
|
|
T28 |
45 |
|
T95 |
23 |
|
T96 |
51 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T28 |
21 |
|
T95 |
14 |
|
T96 |
29 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1560 |
1 |
|
|
T28 |
45 |
|
T95 |
21 |
|
T96 |
46 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T28 |
21 |
|
T95 |
13 |
|
T96 |
25 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1566 |
1 |
|
|
T28 |
43 |
|
T95 |
23 |
|
T96 |
49 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T28 |
21 |
|
T95 |
14 |
|
T96 |
29 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1533 |
1 |
|
|
T28 |
45 |
|
T95 |
21 |
|
T96 |
45 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T28 |
21 |
|
T95 |
13 |
|
T96 |
25 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1540 |
1 |
|
|
T28 |
42 |
|
T95 |
22 |
|
T96 |
48 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T28 |
21 |
|
T95 |
14 |
|
T96 |
29 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1487 |
1 |
|
|
T28 |
44 |
|
T95 |
21 |
|
T96 |
44 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T28 |
21 |
|
T95 |
13 |
|
T96 |
25 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1503 |
1 |
|
|
T28 |
40 |
|
T95 |
22 |
|
T96 |
48 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T28 |
20 |
|
T95 |
14 |
|
T96 |
29 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1455 |
1 |
|
|
T28 |
42 |
|
T95 |
21 |
|
T96 |
43 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T28 |
21 |
|
T95 |
12 |
|
T96 |
24 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1475 |
1 |
|
|
T28 |
38 |
|
T95 |
22 |
|
T96 |
47 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T28 |
20 |
|
T95 |
14 |
|
T96 |
29 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1419 |
1 |
|
|
T28 |
42 |
|
T95 |
21 |
|
T96 |
40 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T28 |
21 |
|
T95 |
12 |
|
T96 |
24 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1437 |
1 |
|
|
T28 |
38 |
|
T95 |
22 |
|
T96 |
47 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T28 |
20 |
|
T95 |
14 |
|
T96 |
29 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1393 |
1 |
|
|
T28 |
42 |
|
T95 |
20 |
|
T96 |
39 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T28 |
21 |
|
T95 |
12 |
|
T96 |
24 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1405 |
1 |
|
|
T28 |
36 |
|
T95 |
22 |
|
T96 |
45 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T28 |
20 |
|
T95 |
14 |
|
T96 |
29 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1362 |
1 |
|
|
T28 |
42 |
|
T95 |
20 |
|
T96 |
37 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T28 |
21 |
|
T95 |
12 |
|
T96 |
24 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1349 |
1 |
|
|
T28 |
31 |
|
T95 |
21 |
|
T96 |
43 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T28 |
20 |
|
T95 |
14 |
|
T96 |
29 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1334 |
1 |
|
|
T28 |
42 |
|
T95 |
20 |
|
T96 |
36 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T28 |
21 |
|
T95 |
12 |
|
T96 |
24 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1324 |
1 |
|
|
T28 |
31 |
|
T95 |
21 |
|
T96 |
43 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T28 |
20 |
|
T95 |
14 |
|
T96 |
29 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1311 |
1 |
|
|
T28 |
41 |
|
T95 |
20 |
|
T96 |
35 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T28 |
21 |
|
T95 |
12 |
|
T96 |
24 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1287 |
1 |
|
|
T28 |
29 |
|
T95 |
20 |
|
T96 |
43 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T28 |
20 |
|
T95 |
14 |
|
T96 |
29 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1278 |
1 |
|
|
T28 |
40 |
|
T95 |
20 |
|
T96 |
34 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T28 |
21 |
|
T95 |
12 |
|
T96 |
24 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1253 |
1 |
|
|
T28 |
26 |
|
T95 |
19 |
|
T96 |
42 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T28 |
20 |
|
T95 |
14 |
|
T96 |
29 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1249 |
1 |
|
|
T28 |
39 |
|
T95 |
20 |
|
T96 |
32 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T28 |
21 |
|
T95 |
12 |
|
T96 |
24 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1229 |
1 |
|
|
T28 |
24 |
|
T95 |
19 |
|
T96 |
42 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T28 |
20 |
|
T95 |
14 |
|
T96 |
29 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1215 |
1 |
|
|
T28 |
37 |
|
T95 |
19 |
|
T96 |
32 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T28 |
21 |
|
T95 |
12 |
|
T96 |
24 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1193 |
1 |
|
|
T28 |
24 |
|
T95 |
19 |
|
T96 |
42 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[0] |
auto[0] |
61676 |
1 |
|
|
T28 |
1545 |
|
T95 |
865 |
|
T96 |
1512 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48867 |
1 |
|
|
T28 |
1337 |
|
T95 |
419 |
|
T96 |
1508 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56075 |
1 |
|
|
T28 |
1405 |
|
T95 |
1412 |
|
T96 |
1762 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[1] |
auto[1] |
43755 |
1 |
|
|
T28 |
667 |
|
T95 |
378 |
|
T96 |
1198 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T28 |
26 |
|
T95 |
13 |
|
T96 |
20 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1596 |
1 |
|
|
T28 |
32 |
|
T95 |
23 |
|
T96 |
53 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
781 |
1 |
|
|
T28 |
26 |
|
T95 |
13 |
|
T96 |
27 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1570 |
1 |
|
|
T28 |
31 |
|
T95 |
24 |
|
T96 |
46 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T28 |
26 |
|
T95 |
13 |
|
T96 |
20 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1558 |
1 |
|
|
T28 |
32 |
|
T95 |
23 |
|
T96 |
52 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
781 |
1 |
|
|
T28 |
26 |
|
T95 |
13 |
|
T96 |
27 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1534 |
1 |
|
|
T28 |
31 |
|
T95 |
24 |
|
T96 |
45 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T28 |
26 |
|
T95 |
13 |
|
T96 |
20 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1531 |
1 |
|
|
T28 |
32 |
|
T95 |
23 |
|
T96 |
52 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
780 |
1 |
|
|
T28 |
26 |
|
T95 |
13 |
|
T96 |
27 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1503 |
1 |
|
|
T28 |
30 |
|
T95 |
24 |
|
T96 |
44 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T28 |
26 |
|
T95 |
13 |
|
T96 |
20 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1500 |
1 |
|
|
T28 |
31 |
|
T95 |
22 |
|
T96 |
48 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
780 |
1 |
|
|
T28 |
26 |
|
T95 |
13 |
|
T96 |
27 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1475 |
1 |
|
|
T28 |
29 |
|
T95 |
24 |
|
T96 |
44 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T28 |
26 |
|
T95 |
13 |
|
T96 |
20 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1478 |
1 |
|
|
T28 |
30 |
|
T95 |
22 |
|
T96 |
47 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
778 |
1 |
|
|
T28 |
26 |
|
T95 |
13 |
|
T96 |
27 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1446 |
1 |
|
|
T28 |
28 |
|
T95 |
24 |
|
T96 |
44 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T28 |
26 |
|
T95 |
13 |
|
T96 |
20 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1442 |
1 |
|
|
T28 |
30 |
|
T95 |
22 |
|
T96 |
46 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
778 |
1 |
|
|
T28 |
26 |
|
T95 |
13 |
|
T96 |
27 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1414 |
1 |
|
|
T28 |
28 |
|
T95 |
23 |
|
T96 |
44 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T28 |
26 |
|
T95 |
13 |
|
T96 |
20 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1406 |
1 |
|
|
T28 |
30 |
|
T95 |
21 |
|
T96 |
45 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
771 |
1 |
|
|
T28 |
26 |
|
T95 |
13 |
|
T96 |
26 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1394 |
1 |
|
|
T28 |
28 |
|
T95 |
23 |
|
T96 |
44 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T28 |
26 |
|
T95 |
13 |
|
T96 |
20 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1378 |
1 |
|
|
T28 |
29 |
|
T95 |
21 |
|
T96 |
45 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
771 |
1 |
|
|
T28 |
26 |
|
T95 |
13 |
|
T96 |
26 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1358 |
1 |
|
|
T28 |
26 |
|
T95 |
23 |
|
T96 |
43 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T28 |
26 |
|
T95 |
13 |
|
T96 |
20 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1356 |
1 |
|
|
T28 |
29 |
|
T95 |
21 |
|
T96 |
44 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
767 |
1 |
|
|
T28 |
26 |
|
T95 |
13 |
|
T96 |
26 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1330 |
1 |
|
|
T28 |
25 |
|
T95 |
23 |
|
T96 |
41 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T28 |
26 |
|
T95 |
13 |
|
T96 |
20 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1331 |
1 |
|
|
T28 |
29 |
|
T95 |
21 |
|
T96 |
42 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
767 |
1 |
|
|
T28 |
26 |
|
T95 |
13 |
|
T96 |
26 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1294 |
1 |
|
|
T28 |
24 |
|
T95 |
23 |
|
T96 |
40 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T28 |
26 |
|
T95 |
13 |
|
T96 |
20 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1297 |
1 |
|
|
T28 |
28 |
|
T95 |
18 |
|
T96 |
42 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
767 |
1 |
|
|
T28 |
26 |
|
T95 |
13 |
|
T96 |
26 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1255 |
1 |
|
|
T28 |
24 |
|
T95 |
22 |
|
T96 |
40 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T28 |
26 |
|
T95 |
13 |
|
T96 |
20 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1268 |
1 |
|
|
T28 |
27 |
|
T95 |
15 |
|
T96 |
40 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
767 |
1 |
|
|
T28 |
26 |
|
T95 |
13 |
|
T96 |
26 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1219 |
1 |
|
|
T28 |
23 |
|
T95 |
22 |
|
T96 |
37 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T28 |
26 |
|
T95 |
13 |
|
T96 |
20 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1245 |
1 |
|
|
T28 |
27 |
|
T95 |
14 |
|
T96 |
40 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T28 |
26 |
|
T95 |
13 |
|
T96 |
26 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1186 |
1 |
|
|
T28 |
22 |
|
T95 |
21 |
|
T96 |
37 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T28 |
26 |
|
T95 |
13 |
|
T96 |
20 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1227 |
1 |
|
|
T28 |
26 |
|
T95 |
14 |
|
T96 |
40 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T28 |
26 |
|
T95 |
13 |
|
T96 |
26 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1147 |
1 |
|
|
T28 |
20 |
|
T95 |
21 |
|
T96 |
37 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T28 |
26 |
|
T95 |
13 |
|
T96 |
20 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1192 |
1 |
|
|
T28 |
26 |
|
T95 |
13 |
|
T96 |
38 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T28 |
26 |
|
T95 |
13 |
|
T96 |
26 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1116 |
1 |
|
|
T28 |
20 |
|
T95 |
20 |
|
T96 |
36 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[0] |
auto[0] |
62369 |
1 |
|
|
T28 |
1064 |
|
T95 |
848 |
|
T96 |
1928 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[0] |
auto[1] |
42654 |
1 |
|
|
T28 |
853 |
|
T95 |
603 |
|
T96 |
1051 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59604 |
1 |
|
|
T28 |
2591 |
|
T95 |
407 |
|
T96 |
1515 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45566 |
1 |
|
|
T28 |
535 |
|
T95 |
1258 |
|
T96 |
1222 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
777 |
1 |
|
|
T28 |
21 |
|
T95 |
13 |
|
T96 |
25 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1568 |
1 |
|
|
T28 |
33 |
|
T95 |
23 |
|
T96 |
58 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T28 |
23 |
|
T95 |
8 |
|
T96 |
25 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1604 |
1 |
|
|
T28 |
31 |
|
T95 |
29 |
|
T96 |
58 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
777 |
1 |
|
|
T28 |
21 |
|
T95 |
13 |
|
T96 |
25 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1539 |
1 |
|
|
T28 |
33 |
|
T95 |
23 |
|
T96 |
58 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T28 |
23 |
|
T95 |
8 |
|
T96 |
25 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1574 |
1 |
|
|
T28 |
31 |
|
T95 |
28 |
|
T96 |
57 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
775 |
1 |
|
|
T28 |
21 |
|
T95 |
13 |
|
T96 |
25 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1518 |
1 |
|
|
T28 |
33 |
|
T95 |
23 |
|
T96 |
56 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T28 |
23 |
|
T95 |
8 |
|
T96 |
25 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1548 |
1 |
|
|
T28 |
31 |
|
T95 |
27 |
|
T96 |
57 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
775 |
1 |
|
|
T28 |
21 |
|
T95 |
13 |
|
T96 |
25 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1492 |
1 |
|
|
T28 |
33 |
|
T95 |
22 |
|
T96 |
53 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T28 |
23 |
|
T95 |
8 |
|
T96 |
25 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1520 |
1 |
|
|
T28 |
30 |
|
T95 |
26 |
|
T96 |
57 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
773 |
1 |
|
|
T28 |
21 |
|
T95 |
13 |
|
T96 |
25 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1464 |
1 |
|
|
T28 |
33 |
|
T95 |
22 |
|
T96 |
51 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T28 |
23 |
|
T95 |
8 |
|
T96 |
25 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1490 |
1 |
|
|
T28 |
28 |
|
T95 |
26 |
|
T96 |
56 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
773 |
1 |
|
|
T28 |
21 |
|
T95 |
13 |
|
T96 |
25 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1427 |
1 |
|
|
T28 |
32 |
|
T95 |
21 |
|
T96 |
50 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T28 |
23 |
|
T95 |
8 |
|
T96 |
25 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1460 |
1 |
|
|
T28 |
28 |
|
T95 |
26 |
|
T96 |
54 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T28 |
20 |
|
T95 |
13 |
|
T96 |
25 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1400 |
1 |
|
|
T28 |
32 |
|
T95 |
21 |
|
T96 |
50 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T28 |
23 |
|
T95 |
7 |
|
T96 |
24 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1429 |
1 |
|
|
T28 |
28 |
|
T95 |
26 |
|
T96 |
52 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T28 |
20 |
|
T95 |
13 |
|
T96 |
25 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1363 |
1 |
|
|
T28 |
31 |
|
T95 |
21 |
|
T96 |
49 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T28 |
23 |
|
T95 |
7 |
|
T96 |
24 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1393 |
1 |
|
|
T28 |
27 |
|
T95 |
24 |
|
T96 |
52 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
767 |
1 |
|
|
T28 |
20 |
|
T95 |
13 |
|
T96 |
25 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1329 |
1 |
|
|
T28 |
31 |
|
T95 |
21 |
|
T96 |
48 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T28 |
23 |
|
T95 |
7 |
|
T96 |
24 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1365 |
1 |
|
|
T28 |
26 |
|
T95 |
24 |
|
T96 |
51 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
767 |
1 |
|
|
T28 |
20 |
|
T95 |
13 |
|
T96 |
25 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1299 |
1 |
|
|
T28 |
31 |
|
T95 |
19 |
|
T96 |
48 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T28 |
23 |
|
T95 |
7 |
|
T96 |
24 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1335 |
1 |
|
|
T28 |
25 |
|
T95 |
24 |
|
T96 |
50 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
766 |
1 |
|
|
T28 |
20 |
|
T95 |
13 |
|
T96 |
25 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1267 |
1 |
|
|
T28 |
30 |
|
T95 |
19 |
|
T96 |
47 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T28 |
23 |
|
T95 |
7 |
|
T96 |
24 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1311 |
1 |
|
|
T28 |
25 |
|
T95 |
24 |
|
T96 |
50 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
766 |
1 |
|
|
T28 |
20 |
|
T95 |
13 |
|
T96 |
25 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1243 |
1 |
|
|
T28 |
30 |
|
T95 |
18 |
|
T96 |
47 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T28 |
23 |
|
T95 |
7 |
|
T96 |
24 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1289 |
1 |
|
|
T28 |
24 |
|
T95 |
24 |
|
T96 |
47 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
766 |
1 |
|
|
T28 |
20 |
|
T95 |
13 |
|
T96 |
25 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1201 |
1 |
|
|
T28 |
29 |
|
T95 |
18 |
|
T96 |
46 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T28 |
23 |
|
T95 |
7 |
|
T96 |
24 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1249 |
1 |
|
|
T28 |
22 |
|
T95 |
23 |
|
T96 |
45 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
766 |
1 |
|
|
T28 |
20 |
|
T95 |
13 |
|
T96 |
25 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1165 |
1 |
|
|
T28 |
29 |
|
T95 |
16 |
|
T96 |
43 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T28 |
23 |
|
T95 |
7 |
|
T96 |
24 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1217 |
1 |
|
|
T28 |
22 |
|
T95 |
22 |
|
T96 |
42 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
766 |
1 |
|
|
T28 |
20 |
|
T95 |
13 |
|
T96 |
25 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1136 |
1 |
|
|
T28 |
27 |
|
T95 |
15 |
|
T96 |
43 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T28 |
23 |
|
T95 |
7 |
|
T96 |
24 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1185 |
1 |
|
|
T28 |
22 |
|
T95 |
21 |
|
T96 |
40 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[0] |
auto[0] |
59477 |
1 |
|
|
T28 |
742 |
|
T95 |
1636 |
|
T96 |
1501 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[0] |
auto[1] |
43942 |
1 |
|
|
T28 |
1116 |
|
T95 |
514 |
|
T96 |
1038 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59467 |
1 |
|
|
T28 |
1788 |
|
T95 |
491 |
|
T96 |
1824 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47041 |
1 |
|
|
T28 |
1179 |
|
T95 |
494 |
|
T96 |
1418 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T28 |
11 |
|
T95 |
11 |
|
T96 |
25 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1643 |
1 |
|
|
T28 |
55 |
|
T95 |
26 |
|
T96 |
56 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
731 |
1 |
|
|
T28 |
11 |
|
T95 |
11 |
|
T96 |
25 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1644 |
1 |
|
|
T28 |
55 |
|
T95 |
26 |
|
T96 |
57 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T28 |
11 |
|
T95 |
11 |
|
T96 |
25 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1611 |
1 |
|
|
T28 |
54 |
|
T95 |
25 |
|
T96 |
52 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
731 |
1 |
|
|
T28 |
11 |
|
T95 |
11 |
|
T96 |
25 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1615 |
1 |
|
|
T28 |
55 |
|
T95 |
26 |
|
T96 |
56 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T28 |
11 |
|
T95 |
11 |
|
T96 |
25 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1598 |
1 |
|
|
T28 |
54 |
|
T95 |
24 |
|
T96 |
52 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
731 |
1 |
|
|
T28 |
11 |
|
T95 |
11 |
|
T96 |
25 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1568 |
1 |
|
|
T28 |
55 |
|
T95 |
26 |
|
T96 |
54 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T28 |
11 |
|
T95 |
11 |
|
T96 |
25 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1569 |
1 |
|
|
T28 |
53 |
|
T95 |
22 |
|
T96 |
49 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
731 |
1 |
|
|
T28 |
11 |
|
T95 |
11 |
|
T96 |
25 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1535 |
1 |
|
|
T28 |
54 |
|
T95 |
26 |
|
T96 |
53 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T28 |
11 |
|
T95 |
11 |
|
T96 |
25 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1531 |
1 |
|
|
T28 |
52 |
|
T95 |
22 |
|
T96 |
48 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T28 |
11 |
|
T95 |
11 |
|
T96 |
25 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1505 |
1 |
|
|
T28 |
53 |
|
T95 |
26 |
|
T96 |
52 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T28 |
11 |
|
T95 |
11 |
|
T96 |
25 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1502 |
1 |
|
|
T28 |
49 |
|
T95 |
22 |
|
T96 |
48 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T28 |
11 |
|
T95 |
11 |
|
T96 |
25 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1471 |
1 |
|
|
T28 |
50 |
|
T95 |
26 |
|
T96 |
50 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T28 |
10 |
|
T95 |
11 |
|
T96 |
25 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1470 |
1 |
|
|
T28 |
48 |
|
T95 |
21 |
|
T96 |
48 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T28 |
11 |
|
T95 |
10 |
|
T96 |
25 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1445 |
1 |
|
|
T28 |
48 |
|
T95 |
23 |
|
T96 |
49 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T28 |
10 |
|
T95 |
11 |
|
T96 |
25 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1439 |
1 |
|
|
T28 |
47 |
|
T95 |
21 |
|
T96 |
47 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T28 |
11 |
|
T95 |
10 |
|
T96 |
25 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1410 |
1 |
|
|
T28 |
46 |
|
T95 |
21 |
|
T96 |
48 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T28 |
10 |
|
T95 |
11 |
|
T96 |
25 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1408 |
1 |
|
|
T28 |
46 |
|
T95 |
21 |
|
T96 |
47 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T28 |
11 |
|
T95 |
10 |
|
T96 |
25 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1379 |
1 |
|
|
T28 |
45 |
|
T95 |
20 |
|
T96 |
47 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T28 |
10 |
|
T95 |
11 |
|
T96 |
25 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1379 |
1 |
|
|
T28 |
46 |
|
T95 |
20 |
|
T96 |
47 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T28 |
11 |
|
T95 |
10 |
|
T96 |
25 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1345 |
1 |
|
|
T28 |
43 |
|
T95 |
20 |
|
T96 |
47 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T28 |
10 |
|
T95 |
11 |
|
T96 |
25 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1351 |
1 |
|
|
T28 |
45 |
|
T95 |
18 |
|
T96 |
46 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T28 |
11 |
|
T95 |
10 |
|
T96 |
25 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1305 |
1 |
|
|
T28 |
42 |
|
T95 |
18 |
|
T96 |
47 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T28 |
10 |
|
T95 |
11 |
|
T96 |
25 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1319 |
1 |
|
|
T28 |
45 |
|
T95 |
18 |
|
T96 |
44 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T28 |
11 |
|
T95 |
10 |
|
T96 |
25 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1271 |
1 |
|
|
T28 |
39 |
|
T95 |
18 |
|
T96 |
47 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T28 |
10 |
|
T95 |
11 |
|
T96 |
25 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1294 |
1 |
|
|
T28 |
43 |
|
T95 |
18 |
|
T96 |
39 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T28 |
11 |
|
T95 |
10 |
|
T96 |
25 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1238 |
1 |
|
|
T28 |
38 |
|
T95 |
18 |
|
T96 |
46 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T28 |
10 |
|
T95 |
11 |
|
T96 |
25 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1263 |
1 |
|
|
T28 |
41 |
|
T95 |
18 |
|
T96 |
39 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T28 |
11 |
|
T95 |
10 |
|
T96 |
25 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1209 |
1 |
|
|
T28 |
38 |
|
T95 |
18 |
|
T96 |
44 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T28 |
10 |
|
T95 |
11 |
|
T96 |
25 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1234 |
1 |
|
|
T28 |
39 |
|
T95 |
18 |
|
T96 |
39 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T28 |
11 |
|
T95 |
10 |
|
T96 |
25 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1182 |
1 |
|
|
T28 |
37 |
|
T95 |
16 |
|
T96 |
43 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[0] |
auto[0] |
52217 |
1 |
|
|
T28 |
1735 |
|
T95 |
799 |
|
T96 |
1636 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44014 |
1 |
|
|
T28 |
743 |
|
T95 |
515 |
|
T96 |
597 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[1] |
auto[0] |
61051 |
1 |
|
|
T28 |
1445 |
|
T95 |
1543 |
|
T96 |
1742 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[1] |
auto[1] |
51546 |
1 |
|
|
T28 |
946 |
|
T95 |
400 |
|
T96 |
1901 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T28 |
22 |
|
T95 |
10 |
|
T96 |
32 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1707 |
1 |
|
|
T28 |
40 |
|
T95 |
21 |
|
T96 |
45 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T28 |
19 |
|
T95 |
12 |
|
T96 |
31 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1714 |
1 |
|
|
T28 |
42 |
|
T95 |
20 |
|
T96 |
47 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T28 |
22 |
|
T95 |
10 |
|
T96 |
32 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1667 |
1 |
|
|
T28 |
40 |
|
T95 |
19 |
|
T96 |
42 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T28 |
19 |
|
T95 |
12 |
|
T96 |
31 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1683 |
1 |
|
|
T28 |
42 |
|
T95 |
20 |
|
T96 |
47 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T28 |
22 |
|
T95 |
10 |
|
T96 |
32 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1625 |
1 |
|
|
T28 |
39 |
|
T95 |
19 |
|
T96 |
37 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T28 |
19 |
|
T95 |
12 |
|
T96 |
31 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1651 |
1 |
|
|
T28 |
42 |
|
T95 |
18 |
|
T96 |
46 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T28 |
22 |
|
T95 |
10 |
|
T96 |
32 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1587 |
1 |
|
|
T28 |
38 |
|
T95 |
18 |
|
T96 |
36 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T28 |
19 |
|
T95 |
12 |
|
T96 |
31 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1613 |
1 |
|
|
T28 |
42 |
|
T95 |
17 |
|
T96 |
46 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T28 |
22 |
|
T95 |
10 |
|
T96 |
32 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1559 |
1 |
|
|
T28 |
38 |
|
T95 |
18 |
|
T96 |
35 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T28 |
19 |
|
T95 |
12 |
|
T96 |
31 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1581 |
1 |
|
|
T28 |
42 |
|
T95 |
17 |
|
T96 |
45 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T28 |
22 |
|
T95 |
10 |
|
T96 |
32 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1511 |
1 |
|
|
T28 |
37 |
|
T95 |
18 |
|
T96 |
33 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T28 |
19 |
|
T95 |
12 |
|
T96 |
31 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1553 |
1 |
|
|
T28 |
41 |
|
T95 |
16 |
|
T96 |
45 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T28 |
21 |
|
T95 |
10 |
|
T96 |
32 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1474 |
1 |
|
|
T28 |
36 |
|
T95 |
17 |
|
T96 |
33 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T28 |
19 |
|
T95 |
12 |
|
T96 |
31 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1529 |
1 |
|
|
T28 |
41 |
|
T95 |
16 |
|
T96 |
45 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T28 |
21 |
|
T95 |
10 |
|
T96 |
32 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1438 |
1 |
|
|
T28 |
35 |
|
T95 |
17 |
|
T96 |
32 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T28 |
19 |
|
T95 |
12 |
|
T96 |
31 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1493 |
1 |
|
|
T28 |
40 |
|
T95 |
16 |
|
T96 |
45 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T28 |
21 |
|
T95 |
10 |
|
T96 |
32 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1409 |
1 |
|
|
T28 |
34 |
|
T95 |
17 |
|
T96 |
31 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T28 |
19 |
|
T95 |
12 |
|
T96 |
31 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1461 |
1 |
|
|
T28 |
38 |
|
T95 |
16 |
|
T96 |
45 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T28 |
21 |
|
T95 |
10 |
|
T96 |
32 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1375 |
1 |
|
|
T28 |
33 |
|
T95 |
17 |
|
T96 |
30 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T28 |
19 |
|
T95 |
12 |
|
T96 |
31 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1420 |
1 |
|
|
T28 |
36 |
|
T95 |
16 |
|
T96 |
45 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T28 |
21 |
|
T95 |
10 |
|
T96 |
32 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1337 |
1 |
|
|
T28 |
31 |
|
T95 |
17 |
|
T96 |
28 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T28 |
19 |
|
T95 |
12 |
|
T96 |
31 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1388 |
1 |
|
|
T28 |
36 |
|
T95 |
16 |
|
T96 |
45 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T28 |
21 |
|
T95 |
10 |
|
T96 |
32 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1308 |
1 |
|
|
T28 |
29 |
|
T95 |
17 |
|
T96 |
26 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T28 |
19 |
|
T95 |
12 |
|
T96 |
31 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1359 |
1 |
|
|
T28 |
36 |
|
T95 |
16 |
|
T96 |
45 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T28 |
21 |
|
T95 |
10 |
|
T96 |
32 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1264 |
1 |
|
|
T28 |
25 |
|
T95 |
17 |
|
T96 |
25 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T28 |
19 |
|
T95 |
12 |
|
T96 |
31 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1332 |
1 |
|
|
T28 |
36 |
|
T95 |
14 |
|
T96 |
44 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T28 |
21 |
|
T95 |
10 |
|
T96 |
32 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1226 |
1 |
|
|
T28 |
23 |
|
T95 |
17 |
|
T96 |
22 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T28 |
19 |
|
T95 |
12 |
|
T96 |
31 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1292 |
1 |
|
|
T28 |
36 |
|
T95 |
14 |
|
T96 |
43 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T28 |
21 |
|
T95 |
10 |
|
T96 |
32 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1185 |
1 |
|
|
T28 |
22 |
|
T95 |
17 |
|
T96 |
20 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T28 |
19 |
|
T95 |
12 |
|
T96 |
31 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1259 |
1 |
|
|
T28 |
36 |
|
T95 |
13 |
|
T96 |
43 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[0] |
auto[0] |
61196 |
1 |
|
|
T28 |
1926 |
|
T95 |
1483 |
|
T96 |
1515 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[0] |
auto[1] |
39746 |
1 |
|
|
T28 |
925 |
|
T95 |
459 |
|
T96 |
1360 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[1] |
auto[0] |
64655 |
1 |
|
|
T28 |
1114 |
|
T95 |
615 |
|
T96 |
2194 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45280 |
1 |
|
|
T28 |
938 |
|
T95 |
532 |
|
T96 |
951 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T28 |
19 |
|
T95 |
10 |
|
T96 |
24 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1588 |
1 |
|
|
T28 |
44 |
|
T95 |
28 |
|
T96 |
46 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
773 |
1 |
|
|
T28 |
16 |
|
T95 |
11 |
|
T96 |
26 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1563 |
1 |
|
|
T28 |
46 |
|
T95 |
27 |
|
T96 |
45 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T28 |
19 |
|
T95 |
10 |
|
T96 |
24 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1555 |
1 |
|
|
T28 |
41 |
|
T95 |
27 |
|
T96 |
46 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
773 |
1 |
|
|
T28 |
16 |
|
T95 |
11 |
|
T96 |
26 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1539 |
1 |
|
|
T28 |
46 |
|
T95 |
27 |
|
T96 |
44 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T28 |
19 |
|
T95 |
10 |
|
T96 |
24 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1529 |
1 |
|
|
T28 |
41 |
|
T95 |
27 |
|
T96 |
46 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
773 |
1 |
|
|
T28 |
16 |
|
T95 |
11 |
|
T96 |
26 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1496 |
1 |
|
|
T28 |
46 |
|
T95 |
27 |
|
T96 |
43 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T28 |
19 |
|
T95 |
10 |
|
T96 |
24 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1501 |
1 |
|
|
T28 |
40 |
|
T95 |
26 |
|
T96 |
44 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
773 |
1 |
|
|
T28 |
16 |
|
T95 |
11 |
|
T96 |
26 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1461 |
1 |
|
|
T28 |
45 |
|
T95 |
26 |
|
T96 |
43 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T28 |
19 |
|
T95 |
10 |
|
T96 |
24 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1469 |
1 |
|
|
T28 |
39 |
|
T95 |
26 |
|
T96 |
42 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
769 |
1 |
|
|
T28 |
16 |
|
T95 |
11 |
|
T96 |
26 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1432 |
1 |
|
|
T28 |
42 |
|
T95 |
25 |
|
T96 |
43 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T28 |
19 |
|
T95 |
10 |
|
T96 |
24 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1438 |
1 |
|
|
T28 |
38 |
|
T95 |
25 |
|
T96 |
40 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
769 |
1 |
|
|
T28 |
16 |
|
T95 |
11 |
|
T96 |
26 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1398 |
1 |
|
|
T28 |
38 |
|
T95 |
25 |
|
T96 |
43 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T28 |
19 |
|
T95 |
10 |
|
T96 |
24 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1407 |
1 |
|
|
T28 |
38 |
|
T95 |
21 |
|
T96 |
40 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T28 |
16 |
|
T95 |
10 |
|
T96 |
25 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1368 |
1 |
|
|
T28 |
36 |
|
T95 |
24 |
|
T96 |
42 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T28 |
19 |
|
T95 |
10 |
|
T96 |
24 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1385 |
1 |
|
|
T28 |
38 |
|
T95 |
19 |
|
T96 |
40 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T28 |
16 |
|
T95 |
10 |
|
T96 |
25 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1345 |
1 |
|
|
T28 |
36 |
|
T95 |
24 |
|
T96 |
41 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T28 |
19 |
|
T95 |
10 |
|
T96 |
24 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1352 |
1 |
|
|
T28 |
37 |
|
T95 |
19 |
|
T96 |
40 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T28 |
16 |
|
T95 |
10 |
|
T96 |
25 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1324 |
1 |
|
|
T28 |
36 |
|
T95 |
24 |
|
T96 |
39 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T28 |
19 |
|
T95 |
10 |
|
T96 |
24 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1325 |
1 |
|
|
T28 |
37 |
|
T95 |
19 |
|
T96 |
40 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T28 |
16 |
|
T95 |
10 |
|
T96 |
25 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1300 |
1 |
|
|
T28 |
34 |
|
T95 |
24 |
|
T96 |
38 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T28 |
19 |
|
T95 |
10 |
|
T96 |
24 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1290 |
1 |
|
|
T28 |
36 |
|
T95 |
19 |
|
T96 |
38 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T28 |
16 |
|
T95 |
10 |
|
T96 |
25 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1273 |
1 |
|
|
T28 |
34 |
|
T95 |
24 |
|
T96 |
36 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T28 |
19 |
|
T95 |
10 |
|
T96 |
24 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1247 |
1 |
|
|
T28 |
36 |
|
T95 |
19 |
|
T96 |
38 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T28 |
16 |
|
T95 |
10 |
|
T96 |
25 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1246 |
1 |
|
|
T28 |
32 |
|
T95 |
24 |
|
T96 |
35 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T28 |
19 |
|
T95 |
10 |
|
T96 |
24 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1212 |
1 |
|
|
T28 |
34 |
|
T95 |
19 |
|
T96 |
38 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T28 |
16 |
|
T95 |
10 |
|
T96 |
25 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1221 |
1 |
|
|
T28 |
32 |
|
T95 |
24 |
|
T96 |
35 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T28 |
19 |
|
T95 |
10 |
|
T96 |
24 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1185 |
1 |
|
|
T28 |
34 |
|
T95 |
19 |
|
T96 |
38 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T28 |
16 |
|
T95 |
10 |
|
T96 |
25 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1186 |
1 |
|
|
T28 |
32 |
|
T95 |
24 |
|
T96 |
35 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T28 |
19 |
|
T95 |
10 |
|
T96 |
24 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1152 |
1 |
|
|
T28 |
34 |
|
T95 |
18 |
|
T96 |
38 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T28 |
16 |
|
T95 |
10 |
|
T96 |
25 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1159 |
1 |
|
|
T28 |
31 |
|
T95 |
23 |
|
T96 |
35 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[0] |
auto[0] |
54348 |
1 |
|
|
T28 |
1179 |
|
T95 |
627 |
|
T96 |
1745 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45826 |
1 |
|
|
T28 |
1669 |
|
T95 |
402 |
|
T96 |
1012 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[1] |
auto[0] |
61389 |
1 |
|
|
T28 |
1365 |
|
T95 |
831 |
|
T96 |
1682 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47569 |
1 |
|
|
T28 |
869 |
|
T95 |
1259 |
|
T96 |
1568 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T28 |
17 |
|
T95 |
12 |
|
T96 |
24 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1645 |
1 |
|
|
T28 |
36 |
|
T95 |
25 |
|
T96 |
49 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T28 |
19 |
|
T95 |
15 |
|
T96 |
25 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1646 |
1 |
|
|
T28 |
33 |
|
T95 |
23 |
|
T96 |
49 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T28 |
17 |
|
T95 |
12 |
|
T96 |
24 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1613 |
1 |
|
|
T28 |
35 |
|
T95 |
25 |
|
T96 |
48 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T28 |
19 |
|
T95 |
15 |
|
T96 |
25 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1613 |
1 |
|
|
T28 |
33 |
|
T95 |
22 |
|
T96 |
48 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T28 |
17 |
|
T95 |
12 |
|
T96 |
24 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1581 |
1 |
|
|
T28 |
35 |
|
T95 |
25 |
|
T96 |
45 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
759 |
1 |
|
|
T28 |
19 |
|
T95 |
15 |
|
T96 |
25 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1584 |
1 |
|
|
T28 |
33 |
|
T95 |
21 |
|
T96 |
47 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T28 |
17 |
|
T95 |
12 |
|
T96 |
24 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1553 |
1 |
|
|
T28 |
35 |
|
T95 |
23 |
|
T96 |
45 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
759 |
1 |
|
|
T28 |
19 |
|
T95 |
15 |
|
T96 |
25 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1561 |
1 |
|
|
T28 |
33 |
|
T95 |
20 |
|
T96 |
46 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T28 |
17 |
|
T95 |
12 |
|
T96 |
24 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1519 |
1 |
|
|
T28 |
35 |
|
T95 |
22 |
|
T96 |
43 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T28 |
19 |
|
T95 |
15 |
|
T96 |
25 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1527 |
1 |
|
|
T28 |
31 |
|
T95 |
19 |
|
T96 |
45 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T28 |
17 |
|
T95 |
12 |
|
T96 |
24 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1476 |
1 |
|
|
T28 |
35 |
|
T95 |
22 |
|
T96 |
42 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T28 |
19 |
|
T95 |
15 |
|
T96 |
25 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1494 |
1 |
|
|
T28 |
31 |
|
T95 |
17 |
|
T96 |
41 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T28 |
17 |
|
T95 |
12 |
|
T96 |
24 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1442 |
1 |
|
|
T28 |
35 |
|
T95 |
22 |
|
T96 |
42 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T28 |
19 |
|
T95 |
14 |
|
T96 |
25 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1466 |
1 |
|
|
T28 |
31 |
|
T95 |
16 |
|
T96 |
39 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T28 |
17 |
|
T95 |
12 |
|
T96 |
24 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1415 |
1 |
|
|
T28 |
35 |
|
T95 |
22 |
|
T96 |
41 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T28 |
19 |
|
T95 |
14 |
|
T96 |
25 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1439 |
1 |
|
|
T28 |
30 |
|
T95 |
16 |
|
T96 |
39 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T28 |
17 |
|
T95 |
12 |
|
T96 |
24 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1377 |
1 |
|
|
T28 |
34 |
|
T95 |
21 |
|
T96 |
40 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T28 |
19 |
|
T95 |
14 |
|
T96 |
25 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1408 |
1 |
|
|
T28 |
30 |
|
T95 |
16 |
|
T96 |
39 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T28 |
17 |
|
T95 |
12 |
|
T96 |
24 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1347 |
1 |
|
|
T28 |
34 |
|
T95 |
21 |
|
T96 |
40 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T28 |
19 |
|
T95 |
14 |
|
T96 |
25 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1373 |
1 |
|
|
T28 |
28 |
|
T95 |
16 |
|
T96 |
37 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T28 |
17 |
|
T95 |
12 |
|
T96 |
24 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1307 |
1 |
|
|
T28 |
33 |
|
T95 |
20 |
|
T96 |
40 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T28 |
19 |
|
T95 |
14 |
|
T96 |
25 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1343 |
1 |
|
|
T28 |
26 |
|
T95 |
16 |
|
T96 |
37 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T28 |
17 |
|
T95 |
12 |
|
T96 |
24 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1280 |
1 |
|
|
T28 |
32 |
|
T95 |
20 |
|
T96 |
39 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T28 |
19 |
|
T95 |
14 |
|
T96 |
25 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1303 |
1 |
|
|
T28 |
25 |
|
T95 |
16 |
|
T96 |
36 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T28 |
17 |
|
T95 |
12 |
|
T96 |
24 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1247 |
1 |
|
|
T28 |
31 |
|
T95 |
19 |
|
T96 |
37 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T28 |
19 |
|
T95 |
14 |
|
T96 |
25 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1268 |
1 |
|
|
T28 |
24 |
|
T95 |
14 |
|
T96 |
36 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T28 |
17 |
|
T95 |
12 |
|
T96 |
24 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1217 |
1 |
|
|
T28 |
31 |
|
T95 |
19 |
|
T96 |
36 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T28 |
19 |
|
T95 |
14 |
|
T96 |
25 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1250 |
1 |
|
|
T28 |
22 |
|
T95 |
14 |
|
T96 |
36 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T28 |
17 |
|
T95 |
12 |
|
T96 |
24 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1175 |
1 |
|
|
T28 |
31 |
|
T95 |
17 |
|
T96 |
33 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T28 |
19 |
|
T95 |
14 |
|
T96 |
25 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1218 |
1 |
|
|
T28 |
22 |
|
T95 |
14 |
|
T96 |
35 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[0] |
auto[0] |
55983 |
1 |
|
|
T28 |
1118 |
|
T95 |
754 |
|
T96 |
1416 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47188 |
1 |
|
|
T28 |
688 |
|
T95 |
259 |
|
T96 |
1103 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[1] |
auto[0] |
58477 |
1 |
|
|
T28 |
2235 |
|
T95 |
742 |
|
T96 |
2081 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48365 |
1 |
|
|
T28 |
858 |
|
T95 |
1412 |
|
T96 |
1256 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T28 |
21 |
|
T95 |
11 |
|
T96 |
20 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1677 |
1 |
|
|
T28 |
39 |
|
T95 |
24 |
|
T96 |
56 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T28 |
20 |
|
T95 |
10 |
|
T96 |
23 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1670 |
1 |
|
|
T28 |
40 |
|
T95 |
26 |
|
T96 |
54 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T28 |
21 |
|
T95 |
11 |
|
T96 |
20 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1646 |
1 |
|
|
T28 |
38 |
|
T95 |
23 |
|
T96 |
55 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T28 |
20 |
|
T95 |
10 |
|
T96 |
23 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1640 |
1 |
|
|
T28 |
40 |
|
T95 |
25 |
|
T96 |
54 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T28 |
21 |
|
T95 |
11 |
|
T96 |
20 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1622 |
1 |
|
|
T28 |
38 |
|
T95 |
23 |
|
T96 |
55 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T28 |
20 |
|
T95 |
10 |
|
T96 |
23 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1612 |
1 |
|
|
T28 |
40 |
|
T95 |
25 |
|
T96 |
54 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T28 |
21 |
|
T95 |
11 |
|
T96 |
20 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1593 |
1 |
|
|
T28 |
38 |
|
T95 |
19 |
|
T96 |
55 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T28 |
20 |
|
T95 |
10 |
|
T96 |
23 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1584 |
1 |
|
|
T28 |
39 |
|
T95 |
25 |
|
T96 |
52 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T28 |
21 |
|
T95 |
11 |
|
T96 |
20 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1555 |
1 |
|
|
T28 |
37 |
|
T95 |
19 |
|
T96 |
54 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T28 |
20 |
|
T95 |
10 |
|
T96 |
23 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1548 |
1 |
|
|
T28 |
39 |
|
T95 |
25 |
|
T96 |
50 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T28 |
21 |
|
T95 |
11 |
|
T96 |
20 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1529 |
1 |
|
|
T28 |
37 |
|
T95 |
19 |
|
T96 |
53 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T28 |
20 |
|
T95 |
10 |
|
T96 |
23 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1516 |
1 |
|
|
T28 |
38 |
|
T95 |
25 |
|
T96 |
50 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
684 |
1 |
|
|
T28 |
21 |
|
T95 |
11 |
|
T96 |
20 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1497 |
1 |
|
|
T28 |
36 |
|
T95 |
19 |
|
T96 |
53 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T28 |
20 |
|
T95 |
9 |
|
T96 |
23 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1471 |
1 |
|
|
T28 |
38 |
|
T95 |
24 |
|
T96 |
50 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
684 |
1 |
|
|
T28 |
21 |
|
T95 |
11 |
|
T96 |
20 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1458 |
1 |
|
|
T28 |
35 |
|
T95 |
17 |
|
T96 |
50 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T28 |
20 |
|
T95 |
9 |
|
T96 |
23 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1441 |
1 |
|
|
T28 |
37 |
|
T95 |
24 |
|
T96 |
48 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T28 |
21 |
|
T95 |
11 |
|
T96 |
20 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1428 |
1 |
|
|
T28 |
34 |
|
T95 |
16 |
|
T96 |
50 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T28 |
20 |
|
T95 |
9 |
|
T96 |
23 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1406 |
1 |
|
|
T28 |
36 |
|
T95 |
24 |
|
T96 |
47 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T28 |
21 |
|
T95 |
11 |
|
T96 |
20 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1396 |
1 |
|
|
T28 |
34 |
|
T95 |
16 |
|
T96 |
50 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T28 |
20 |
|
T95 |
9 |
|
T96 |
23 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1362 |
1 |
|
|
T28 |
34 |
|
T95 |
23 |
|
T96 |
46 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T28 |
21 |
|
T95 |
11 |
|
T96 |
20 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1362 |
1 |
|
|
T28 |
32 |
|
T95 |
16 |
|
T96 |
48 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
689 |
1 |
|
|
T28 |
20 |
|
T95 |
9 |
|
T96 |
23 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1325 |
1 |
|
|
T28 |
32 |
|
T95 |
23 |
|
T96 |
44 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T28 |
21 |
|
T95 |
11 |
|
T96 |
20 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1329 |
1 |
|
|
T28 |
32 |
|
T95 |
15 |
|
T96 |
46 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
689 |
1 |
|
|
T28 |
20 |
|
T95 |
9 |
|
T96 |
23 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1309 |
1 |
|
|
T28 |
31 |
|
T95 |
23 |
|
T96 |
44 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T28 |
21 |
|
T95 |
11 |
|
T96 |
20 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1301 |
1 |
|
|
T28 |
29 |
|
T95 |
13 |
|
T96 |
46 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T28 |
20 |
|
T95 |
9 |
|
T96 |
23 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1277 |
1 |
|
|
T28 |
31 |
|
T95 |
23 |
|
T96 |
43 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T28 |
21 |
|
T95 |
11 |
|
T96 |
20 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1256 |
1 |
|
|
T28 |
28 |
|
T95 |
13 |
|
T96 |
44 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T28 |
20 |
|
T95 |
9 |
|
T96 |
23 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1240 |
1 |
|
|
T28 |
29 |
|
T95 |
23 |
|
T96 |
40 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T28 |
21 |
|
T95 |
11 |
|
T96 |
20 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1199 |
1 |
|
|
T28 |
27 |
|
T95 |
12 |
|
T96 |
40 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T28 |
20 |
|
T95 |
9 |
|
T96 |
23 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1207 |
1 |
|
|
T28 |
29 |
|
T95 |
23 |
|
T96 |
40 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57016 |
1 |
|
|
T28 |
1260 |
|
T95 |
738 |
|
T96 |
1279 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48834 |
1 |
|
|
T28 |
2073 |
|
T95 |
1172 |
|
T96 |
1300 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[1] |
auto[0] |
61308 |
1 |
|
|
T28 |
899 |
|
T95 |
681 |
|
T96 |
2090 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[1] |
auto[1] |
42523 |
1 |
|
|
T28 |
740 |
|
T95 |
614 |
|
T96 |
1146 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T28 |
14 |
|
T95 |
9 |
|
T96 |
19 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1680 |
1 |
|
|
T28 |
45 |
|
T95 |
24 |
|
T96 |
62 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T28 |
14 |
|
T95 |
11 |
|
T96 |
21 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1674 |
1 |
|
|
T28 |
44 |
|
T95 |
22 |
|
T96 |
61 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T28 |
14 |
|
T95 |
9 |
|
T96 |
19 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1637 |
1 |
|
|
T28 |
44 |
|
T95 |
23 |
|
T96 |
57 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T28 |
14 |
|
T95 |
11 |
|
T96 |
21 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1646 |
1 |
|
|
T28 |
42 |
|
T95 |
22 |
|
T96 |
60 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T28 |
14 |
|
T95 |
9 |
|
T96 |
19 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1602 |
1 |
|
|
T28 |
44 |
|
T95 |
23 |
|
T96 |
54 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T28 |
14 |
|
T95 |
11 |
|
T96 |
21 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1614 |
1 |
|
|
T28 |
41 |
|
T95 |
22 |
|
T96 |
59 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T28 |
14 |
|
T95 |
9 |
|
T96 |
19 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1575 |
1 |
|
|
T28 |
43 |
|
T95 |
21 |
|
T96 |
52 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T28 |
14 |
|
T95 |
11 |
|
T96 |
21 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1579 |
1 |
|
|
T28 |
40 |
|
T95 |
21 |
|
T96 |
57 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T28 |
14 |
|
T95 |
9 |
|
T96 |
19 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1537 |
1 |
|
|
T28 |
43 |
|
T95 |
21 |
|
T96 |
52 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T28 |
14 |
|
T95 |
11 |
|
T96 |
21 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1559 |
1 |
|
|
T28 |
40 |
|
T95 |
21 |
|
T96 |
54 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T28 |
14 |
|
T95 |
9 |
|
T96 |
19 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1510 |
1 |
|
|
T28 |
43 |
|
T95 |
20 |
|
T96 |
52 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T28 |
14 |
|
T95 |
11 |
|
T96 |
21 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1532 |
1 |
|
|
T28 |
39 |
|
T95 |
21 |
|
T96 |
54 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
689 |
1 |
|
|
T28 |
14 |
|
T95 |
9 |
|
T96 |
19 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1482 |
1 |
|
|
T28 |
42 |
|
T95 |
19 |
|
T96 |
52 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T28 |
14 |
|
T95 |
10 |
|
T96 |
20 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1499 |
1 |
|
|
T28 |
39 |
|
T95 |
21 |
|
T96 |
54 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
689 |
1 |
|
|
T28 |
14 |
|
T95 |
9 |
|
T96 |
19 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1454 |
1 |
|
|
T28 |
42 |
|
T95 |
19 |
|
T96 |
51 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T28 |
14 |
|
T95 |
10 |
|
T96 |
20 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1468 |
1 |
|
|
T28 |
36 |
|
T95 |
21 |
|
T96 |
54 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T28 |
14 |
|
T95 |
9 |
|
T96 |
19 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1429 |
1 |
|
|
T28 |
42 |
|
T95 |
19 |
|
T96 |
51 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T28 |
14 |
|
T95 |
10 |
|
T96 |
20 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1439 |
1 |
|
|
T28 |
36 |
|
T95 |
21 |
|
T96 |
53 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T28 |
14 |
|
T95 |
9 |
|
T96 |
19 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1397 |
1 |
|
|
T28 |
42 |
|
T95 |
19 |
|
T96 |
50 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T28 |
14 |
|
T95 |
10 |
|
T96 |
20 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1414 |
1 |
|
|
T28 |
35 |
|
T95 |
21 |
|
T96 |
52 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T28 |
14 |
|
T95 |
9 |
|
T96 |
19 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1358 |
1 |
|
|
T28 |
42 |
|
T95 |
18 |
|
T96 |
49 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T28 |
14 |
|
T95 |
10 |
|
T96 |
20 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1382 |
1 |
|
|
T28 |
33 |
|
T95 |
20 |
|
T96 |
50 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T28 |
14 |
|
T95 |
9 |
|
T96 |
19 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1327 |
1 |
|
|
T28 |
42 |
|
T95 |
17 |
|
T96 |
49 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T28 |
14 |
|
T95 |
10 |
|
T96 |
20 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1358 |
1 |
|
|
T28 |
31 |
|
T95 |
20 |
|
T96 |
48 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T28 |
14 |
|
T95 |
9 |
|
T96 |
19 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1285 |
1 |
|
|
T28 |
40 |
|
T95 |
16 |
|
T96 |
49 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T28 |
14 |
|
T95 |
10 |
|
T96 |
20 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1318 |
1 |
|
|
T28 |
28 |
|
T95 |
20 |
|
T96 |
46 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T28 |
14 |
|
T95 |
9 |
|
T96 |
19 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1254 |
1 |
|
|
T28 |
39 |
|
T95 |
16 |
|
T96 |
48 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T28 |
14 |
|
T95 |
10 |
|
T96 |
20 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1278 |
1 |
|
|
T28 |
27 |
|
T95 |
19 |
|
T96 |
45 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T28 |
14 |
|
T95 |
9 |
|
T96 |
19 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1217 |
1 |
|
|
T28 |
39 |
|
T95 |
16 |
|
T96 |
46 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T28 |
14 |
|
T95 |
10 |
|
T96 |
20 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1247 |
1 |
|
|
T28 |
26 |
|
T95 |
19 |
|
T96 |
45 |