Summary for Variable intr_en
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
8239789 |
1 |
|
|
T24 |
349 |
|
T25 |
1 |
|
T1 |
5155 |
auto[1] |
6201248 |
1 |
|
|
T1 |
3454 |
|
T12 |
136 |
|
T2 |
20276 |
Summary for Variable intr_state
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
11867553 |
1 |
|
|
T24 |
349 |
|
T25 |
1 |
|
T1 |
7178 |
auto[1] |
2573484 |
1 |
|
|
T1 |
1431 |
|
T12 |
34 |
|
T2 |
8671 |
Summary for Variable type_ctrl_en
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
8246062 |
1 |
|
|
T24 |
349 |
|
T25 |
1 |
|
T1 |
6091 |
auto[1] |
6194975 |
1 |
|
|
T1 |
2518 |
|
T12 |
80 |
|
T2 |
22076 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
TOTAL |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[1] |
auto[0] |
auto[0] |
1821430 |
1 |
|
|
T1 |
591 |
|
T12 |
8 |
|
T2 |
6830 |
auto[1] |
auto[0] |
auto[1] |
1290294 |
1 |
|
|
T1 |
822 |
|
T12 |
12 |
|
T2 |
4626 |
auto[1] |
auto[1] |
auto[0] |
1800061 |
1 |
|
|
T1 |
496 |
|
T12 |
38 |
|
T2 |
6575 |
auto[1] |
auto[1] |
auto[1] |
1283190 |
1 |
|
|
T1 |
609 |
|
T12 |
22 |
|
T2 |
4045 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
NAME | COUNT | STATUS |
intr_type_disabled |
0 |
Excluded |