Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
2687187 |
1 |
|
|
T1 |
1021 |
|
T12 |
74 |
|
T2 |
8628 |
| auto[1] |
auto[0] |
auto[1] |
396170 |
1 |
|
|
T1 |
140 |
|
T12 |
4 |
|
T2 |
1241 |
| auto[1] |
auto[1] |
auto[0] |
2695959 |
1 |
|
|
T1 |
992 |
|
T12 |
35 |
|
T2 |
9505 |
| auto[1] |
auto[1] |
auto[1] |
397946 |
1 |
|
|
T1 |
174 |
|
T12 |
2 |
|
T2 |
1451 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |