Unified Coverage Report :: Group :: cip_base_pkg::intr_cg::SHAPE{(num_interrupts - 1)=31}

Group : cip_base_pkg::intr_cg::SHAPE{(num_interrupts - 1)=31}

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_cip_lib_0/cip_base_env_cov.sv

---

Summary for Group cip_base_pkg::intr_cg::SHAPE{(num_interrupts - 1)=31}

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	36	0	36	100.00
Crosses	128	0	128	100.00

Variables for Group cip_base_pkg::intr_cg::SHAPE{(num_interrupts - 1)=31}

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_intr	32	0	32	100.00	100	1	1	0
cp_intr_en	2	0	2	100.00	100	1	1	2
cp_intr_state	2	0	2	100.00	100	1	1	2

Crosses for Group cip_base_pkg::intr_cg::SHAPE{(num_interrupts - 1)=31}

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
intr_cg_cc	128	0	128	100.00	100	1	1	0

Summary for Variable cp_intr

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	32	0	32	100.00

User Defined Bins for cp_intr

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_values[0]	14789718	1			T33	1496		T34	232		T1	147
all_values[1]	14789718	1			T33	1496		T34	232		T1	147
all_values[2]	14789718	1			T33	1496		T34	232		T1	147
all_values[3]	14789718	1			T33	1496		T34	232		T1	147
all_values[4]	14789718	1			T33	1496		T34	232		T1	147
all_values[5]	14789718	1			T33	1496		T34	232		T1	147
all_values[6]	14789718	1			T33	1496		T34	232		T1	147
all_values[7]	14789718	1			T33	1496		T34	232		T1	147
all_values[8]	14789718	1			T33	1496		T34	232		T1	147
all_values[9]	14789718	1			T33	1496		T34	232		T1	147
all_values[10]	14789718	1			T33	1496		T34	232		T1	147
all_values[11]	14789718	1			T33	1496		T34	232		T1	147
all_values[12]	14789718	1			T33	1496		T34	232		T1	147
all_values[13]	14789718	1			T33	1496		T34	232		T1	147
all_values[14]	14789718	1			T33	1496		T34	232		T1	147
all_values[15]	14789718	1			T33	1496		T34	232		T1	147
all_values[16]	14789718	1			T33	1496		T34	232		T1	147
all_values[17]	14789718	1			T33	1496		T34	232		T1	147
all_values[18]	14789718	1			T33	1496		T34	232		T1	147
all_values[19]	14789718	1			T33	1496		T34	232		T1	147
all_values[20]	14789718	1			T33	1496		T34	232		T1	147
all_values[21]	14789718	1			T33	1496		T34	232		T1	147
all_values[22]	14789718	1			T33	1496		T34	232		T1	147
all_values[23]	14789718	1			T33	1496		T34	232		T1	147
all_values[24]	14789718	1			T33	1496		T34	232		T1	147
all_values[25]	14789718	1			T33	1496		T34	232		T1	147
all_values[26]	14789718	1			T33	1496		T34	232		T1	147
all_values[27]	14789718	1			T33	1496		T34	232		T1	147
all_values[28]	14789718	1			T33	1496		T34	232		T1	147
all_values[29]	14789718	1			T33	1496		T34	232		T1	147
all_values[30]	14789718	1			T33	1496		T34	232		T1	147
all_values[31]	14789718	1			T33	1496		T34	232		T1	147

---

Summary for Variable cp_intr_en

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_intr_en

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

270327644

1

T33

47872

T34

7424

T1

3180

auto[1]

202943332

1

T1

1524

T11

100404

T12

13203

---

Summary for Variable cp_intr_state

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_intr_state

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

105983149

1

T33

47872

T34

7424

T1

2464

auto[1]

367287827

1

T1

2240

T11

181835

T12

25100

---

Summary for Cross intr_cg_cc

Samples crossed: cp_intr cp_intr_en cp_intr_state

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	128	0	128	100.00

Automatically Generated Cross Bins for intr_cg_cc

Bins

cp_intr	cp_intr_en	cp_intr_state	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_values[0]	auto[0]	auto[0]	2699138	1			T33	1496		T34	232		T1	42
all_values[0]	auto[0]	auto[1]	5779961	1			T1	55		T11	27842		T12	155
all_values[0]	auto[1]	auto[0]	616652	1			T1	18		T11	3246		T12	51
all_values[0]	auto[1]	auto[1]	5693967	1			T1	32		T11	28625		T12	644
all_values[1]	auto[0]	auto[0]	2693128	1			T33	1496		T34	232		T1	47
all_values[1]	auto[0]	auto[1]	5764575	1			T1	38		T11	28908		T12	260
all_values[1]	auto[1]	auto[0]	612885	1			T1	20		T11	2695		T12	57
all_values[1]	auto[1]	auto[1]	5719130	1			T1	42		T11	28587		T12	524
all_values[2]	auto[0]	auto[0]	2699928	1			T33	1496		T34	232		T1	40
all_values[2]	auto[0]	auto[1]	5735294	1			T1	68		T11	28269		T12	315
all_values[2]	auto[1]	auto[0]	620968	1			T1	16		T11	3003		T12	61
all_values[2]	auto[1]	auto[1]	5733528	1			T1	23		T11	28273		T12	441
all_values[3]	auto[0]	auto[0]	2712675	1			T33	1496		T34	232		T1	63
all_values[3]	auto[0]	auto[1]	5753881	1			T1	24		T11	27361		T12	285
all_values[3]	auto[1]	auto[0]	604832	1			T1	41		T11	2494		T12	21
all_values[3]	auto[1]	auto[1]	5718330	1			T1	19		T11	29698		T12	511
all_values[4]	auto[0]	auto[0]	2698227	1			T33	1496		T34	232		T1	41
all_values[4]	auto[0]	auto[1]	5755405	1			T1	42		T11	28661		T12	437
all_values[4]	auto[1]	auto[0]	617666	1			T1	26		T11	2981		T12	50
all_values[4]	auto[1]	auto[1]	5718420	1			T1	38		T11	28233		T12	326
all_values[5]	auto[0]	auto[0]	2699667	1			T33	1496		T34	232		T1	60
all_values[5]	auto[0]	auto[1]	5722623	1			T1	35		T11	26135		T12	539
all_values[5]	auto[1]	auto[0]	608689	1			T1	29		T11	3111		T12	22
all_values[5]	auto[1]	auto[1]	5758739	1			T1	23		T11	30552		T12	171
all_values[6]	auto[0]	auto[0]	2710874	1			T33	1496		T34	232		T1	51
all_values[6]	auto[0]	auto[1]	5749414	1			T1	35		T11	28622		T12	379
all_values[6]	auto[1]	auto[0]	610230	1			T1	40		T11	2446		T12	56
all_values[6]	auto[1]	auto[1]	5719200	1			T1	21		T11	28673		T12	365
all_values[7]	auto[0]	auto[0]	2698966	1			T33	1496		T34	232		T1	76
all_values[7]	auto[0]	auto[1]	5705509	1			T1	45		T11	28357		T12	309
all_values[7]	auto[1]	auto[0]	611029	1			T1	12		T11	3104		T12	19
all_values[7]	auto[1]	auto[1]	5774214	1			T1	14		T11	28007		T12	496
all_values[8]	auto[0]	auto[0]	2699311	1			T33	1496		T34	232		T1	45
all_values[8]	auto[0]	auto[1]	5752924	1			T1	47		T11	29392		T12	350
all_values[8]	auto[1]	auto[0]	612759	1			T1	22		T11	2866		T12	18
all_values[8]	auto[1]	auto[1]	5724724	1			T1	33		T11	26999		T12	477
all_values[9]	auto[0]	auto[0]	2710101	1			T33	1496		T34	232		T1	62
all_values[9]	auto[0]	auto[1]	5765082	1			T1	43		T11	28197		T12	420
all_values[9]	auto[1]	auto[0]	605729	1			T1	22		T11	2535		T12	16
all_values[9]	auto[1]	auto[1]	5708806	1			T1	20		T11	29106		T12	394
all_values[10]	auto[0]	auto[0]	2709003	1			T33	1496		T34	232		T1	62
all_values[10]	auto[0]	auto[1]	5731973	1			T1	35		T11	28502		T12	340
all_values[10]	auto[1]	auto[0]	607894	1			T1	10		T11	2674		T12	32
all_values[10]	auto[1]	auto[1]	5740848	1			T1	40		T11	28785		T12	474
all_values[11]	auto[0]	auto[0]	2700210	1			T33	1496		T34	232		T1	64
all_values[11]	auto[0]	auto[1]	5767836	1			T1	47		T11	30410		T12	382
all_values[11]	auto[1]	auto[0]	600912	1			T1	10		T11	3046		T12	36
all_values[11]	auto[1]	auto[1]	5720760	1			T1	26		T11	26634		T12	419
all_values[12]	auto[0]	auto[0]	2706560	1			T33	1496		T34	232		T1	78
all_values[12]	auto[0]	auto[1]	5762702	1			T1	32		T11	28626		T12	252
all_values[12]	auto[1]	auto[0]	611667	1			T1	19		T11	3161		T12	43
all_values[12]	auto[1]	auto[1]	5708789	1			T1	18		T11	28084		T12	543
all_values[13]	auto[0]	auto[0]	2703780	1			T33	1496		T34	232		T1	60
all_values[13]	auto[0]	auto[1]	5733602	1			T1	56		T11	28015		T12	492
all_values[13]	auto[1]	auto[0]	602698	1			T1	10		T11	2800		T12	39
all_values[13]	auto[1]	auto[1]	5749638	1			T1	21		T11	29125		T12	279
all_values[14]	auto[0]	auto[0]	2699143	1			T33	1496		T34	232		T1	54
all_values[14]	auto[0]	auto[1]	5739998	1			T1	38		T11	28977		T12	485
all_values[14]	auto[1]	auto[0]	617021	1			T1	18		T11	2765		T12	18
all_values[14]	auto[1]	auto[1]	5733556	1			T1	37		T11	28153		T12	297
all_values[15]	auto[0]	auto[0]	2693776	1			T33	1496		T34	232		T1	58
all_values[15]	auto[0]	auto[1]	5752712	1			T1	60		T11	27368		T12	420
all_values[15]	auto[1]	auto[0]	611209	1			T1	15		T11	3057		T12	12
all_values[15]	auto[1]	auto[1]	5732021	1			T1	14		T11	29634		T12	376
all_values[16]	auto[0]	auto[0]	2696948	1			T33	1496		T34	232		T1	53
all_values[16]	auto[0]	auto[1]	5738362	1			T1	32		T11	28683		T12	626
all_values[16]	auto[1]	auto[0]	605074	1			T1	25		T11	2731		T12	22
all_values[16]	auto[1]	auto[1]	5749334	1			T1	37		T11	28122		T12	178
all_values[17]	auto[0]	auto[0]	2700794	1			T33	1496		T34	232		T1	50
all_values[17]	auto[0]	auto[1]	5690199	1			T1	60		T11	28136		T12	465
all_values[17]	auto[1]	auto[0]	613815	1			T1	12		T11	2865		T12	18
all_values[17]	auto[1]	auto[1]	5784910	1			T1	25		T11	28988		T12	273
all_values[18]	auto[0]	auto[0]	2711303	1			T33	1496		T34	232		T1	60
all_values[18]	auto[0]	auto[1]	5725845	1			T1	35		T11	28058		T12	441
all_values[18]	auto[1]	auto[0]	606859	1			T1	15		T11	3444		T12	29
all_values[18]	auto[1]	auto[1]	5745711	1			T1	37		T11	27836		T12	372
all_values[19]	auto[0]	auto[0]	2706825	1			T33	1496		T34	232		T1	58
all_values[19]	auto[0]	auto[1]	5739967	1			T1	29		T11	28451		T12	492
all_values[19]	auto[1]	auto[0]	597391	1			T1	29		T11	2547		T12	46
all_values[19]	auto[1]	auto[1]	5745535	1			T1	31		T11	28622		T12	295
all_values[20]	auto[0]	auto[0]	2703149	1			T33	1496		T34	232		T1	59
all_values[20]	auto[0]	auto[1]	5732582	1			T1	45		T11	27587		T12	642
all_values[20]	auto[1]	auto[0]	606629	1			T1	16		T11	3518		T12	1
all_values[20]	auto[1]	auto[1]	5747358	1			T1	27		T11	28871		T12	191
all_values[21]	auto[0]	auto[0]	2700837	1			T33	1496		T34	232		T1	42
all_values[21]	auto[0]	auto[1]	5775386	1			T1	51		T11	28316		T12	560
all_values[21]	auto[1]	auto[0]	613970	1			T1	24		T11	2838		T12	20
all_values[21]	auto[1]	auto[1]	5699525	1			T1	30		T11	28700		T12	223
all_values[22]	auto[0]	auto[0]	2704930	1			T33	1496		T34	232		T1	52
all_values[22]	auto[0]	auto[1]	5725095	1			T1	60		T11	28312		T12	303
all_values[22]	auto[1]	auto[0]	613704	1			T1	22		T11	2956		T12	19
all_values[22]	auto[1]	auto[1]	5745989	1			T1	13		T11	28175		T12	486
all_values[23]	auto[0]	auto[0]	2705753	1			T33	1496		T34	232		T1	66
all_values[23]	auto[0]	auto[1]	5745207	1			T1	43		T11	27848		T12	296
all_values[23]	auto[1]	auto[0]	611000	1			T1	19		T11	3085		T12	43
all_values[23]	auto[1]	auto[1]	5727758	1			T1	19		T11	28317		T12	511
all_values[24]	auto[0]	auto[0]	2700147	1			T33	1496		T34	232		T1	71
all_values[24]	auto[0]	auto[1]	5760638	1			T1	36		T11	27887		T12	253
all_values[24]	auto[1]	auto[0]	610795	1			T1	27		T11	2918		T12	95
all_values[24]	auto[1]	auto[1]	5718138	1			T1	13		T11	29081		T12	483
all_values[25]	auto[0]	auto[0]	2692533	1			T33	1496		T34	232		T1	51
all_values[25]	auto[0]	auto[1]	5775559	1			T1	48		T11	30841		T12	333
all_values[25]	auto[1]	auto[0]	604302	1			T1	26		T11	2508		T12	26
all_values[25]	auto[1]	auto[1]	5717324	1			T1	22		T11	26549		T12	484
all_values[26]	auto[0]	auto[0]	2701727	1			T33	1496		T34	232		T1	45
all_values[26]	auto[0]	auto[1]	5754905	1			T1	34		T11	28794		T12	262
all_values[26]	auto[1]	auto[0]	608593	1			T1	30		T11	2778		T12	25
all_values[26]	auto[1]	auto[1]	5724493	1			T1	38		T11	28504		T12	538
all_values[27]	auto[0]	auto[0]	2703965	1			T33	1496		T34	232		T1	58
all_values[27]	auto[0]	auto[1]	5757865	1			T1	47		T11	28960		T12	594
all_values[27]	auto[1]	auto[0]	609551	1			T1	14		T11	2890		T12	6
all_values[27]	auto[1]	auto[1]	5718337	1			T1	28		T11	27194		T12	155
all_values[28]	auto[0]	auto[0]	2694767	1			T33	1496		T34	232		T1	43
all_values[28]	auto[0]	auto[1]	5749009	1			T1	39		T11	28567		T12	544
all_values[28]	auto[1]	auto[0]	610835	1			T1	17		T11	3234		T12	19
all_values[28]	auto[1]	auto[1]	5735107	1			T1	48		T11	27971		T12	199
all_values[29]	auto[0]	auto[0]	2704065	1			T33	1496		T34	232		T1	75
all_values[29]	auto[0]	auto[1]	5769223	1			T1	29		T11	27438		T12	258
all_values[29]	auto[1]	auto[0]	608513	1			T1	27		T11	2911		T12	46
all_values[29]	auto[1]	auto[1]	5707917	1			T1	16		T11	29443		T12	499
all_values[30]	auto[0]	auto[0]	2694369	1			T33	1496		T34	232		T1	48
all_values[30]	auto[0]	auto[1]	5744442	1			T1	58		T11	28589		T12	469
all_values[30]	auto[1]	auto[0]	609120	1			T1	17		T11	2823		T12	47
all_values[30]	auto[1]	auto[1]	5741787	1			T1	24		T11	28603		T12	310
all_values[31]	auto[0]	auto[0]	2705001	1			T33	1496		T34	232		T1	66
all_values[31]	auto[0]	auto[1]	5708269	1			T1	34		T11	27341		T12	564
all_values[31]	auto[1]	auto[0]	618558	1			T1	16		T11	3103		T12	12
all_values[31]	auto[1]	auto[1]	5757890	1			T1	31		T11	28764		T12	244