Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8452235 |
1 |
|
|
T33 |
1496 |
|
T34 |
232 |
|
T1 |
92 |
| auto[1] |
6337483 |
1 |
|
|
T1 |
55 |
|
T11 |
29865 |
|
T12 |
495 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
13972915 |
1 |
|
|
T33 |
1496 |
|
T34 |
232 |
|
T1 |
145 |
| auto[1] |
816803 |
1 |
|
|
T1 |
2 |
|
T11 |
4827 |
|
T12 |
68 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8424290 |
1 |
|
|
T33 |
1496 |
|
T34 |
232 |
|
T1 |
113 |
| auto[1] |
6365428 |
1 |
|
|
T1 |
34 |
|
T11 |
30807 |
|
T12 |
372 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
2784815 |
1 |
|
|
T1 |
14 |
|
T11 |
13460 |
|
T12 |
113 |
| auto[1] |
auto[0] |
auto[1] |
410426 |
1 |
|
|
T1 |
1 |
|
T11 |
2509 |
|
T12 |
25 |
| auto[1] |
auto[1] |
auto[0] |
2763810 |
1 |
|
|
T1 |
18 |
|
T11 |
12520 |
|
T12 |
191 |
| auto[1] |
auto[1] |
auto[1] |
406377 |
1 |
|
|
T1 |
1 |
|
T11 |
2318 |
|
T12 |
43 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |