Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7863058 |
1 |
|
|
T19 |
160 |
|
T20 |
1119 |
|
T21 |
946 |
| auto[1] |
5524613 |
1 |
|
|
T19 |
187 |
|
T20 |
1233 |
|
T22 |
40 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
12684629 |
1 |
|
|
T19 |
339 |
|
T20 |
2292 |
|
T21 |
946 |
| auto[1] |
703042 |
1 |
|
|
T19 |
8 |
|
T20 |
60 |
|
T25 |
30012 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7878067 |
1 |
|
|
T19 |
175 |
|
T20 |
1097 |
|
T21 |
946 |
| auto[1] |
5509604 |
1 |
|
|
T19 |
172 |
|
T20 |
1255 |
|
T22 |
14 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
2413160 |
1 |
|
|
T19 |
84 |
|
T20 |
551 |
|
T22 |
4 |
| auto[1] |
auto[0] |
auto[1] |
352641 |
1 |
|
|
T19 |
4 |
|
T20 |
27 |
|
T25 |
15070 |
| auto[1] |
auto[1] |
auto[0] |
2393402 |
1 |
|
|
T19 |
80 |
|
T20 |
644 |
|
T22 |
10 |
| auto[1] |
auto[1] |
auto[1] |
350401 |
1 |
|
|
T19 |
4 |
|
T20 |
33 |
|
T25 |
14942 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |