Summary for Variable intr_en
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
7854632 |
1 |
|
|
T19 |
170 |
|
T20 |
1170 |
|
T21 |
946 |
auto[1] |
5533039 |
1 |
|
|
T19 |
177 |
|
T20 |
1182 |
|
T22 |
17 |
Summary for Variable intr_state
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
11110348 |
1 |
|
|
T19 |
270 |
|
T20 |
1939 |
|
T21 |
946 |
auto[1] |
2277323 |
1 |
|
|
T19 |
77 |
|
T20 |
413 |
|
T22 |
15 |
Summary for Variable type_ctrl_en
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
7895902 |
1 |
|
|
T19 |
214 |
|
T20 |
947 |
|
T21 |
946 |
auto[1] |
5491769 |
1 |
|
|
T19 |
133 |
|
T20 |
1405 |
|
T22 |
28 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
TOTAL |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[1] |
auto[0] |
auto[0] |
1603222 |
1 |
|
|
T19 |
19 |
|
T20 |
485 |
|
T22 |
13 |
auto[1] |
auto[0] |
auto[1] |
1140035 |
1 |
|
|
T19 |
45 |
|
T20 |
204 |
|
T22 |
15 |
auto[1] |
auto[1] |
auto[0] |
1611224 |
1 |
|
|
T19 |
37 |
|
T20 |
507 |
|
T25 |
66893 |
auto[1] |
auto[1] |
auto[1] |
1137288 |
1 |
|
|
T19 |
32 |
|
T20 |
209 |
|
T25 |
43478 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
NAME | COUNT | STATUS |
intr_type_disabled |
0 |
Excluded |