Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7841736 |
1 |
|
|
T19 |
179 |
|
T20 |
1238 |
|
T21 |
946 |
| auto[1] |
5545935 |
1 |
|
|
T19 |
168 |
|
T20 |
1114 |
|
T22 |
24 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
11102652 |
1 |
|
|
T19 |
266 |
|
T20 |
2085 |
|
T21 |
946 |
| auto[1] |
2285019 |
1 |
|
|
T19 |
81 |
|
T20 |
267 |
|
T22 |
6 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7865159 |
1 |
|
|
T19 |
161 |
|
T20 |
1022 |
|
T21 |
946 |
| auto[1] |
5522512 |
1 |
|
|
T19 |
186 |
|
T20 |
1330 |
|
T22 |
17 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1614162 |
1 |
|
|
T19 |
51 |
|
T20 |
608 |
|
T22 |
11 |
| auto[1] |
auto[0] |
auto[1] |
1144651 |
1 |
|
|
T19 |
42 |
|
T20 |
155 |
|
T22 |
6 |
| auto[1] |
auto[1] |
auto[0] |
1623331 |
1 |
|
|
T19 |
54 |
|
T20 |
455 |
|
T25 |
74071 |
| auto[1] |
auto[1] |
auto[1] |
1140368 |
1 |
|
|
T19 |
39 |
|
T20 |
112 |
|
T25 |
46532 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |