Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7878496 |
1 |
|
|
T19 |
135 |
|
T20 |
1185 |
|
T21 |
946 |
| auto[1] |
5509175 |
1 |
|
|
T19 |
212 |
|
T20 |
1167 |
|
T22 |
14 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
12683026 |
1 |
|
|
T19 |
337 |
|
T20 |
2310 |
|
T21 |
946 |
| auto[1] |
704645 |
1 |
|
|
T19 |
10 |
|
T20 |
42 |
|
T22 |
1 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7867681 |
1 |
|
|
T19 |
202 |
|
T20 |
1185 |
|
T21 |
946 |
| auto[1] |
5519990 |
1 |
|
|
T19 |
145 |
|
T20 |
1167 |
|
T22 |
32 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
2435678 |
1 |
|
|
T19 |
45 |
|
T20 |
549 |
|
T22 |
31 |
| auto[1] |
auto[0] |
auto[1] |
357506 |
1 |
|
|
T19 |
1 |
|
T20 |
22 |
|
T22 |
1 |
| auto[1] |
auto[1] |
auto[0] |
2379667 |
1 |
|
|
T19 |
90 |
|
T20 |
576 |
|
T25 |
95400 |
| auto[1] |
auto[1] |
auto[1] |
347139 |
1 |
|
|
T19 |
9 |
|
T20 |
20 |
|
T25 |
14756 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |