Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7841967 |
1 |
|
|
T19 |
129 |
|
T20 |
1245 |
|
T21 |
946 |
| auto[1] |
5545704 |
1 |
|
|
T19 |
218 |
|
T20 |
1107 |
|
T22 |
11 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
12684155 |
1 |
|
|
T19 |
340 |
|
T20 |
2306 |
|
T21 |
946 |
| auto[1] |
703516 |
1 |
|
|
T19 |
7 |
|
T20 |
46 |
|
T25 |
31611 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7874763 |
1 |
|
|
T19 |
242 |
|
T20 |
955 |
|
T21 |
946 |
| auto[1] |
5512908 |
1 |
|
|
T19 |
105 |
|
T20 |
1397 |
|
T22 |
16 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
2392813 |
1 |
|
|
T19 |
48 |
|
T20 |
704 |
|
T22 |
11 |
| auto[1] |
auto[0] |
auto[1] |
349360 |
1 |
|
|
T19 |
3 |
|
T20 |
22 |
|
T25 |
14688 |
| auto[1] |
auto[1] |
auto[0] |
2416579 |
1 |
|
|
T19 |
50 |
|
T20 |
647 |
|
T22 |
5 |
| auto[1] |
auto[1] |
auto[1] |
354156 |
1 |
|
|
T19 |
4 |
|
T20 |
24 |
|
T25 |
16923 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |