Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7860436 |
1 |
|
|
T19 |
172 |
|
T20 |
1079 |
|
T21 |
946 |
| auto[1] |
5527235 |
1 |
|
|
T19 |
175 |
|
T20 |
1273 |
|
T22 |
22 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
12681501 |
1 |
|
|
T19 |
333 |
|
T20 |
2297 |
|
T21 |
946 |
| auto[1] |
706170 |
1 |
|
|
T19 |
14 |
|
T20 |
55 |
|
T25 |
32470 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7868112 |
1 |
|
|
T19 |
147 |
|
T20 |
1321 |
|
T21 |
946 |
| auto[1] |
5519559 |
1 |
|
|
T19 |
200 |
|
T20 |
1031 |
|
T22 |
21 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
2408482 |
1 |
|
|
T19 |
78 |
|
T20 |
520 |
|
T22 |
21 |
| auto[1] |
auto[0] |
auto[1] |
354199 |
1 |
|
|
T19 |
7 |
|
T20 |
32 |
|
T25 |
16288 |
| auto[1] |
auto[1] |
auto[0] |
2404907 |
1 |
|
|
T19 |
108 |
|
T20 |
456 |
|
T25 |
105484 |
| auto[1] |
auto[1] |
auto[1] |
351971 |
1 |
|
|
T19 |
7 |
|
T20 |
23 |
|
T25 |
16182 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |