Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7877339 |
1 |
|
|
T19 |
152 |
|
T20 |
1223 |
|
T21 |
946 |
| auto[1] |
5510332 |
1 |
|
|
T19 |
195 |
|
T20 |
1129 |
|
T22 |
27 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
12676564 |
1 |
|
|
T19 |
336 |
|
T20 |
2315 |
|
T21 |
946 |
| auto[1] |
711107 |
1 |
|
|
T19 |
11 |
|
T20 |
37 |
|
T25 |
32574 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7835074 |
1 |
|
|
T19 |
191 |
|
T20 |
1294 |
|
T21 |
946 |
| auto[1] |
5552597 |
1 |
|
|
T19 |
156 |
|
T20 |
1058 |
|
T22 |
32 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
2440302 |
1 |
|
|
T19 |
63 |
|
T20 |
502 |
|
T22 |
29 |
| auto[1] |
auto[0] |
auto[1] |
358528 |
1 |
|
|
T19 |
3 |
|
T20 |
18 |
|
T25 |
15804 |
| auto[1] |
auto[1] |
auto[0] |
2401188 |
1 |
|
|
T19 |
82 |
|
T20 |
519 |
|
T22 |
3 |
| auto[1] |
auto[1] |
auto[1] |
352579 |
1 |
|
|
T19 |
8 |
|
T20 |
19 |
|
T25 |
16770 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |