Unified Coverage Report :: Group :: cip_base_pkg::intr_test_cg::SHAPE{(num_interrupts - 1)=31}

Group : cip_base_pkg::intr_test_cg::SHAPE{(num_interrupts - 1)=31}

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_cip_lib_0/cip_base_env_cov.sv

---

Summary for Group cip_base_pkg::intr_test_cg::SHAPE{(num_interrupts - 1)=31}

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	38	0	38	100.00
Crosses	192	0	192	100.00

Variables for Group cip_base_pkg::intr_test_cg::SHAPE{(num_interrupts - 1)=31}

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_intr	32	0	32	100.00	100	1	1	0
cp_intr_en	2	0	2	100.00	100	1	1	2
cp_intr_state	2	0	2	100.00	100	1	1	2
cp_intr_test	2	0	2	100.00	100	1	1	2

Crosses for Group cip_base_pkg::intr_test_cg::SHAPE{(num_interrupts - 1)=31}

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
intr_test_cg_cc	192	0	192	100.00	100	1	1	0

Summary for Variable cp_intr

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	32	0	32	100.00

User Defined Bins for cp_intr

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_values[0]	11435373	1			T21	589		T22	1858		T23	28
all_values[1]	11435373	1			T21	589		T22	1858		T23	28
all_values[2]	11435373	1			T21	589		T22	1858		T23	28
all_values[3]	11435373	1			T21	589		T22	1858		T23	28
all_values[4]	11435373	1			T21	589		T22	1858		T23	28
all_values[5]	11435373	1			T21	589		T22	1858		T23	28
all_values[6]	11435373	1			T21	589		T22	1858		T23	28
all_values[7]	11435373	1			T21	589		T22	1858		T23	28
all_values[8]	11435373	1			T21	589		T22	1858		T23	28
all_values[9]	11435373	1			T21	589		T22	1858		T23	28
all_values[10]	11435373	1			T21	589		T22	1858		T23	28
all_values[11]	11435373	1			T21	589		T22	1858		T23	28
all_values[12]	11435373	1			T21	589		T22	1858		T23	28
all_values[13]	11435373	1			T21	589		T22	1858		T23	28
all_values[14]	11435373	1			T21	589		T22	1858		T23	28
all_values[15]	11435373	1			T21	589		T22	1858		T23	28
all_values[16]	11435373	1			T21	589		T22	1858		T23	28
all_values[17]	11435373	1			T21	589		T22	1858		T23	28
all_values[18]	11435373	1			T21	589		T22	1858		T23	28
all_values[19]	11435373	1			T21	589		T22	1858		T23	28
all_values[20]	11435373	1			T21	589		T22	1858		T23	28
all_values[21]	11435373	1			T21	589		T22	1858		T23	28
all_values[22]	11435373	1			T21	589		T22	1858		T23	28
all_values[23]	11435373	1			T21	589		T22	1858		T23	28
all_values[24]	11435373	1			T21	589		T22	1858		T23	28
all_values[25]	11435373	1			T21	589		T22	1858		T23	28
all_values[26]	11435373	1			T21	589		T22	1858		T23	28
all_values[27]	11435373	1			T21	589		T22	1858		T23	28
all_values[28]	11435373	1			T21	589		T22	1858		T23	28
all_values[29]	11435373	1			T21	589		T22	1858		T23	28
all_values[30]	11435373	1			T21	589		T22	1858		T23	28
all_values[31]	11435373	1			T21	589		T22	1858		T23	28

---

Summary for Variable cp_intr_en

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_intr_en

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

218026379

1

T21

11255

T22

30233

T23

896

auto[1]

147905557

1

T21

7593

T22

29223

T25

1414

---

Summary for Variable cp_intr_state

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_intr_state

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

98832765

1

T21

2474

T22

6672

T23

896

auto[1]

267099171

1

T21

16374

T22

52784

T25

1736

---

Summary for Variable cp_intr_test

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_intr_test

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

362052237

1

T21

18848

T22

59456

T23

896

auto[1]

3879699

1

T25

214

T26

94

T27

205

---

Summary for Cross intr_test_cg_cc

Samples crossed: cp_intr cp_intr_test cp_intr_en cp_intr_state

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
TOTAL	192	0	192	100.00
Automatically Generated Cross Bins	192	0	192	100.00
User Defined Cross Bins	0	0	0

Automatically Generated Cross Bins for intr_test_cg_cc

Bins

cp_intr	cp_intr_test	cp_intr_en	cp_intr_state	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_values[0]	auto[0]	auto[0]	auto[0]	2633826	1			T21	29		T22	147		T23	28
all_values[0]	auto[0]	auto[0]	auto[1]	4108433	1			T21	301		T22	985		T25	41
all_values[0]	auto[0]	auto[1]	auto[0]	458201	1			T21	12		T22	89		T25	16
all_values[0]	auto[0]	auto[1]	auto[1]	4113748	1			T21	247		T22	637		T25	9
all_values[0]	auto[1]	auto[0]	auto[1]	60913	1			T25	4		T26	2		T27	5
all_values[0]	auto[1]	auto[1]	auto[1]	60252	1			T25	1		T26	1		T29	322
all_values[1]	auto[0]	auto[0]	auto[0]	2633039	1			T21	28		T22	145		T23	28
all_values[1]	auto[0]	auto[0]	auto[1]	4130015	1			T21	225		T22	862		T25	28
all_values[1]	auto[0]	auto[1]	auto[0]	453057	1			T21	21		T22	57		T25	26
all_values[1]	auto[0]	auto[1]	auto[1]	4097895	1			T21	315		T22	794		T25	28
all_values[1]	auto[1]	auto[0]	auto[1]	60996	1			T25	4		T26	3		T27	2
all_values[1]	auto[1]	auto[1]	auto[1]	60371	1			T25	1		T29	328		T47	1
all_values[2]	auto[0]	auto[0]	auto[0]	2631843	1			T21	31		T22	81		T23	28
all_values[2]	auto[0]	auto[0]	auto[1]	4105089	1			T21	451		T22	1043		T25	23
all_values[2]	auto[0]	auto[1]	auto[0]	455221	1			T21	28		T22	32		T25	20
all_values[2]	auto[0]	auto[1]	auto[1]	4122128	1			T21	79		T22	702		T25	35
all_values[2]	auto[1]	auto[0]	auto[1]	60569	1			T25	3		T26	3		T27	5
all_values[2]	auto[1]	auto[1]	auto[1]	60523	1			T25	3		T27	1		T29	282
all_values[3]	auto[0]	auto[0]	auto[0]	2635641	1			T21	56		T22	99		T23	28
all_values[3]	auto[0]	auto[0]	auto[1]	4135696	1			T21	336		T22	787		T25	26
all_values[3]	auto[0]	auto[1]	auto[0]	458016	1			T21	90		T22	116		T25	25
all_values[3]	auto[0]	auto[1]	auto[1]	4084625	1			T21	107		T22	856		T25	13
all_values[3]	auto[1]	auto[0]	auto[1]	61161	1			T25	6		T27	2		T29	316
all_values[3]	auto[1]	auto[1]	auto[1]	60234	1			T25	3		T26	1		T27	6
all_values[4]	auto[0]	auto[0]	auto[0]	2632188	1			T21	26		T22	42		T23	28
all_values[4]	auto[0]	auto[0]	auto[1]	4104291	1			T21	293		T22	686		T25	24
all_values[4]	auto[0]	auto[1]	auto[0]	456531	1			T21	55		T22	90		T25	28
all_values[4]	auto[0]	auto[1]	auto[1]	4120892	1			T21	215		T22	1040		T25	26
all_values[4]	auto[1]	auto[0]	auto[1]	61104	1			T25	3		T26	2		T27	5
all_values[4]	auto[1]	auto[1]	auto[1]	60367	1			T25	4		T26	1		T27	4
all_values[5]	auto[0]	auto[0]	auto[0]	2636138	1			T21	82		T22	104		T23	28
all_values[5]	auto[0]	auto[0]	auto[1]	4119006	1			T21	364		T22	848		T25	25
all_values[5]	auto[0]	auto[1]	auto[0]	454677	1			T21	18		T22	96		T25	19
all_values[5]	auto[0]	auto[1]	auto[1]	4104224	1			T21	125		T22	810		T25	14
all_values[5]	auto[1]	auto[0]	auto[1]	60916	1			T25	4		T26	2		T27	3
all_values[5]	auto[1]	auto[1]	auto[1]	60412	1			T25	1		T26	2		T27	4
all_values[6]	auto[0]	auto[0]	auto[0]	2637573	1			T21	82		T22	105		T23	28
all_values[6]	auto[0]	auto[0]	auto[1]	4099621	1			T21	329		T22	1249		T25	37
all_values[6]	auto[0]	auto[1]	auto[0]	459026	1			T21	31		T22	54		T25	29
all_values[6]	auto[0]	auto[1]	auto[1]	4117673	1			T21	147		T22	450		T25	12
all_values[6]	auto[1]	auto[0]	auto[1]	60990	1			T25	4		T26	4		T27	5
all_values[6]	auto[1]	auto[1]	auto[1]	60490	1			T25	4		T26	1		T27	4
all_values[7]	auto[0]	auto[0]	auto[0]	2641252	1			T21	19		T22	146		T23	28
all_values[7]	auto[0]	auto[0]	auto[1]	4125746	1			T21	234		T22	876		T25	25
all_values[7]	auto[0]	auto[1]	auto[0]	453461	1			T21	16		T22	155		T25	23
all_values[7]	auto[0]	auto[1]	auto[1]	4093909	1			T21	320		T22	681		T25	7
all_values[7]	auto[1]	auto[0]	auto[1]	60641	1			T25	5		T26	3		T27	2
all_values[7]	auto[1]	auto[1]	auto[1]	60364	1			T25	2		T26	1		T27	4
all_values[8]	auto[0]	auto[0]	auto[0]	2639483	1			T21	73		T22	172		T23	28
all_values[8]	auto[0]	auto[0]	auto[1]	4131720	1			T21	234		T22	831		T25	22
all_values[8]	auto[0]	auto[1]	auto[0]	449454	1			T21	42		T22	88		T25	25
all_values[8]	auto[0]	auto[1]	auto[1]	4093703	1			T21	240		T22	767		T25	14
all_values[8]	auto[1]	auto[0]	auto[1]	61071	1			T25	7		T26	2		T27	5
all_values[8]	auto[1]	auto[1]	auto[1]	59942	1			T25	1		T26	1		T27	2
all_values[9]	auto[0]	auto[0]	auto[0]	2630282	1			T21	34		T22	102		T23	28
all_values[9]	auto[0]	auto[0]	auto[1]	4108774	1			T21	100		T22	891		T25	20
all_values[9]	auto[0]	auto[1]	auto[0]	455884	1			T21	74		T22	42		T25	48
all_values[9]	auto[0]	auto[1]	auto[1]	4119250	1			T21	381		T22	823		T25	21
all_values[9]	auto[1]	auto[0]	auto[1]	60591	1			T25	4		T26	3		T27	3
all_values[9]	auto[1]	auto[1]	auto[1]	60592	1			T25	3		T26	1		T27	4
all_values[10]	auto[0]	auto[0]	auto[0]	2629011	1			T21	40		T22	136		T23	28
all_values[10]	auto[0]	auto[0]	auto[1]	4122917	1			T21	341		T22	621		T25	65
all_values[10]	auto[0]	auto[1]	auto[0]	452834	1			T21	17		T22	187		T25	6
all_values[10]	auto[0]	auto[1]	auto[1]	4109833	1			T21	191		T22	914		T25	4
all_values[10]	auto[1]	auto[0]	auto[1]	60642	1			T25	7		T27	3		T29	315
all_values[10]	auto[1]	auto[1]	auto[1]	60136	1			T25	2		T27	3		T29	316
all_values[11]	auto[0]	auto[0]	auto[0]	2632354	1			T21	56		T22	105		T23	28
all_values[11]	auto[0]	auto[0]	auto[1]	4096400	1			T21	358		T22	830		T25	24
all_values[11]	auto[0]	auto[1]	auto[0]	459158	1			T21	23		T22	111		T25	25
all_values[11]	auto[0]	auto[1]	auto[1]	4126027	1			T21	152		T22	812		T25	13
all_values[11]	auto[1]	auto[0]	auto[1]	61102	1			T25	3		T26	2		T27	2
all_values[11]	auto[1]	auto[1]	auto[1]	60332	1			T25	3		T26	3		T27	6
all_values[12]	auto[0]	auto[0]	auto[0]	2632208	1			T21	35		T22	51		T23	28
all_values[12]	auto[0]	auto[0]	auto[1]	4118745	1			T21	337		T22	490		T25	35
all_values[12]	auto[0]	auto[1]	auto[0]	464242	1			T21	28		T22	101		T25	40
all_values[12]	auto[0]	auto[1]	auto[1]	4099010	1			T21	189		T22	1216		T25	8
all_values[12]	auto[1]	auto[0]	auto[1]	60411	1			T25	5		T26	1		T27	4
all_values[12]	auto[1]	auto[1]	auto[1]	60757	1			T25	4		T26	2		T29	299
all_values[13]	auto[0]	auto[0]	auto[0]	2628433	1			T21	74		T22	124		T23	28
all_values[13]	auto[0]	auto[0]	auto[1]	4115403	1			T21	392		T22	882		T25	29
all_values[13]	auto[0]	auto[1]	auto[0]	452805	1			T21	6		T22	135		T25	29
all_values[13]	auto[0]	auto[1]	auto[1]	4117753	1			T21	117		T22	717		T25	20
all_values[13]	auto[1]	auto[0]	auto[1]	60804	1			T25	4		T26	2		T27	4
all_values[13]	auto[1]	auto[1]	auto[1]	60175	1			T25	3		T26	1		T27	2
all_values[14]	auto[0]	auto[0]	auto[0]	2623850	1			T21	48		T22	86		T23	28
all_values[14]	auto[0]	auto[0]	auto[1]	4114589	1			T21	394		T22	955		T25	31
all_values[14]	auto[0]	auto[1]	auto[0]	450365	1			T21	29		T22	66		T25	19
all_values[14]	auto[0]	auto[1]	auto[1]	4125195	1			T21	118		T22	751		T25	29
all_values[14]	auto[1]	auto[0]	auto[1]	60604	1			T25	5		T26	2		T27	5
all_values[14]	auto[1]	auto[1]	auto[1]	60770	1			T25	3		T27	2		T29	325
all_values[15]	auto[0]	auto[0]	auto[0]	2629123	1			T21	74		T22	198		T23	28
all_values[15]	auto[0]	auto[0]	auto[1]	4134073	1			T21	410		T22	962		T25	40
all_values[15]	auto[0]	auto[1]	auto[0]	455095	1			T21	18		T22	178		T25	43
all_values[15]	auto[0]	auto[1]	auto[1]	4095417	1			T21	87		T22	520		T25	14
all_values[15]	auto[1]	auto[0]	auto[1]	61015	1			T25	4		T26	1		T27	3
all_values[15]	auto[1]	auto[1]	auto[1]	60650	1			T25	2		T26	2		T27	3
all_values[16]	auto[0]	auto[0]	auto[0]	2632016	1			T21	78		T22	103		T23	28
all_values[16]	auto[0]	auto[0]	auto[1]	4121060	1			T21	249		T22	760		T25	31
all_values[16]	auto[0]	auto[1]	auto[0]	457844	1			T21	10		T22	62		T25	29
all_values[16]	auto[0]	auto[1]	auto[1]	4103501	1			T21	252		T22	933		T25	19
all_values[16]	auto[1]	auto[0]	auto[1]	60586	1			T25	2		T26	3		T27	4
all_values[16]	auto[1]	auto[1]	auto[1]	60366	1			T25	3		T26	1		T27	5
all_values[17]	auto[0]	auto[0]	auto[0]	2629273	1			T21	48		T22	103		T23	28
all_values[17]	auto[0]	auto[0]	auto[1]	4096684	1			T21	347		T22	871		T25	38
all_values[17]	auto[0]	auto[1]	auto[0]	454357	1			T21	51		T22	63		T25	23
all_values[17]	auto[0]	auto[1]	auto[1]	4133652	1			T21	143		T22	821		T25	20
all_values[17]	auto[1]	auto[0]	auto[1]	60889	1			T25	7		T26	4		T27	3
all_values[17]	auto[1]	auto[1]	auto[1]	60518	1			T25	2		T27	2		T29	372
all_values[18]	auto[0]	auto[0]	auto[0]	2630280	1			T21	54		T22	96		T23	28
all_values[18]	auto[0]	auto[0]	auto[1]	4158575	1			T21	95		T22	718		T25	26
all_values[18]	auto[0]	auto[1]	auto[0]	452614	1			T21	73		T22	106		T25	15
all_values[18]	auto[0]	auto[1]	auto[1]	4072740	1			T21	367		T22	938		T25	20
all_values[18]	auto[1]	auto[0]	auto[1]	60749	1			T26	2		T27	3		T29	296
all_values[18]	auto[1]	auto[1]	auto[1]	60415	1			T25	5		T27	3		T29	328
all_values[19]	auto[0]	auto[0]	auto[0]	2631201	1			T21	29		T22	76		T23	28
all_values[19]	auto[0]	auto[0]	auto[1]	4100784	1			T21	224		T22	709		T25	19
all_values[19]	auto[0]	auto[1]	auto[0]	455403	1			T21	30		T22	51		T25	24
all_values[19]	auto[0]	auto[1]	auto[1]	4126324	1			T21	306		T22	1022		T25	25
all_values[19]	auto[1]	auto[0]	auto[1]	60525	1			T25	4		T26	1		T27	3
all_values[19]	auto[1]	auto[1]	auto[1]	61136	1			T25	3		T26	1		T27	1
all_values[20]	auto[0]	auto[0]	auto[0]	2635000	1			T21	9		T22	125		T23	28
all_values[20]	auto[0]	auto[0]	auto[1]	4127279	1			T21	259		T22	766		T25	19
all_values[20]	auto[0]	auto[1]	auto[0]	457491	1			T21	28		T22	89		T25	37
all_values[20]	auto[0]	auto[1]	auto[1]	4094338	1			T21	293		T22	878		T25	19
all_values[20]	auto[1]	auto[0]	auto[1]	60984	1			T25	4		T27	3		T29	287
all_values[20]	auto[1]	auto[1]	auto[1]	60281	1			T25	3		T26	1		T27	6
all_values[21]	auto[0]	auto[0]	auto[0]	2637266	1			T21	47		T22	165		T23	28
all_values[21]	auto[0]	auto[0]	auto[1]	4123987	1			T21	365		T22	1014		T25	35
all_values[21]	auto[0]	auto[1]	auto[0]	451086	1			T22	94		T25	13		T26	3
all_values[21]	auto[0]	auto[1]	auto[1]	4101792	1			T21	177		T22	585		T25	17
all_values[21]	auto[1]	auto[0]	auto[1]	60781	1			T25	5		T26	3		T27	6
all_values[21]	auto[1]	auto[1]	auto[1]	60461	1			T27	1		T29	319		T47	1
all_values[22]	auto[0]	auto[0]	auto[0]	2647301	1			T21	76		T22	54		T23	28
all_values[22]	auto[0]	auto[0]	auto[1]	4123171	1			T21	332		T22	871		T25	12
all_values[22]	auto[0]	auto[1]	auto[0]	454499	1			T21	19		T22	46		T25	16
all_values[22]	auto[0]	auto[1]	auto[1]	4089080	1			T21	162		T22	887		T25	26
all_values[22]	auto[1]	auto[0]	auto[1]	60950	1			T25	2		T26	1		T27	3
all_values[22]	auto[1]	auto[1]	auto[1]	60372	1			T25	2		T26	3		T29	336
all_values[23]	auto[0]	auto[0]	auto[0]	2633187	1			T21	89		T22	149		T23	28
all_values[23]	auto[0]	auto[0]	auto[1]	4127910	1			T21	388		T22	749		T25	34
all_values[23]	auto[0]	auto[1]	auto[0]	452977	1			T21	3		T22	166		T25	28
all_values[23]	auto[0]	auto[1]	auto[1]	4100467	1			T21	109		T22	794		T25	20
all_values[23]	auto[1]	auto[0]	auto[1]	60625	1			T25	5		T26	3		T27	3
all_values[23]	auto[1]	auto[1]	auto[1]	60207	1			T25	3		T27	6		T29	300
all_values[24]	auto[0]	auto[0]	auto[0]	2635427	1			T21	51		T22	77		T23	28
all_values[24]	auto[0]	auto[0]	auto[1]	4126972	1			T21	464		T22	825		T25	49
all_values[24]	auto[0]	auto[1]	auto[0]	447523	1			T22	120		T25	9		T26	4
all_values[24]	auto[0]	auto[1]	auto[1]	4104041	1			T21	74		T22	836		T25	1
all_values[24]	auto[1]	auto[0]	auto[1]	60871	1			T25	8		T26	2		T27	5
all_values[24]	auto[1]	auto[1]	auto[1]	60539	1			T25	1		T26	1		T27	1
all_values[25]	auto[0]	auto[0]	auto[0]	2637486	1			T21	24		T22	93		T23	28
all_values[25]	auto[0]	auto[0]	auto[1]	4118991	1			T21	411		T22	939		T25	41
all_values[25]	auto[0]	auto[1]	auto[0]	448505	1			T21	33		T22	128		T25	22
all_values[25]	auto[0]	auto[1]	auto[1]	4109362	1			T21	121		T22	698		T25	7
all_values[25]	auto[1]	auto[0]	auto[1]	60954	1			T25	4		T26	2		T27	3
all_values[25]	auto[1]	auto[1]	auto[1]	60075	1			T25	1		T26	1		T27	6
all_values[26]	auto[0]	auto[0]	auto[0]	2638796	1			T21	21		T22	87		T23	28
all_values[26]	auto[0]	auto[0]	auto[1]	4109689	1			T21	220		T22	863		T25	33
all_values[26]	auto[0]	auto[1]	auto[0]	452844	1			T21	43		T22	62		T25	14
all_values[26]	auto[0]	auto[1]	auto[1]	4112900	1			T21	305		T22	846		T25	23
all_values[26]	auto[1]	auto[0]	auto[1]	61172	1			T25	3		T26	3		T27	2
all_values[26]	auto[1]	auto[1]	auto[1]	59972	1			T25	1		T27	3		T29	340
all_values[27]	auto[0]	auto[0]	auto[0]	2628801	1			T21	106		T22	175		T23	28
all_values[27]	auto[0]	auto[0]	auto[1]	4119588	1			T21	319		T22	776		T25	40
all_values[27]	auto[0]	auto[1]	auto[0]	454113	1			T21	22		T22	116		T25	22
all_values[27]	auto[0]	auto[1]	auto[1]	4111476	1			T21	142		T22	791		T25	14
all_values[27]	auto[1]	auto[0]	auto[1]	61340	1			T25	5		T26	1		T27	4
all_values[27]	auto[1]	auto[1]	auto[1]	60055	1			T27	3		T29	309		T47	2
all_values[28]	auto[0]	auto[0]	auto[0]	2637412	1			T21	47		T22	122		T23	28
all_values[28]	auto[0]	auto[0]	auto[1]	4127558	1			T21	229		T22	694		T25	18
all_values[28]	auto[0]	auto[1]	auto[0]	459469	1			T21	49		T22	98		T25	44
all_values[28]	auto[0]	auto[1]	auto[1]	4089564	1			T21	264		T22	944		T25	8
all_values[28]	auto[1]	auto[0]	auto[1]	60602	1			T25	4		T26	2		T27	4
all_values[28]	auto[1]	auto[1]	auto[1]	60768	1			T25	2		T26	1		T27	5
all_values[29]	auto[0]	auto[0]	auto[0]	2636270	1			T21	29		T22	53		T23	28
all_values[29]	auto[0]	auto[0]	auto[1]	4139448	1			T21	292		T22	447		T25	28
all_values[29]	auto[0]	auto[1]	auto[0]	453912	1			T21	25		T22	135		T25	37
all_values[29]	auto[0]	auto[1]	auto[1]	4084462	1			T21	243		T22	1223		T25	9
all_values[29]	auto[1]	auto[0]	auto[1]	61090	1			T25	6		T26	2		T27	2
all_values[29]	auto[1]	auto[1]	auto[1]	60191	1			T25	1		T26	1		T27	1
all_values[30]	auto[0]	auto[0]	auto[0]	2634280	1			T21	14		T22	119		T23	28
all_values[30]	auto[0]	auto[0]	auto[1]	4117289	1			T21	177		T22	969		T25	20
all_values[30]	auto[0]	auto[1]	auto[0]	457687	1			T21	7		T22	52		T25	15
all_values[30]	auto[0]	auto[1]	auto[1]	4104895	1			T21	391		T22	718		T25	35
all_values[30]	auto[1]	auto[0]	auto[1]	61118	1			T25	5		T26	2		T27	4
all_values[30]	auto[1]	auto[1]	auto[1]	60104	1			T25	3		T26	1		T27	2
all_values[31]	auto[0]	auto[0]	auto[0]	2631457	1			T21	46		T22	144		T23	28
all_values[31]	auto[0]	auto[0]	auto[1]	4087549	1			T21	230		T22	880		T25	37
all_values[31]	auto[0]	auto[1]	auto[0]	452717	1			T21	18		T22	103		T25	24
all_values[31]	auto[0]	auto[1]	auto[1]	4142544	1			T21	295		T22	731		T25	17
all_values[31]	auto[1]	auto[0]	auto[1]	60864	1			T25	4		T26	3		T27	4
all_values[31]	auto[1]	auto[1]	auto[1]	60242	1			T25	4		T27	1		T29	326

User Defined Cross Bins for intr_test_cg_cc

Excluded/Illegal bins

NAME	COUNT	STATUS
test_1_state_0	0	Illegal