Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
6798184 |
1 |
|
|
T21 |
411 |
|
T22 |
1354 |
|
T23 |
28 |
| auto[1] |
4637189 |
1 |
|
|
T21 |
178 |
|
T22 |
504 |
|
T25 |
45 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
10844723 |
1 |
|
|
T21 |
524 |
|
T22 |
1660 |
|
T23 |
28 |
| auto[1] |
590650 |
1 |
|
|
T21 |
65 |
|
T22 |
198 |
|
T29 |
3349 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
6802565 |
1 |
|
|
T21 |
246 |
|
T22 |
861 |
|
T23 |
28 |
| auto[1] |
4632808 |
1 |
|
|
T21 |
343 |
|
T22 |
997 |
|
T25 |
31 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
2016205 |
1 |
|
|
T21 |
209 |
|
T22 |
558 |
|
T25 |
16 |
| auto[1] |
auto[0] |
auto[1] |
294154 |
1 |
|
|
T21 |
49 |
|
T22 |
141 |
|
T29 |
1540 |
| auto[1] |
auto[1] |
auto[0] |
2025953 |
1 |
|
|
T21 |
69 |
|
T22 |
241 |
|
T25 |
15 |
| auto[1] |
auto[1] |
auto[1] |
296496 |
1 |
|
|
T21 |
16 |
|
T22 |
57 |
|
T29 |
1809 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |