Group : cip_base_pkg::intr_cg::SHAPE{(num_interrupts - 1)=31}
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Group : cip_base_pkg::intr_cg::SHAPE{(num_interrupts - 1)=31}
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_cip_lib_0/cip_base_env_cov.sv



Summary for Group cip_base_pkg::intr_cg::SHAPE{(num_interrupts - 1)=31}

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 36 0 36 100.00
Crosses 128 0 128 100.00


Variables for Group cip_base_pkg::intr_cg::SHAPE{(num_interrupts - 1)=31}
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_intr 32 0 32 100.00 100 1 1 0
cp_intr_en 2 0 2 100.00 100 1 1 2
cp_intr_state 2 0 2 100.00 100 1 1 2


Crosses for Group cip_base_pkg::intr_cg::SHAPE{(num_interrupts - 1)=31}
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
intr_cg_cc 128 0 128 100.00 100 1 1 0


Summary for Variable cp_intr

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 32 0 32 100.00


User Defined Bins for cp_intr

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_values[0] 15542243 1 T24 257 T25 137982 T26 301
all_values[1] 15542243 1 T24 257 T25 137982 T26 301
all_values[2] 15542243 1 T24 257 T25 137982 T26 301
all_values[3] 15542243 1 T24 257 T25 137982 T26 301
all_values[4] 15542243 1 T24 257 T25 137982 T26 301
all_values[5] 15542243 1 T24 257 T25 137982 T26 301
all_values[6] 15542243 1 T24 257 T25 137982 T26 301
all_values[7] 15542243 1 T24 257 T25 137982 T26 301
all_values[8] 15542243 1 T24 257 T25 137982 T26 301
all_values[9] 15542243 1 T24 257 T25 137982 T26 301
all_values[10] 15542243 1 T24 257 T25 137982 T26 301
all_values[11] 15542243 1 T24 257 T25 137982 T26 301
all_values[12] 15542243 1 T24 257 T25 137982 T26 301
all_values[13] 15542243 1 T24 257 T25 137982 T26 301
all_values[14] 15542243 1 T24 257 T25 137982 T26 301
all_values[15] 15542243 1 T24 257 T25 137982 T26 301
all_values[16] 15542243 1 T24 257 T25 137982 T26 301
all_values[17] 15542243 1 T24 257 T25 137982 T26 301
all_values[18] 15542243 1 T24 257 T25 137982 T26 301
all_values[19] 15542243 1 T24 257 T25 137982 T26 301
all_values[20] 15542243 1 T24 257 T25 137982 T26 301
all_values[21] 15542243 1 T24 257 T25 137982 T26 301
all_values[22] 15542243 1 T24 257 T25 137982 T26 301
all_values[23] 15542243 1 T24 257 T25 137982 T26 301
all_values[24] 15542243 1 T24 257 T25 137982 T26 301
all_values[25] 15542243 1 T24 257 T25 137982 T26 301
all_values[26] 15542243 1 T24 257 T25 137982 T26 301
all_values[27] 15542243 1 T24 257 T25 137982 T26 301
all_values[28] 15542243 1 T24 257 T25 137982 T26 301
all_values[29] 15542243 1 T24 257 T25 137982 T26 301
all_values[30] 15542243 1 T24 257 T25 137982 T26 301
all_values[31] 15542243 1 T24 257 T25 137982 T26 301



Summary for Variable cp_intr_en

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_intr_en

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 282920145 1 T24 8224 T25 222573 T26 4761
auto[1] 214431631 1 T25 218969 T26 4871 T31 1150



Summary for Variable cp_intr_state

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_intr_state

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 109687263 1 T24 8224 T25 440662 T26 1811
auto[1] 387664513 1 T25 397476 T26 7821 T31 2091



Summary for Cross intr_cg_cc

Samples crossed: cp_intr cp_intr_en cp_intr_state
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 128 0 128 100.00


Automatically Generated Cross Bins for intr_cg_cc

Bins
cp_intrcp_intr_encp_intr_stateCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_values[0] auto[0] auto[0] 2783620 1 T24 257 T25 7177 T26 24
all_values[0] auto[0] auto[1] 6048236 1 T25 63939 T26 74 T31 16
all_values[0] auto[1] auto[0] 648477 1 T25 6733 T26 39 T31 4
all_values[0] auto[1] auto[1] 6061910 1 T25 60133 T26 164 T31 51
all_values[1] auto[0] auto[0] 2770579 1 T24 257 T25 7221 T26 23
all_values[1] auto[0] auto[1] 6049345 1 T25 61176 T26 124 T31 51
all_values[1] auto[1] auto[0] 658732 1 T25 6432 T26 28 T21 8
all_values[1] auto[1] auto[1] 6063587 1 T25 63153 T26 126 T31 20
all_values[2] auto[0] auto[0] 2781240 1 T24 257 T25 7419 T26 8
all_values[2] auto[0] auto[1] 6064105 1 T25 60671 T26 136 T31 54
all_values[2] auto[1] auto[0] 648258 1 T25 6026 T26 26 T21 3
all_values[2] auto[1] auto[1] 6048640 1 T25 63866 T26 131 T31 17
all_values[3] auto[0] auto[0] 2773734 1 T24 257 T25 7007 T26 37
all_values[3] auto[0] auto[1] 6066869 1 T25 62868 T26 156 T31 42
all_values[3] auto[1] auto[0] 650834 1 T25 5904 T26 23 T21 2
all_values[3] auto[1] auto[1] 6050806 1 T25 62203 T26 85 T31 30
all_values[4] auto[0] auto[0] 2776688 1 T24 257 T25 6985 T26 23
all_values[4] auto[0] auto[1] 6057716 1 T25 60556 T26 130 T31 42
all_values[4] auto[1] auto[0] 650348 1 T25 6558 T26 48 T31 6
all_values[4] auto[1] auto[1] 6057491 1 T25 63883 T26 100 T31 18
all_values[5] auto[0] auto[0] 2768690 1 T24 257 T25 7809 T26 55
all_values[5] auto[0] auto[1] 6095636 1 T25 61760 T26 92 T31 1
all_values[5] auto[1] auto[0] 653636 1 T25 6518 T26 28 T31 1
all_values[5] auto[1] auto[1] 6024281 1 T25 61895 T26 126 T31 70
all_values[6] auto[0] auto[0] 2773087 1 T24 257 T25 7153 T26 43
all_values[6] auto[0] auto[1] 6050259 1 T25 60168 T26 100 T31 49
all_values[6] auto[1] auto[0] 650369 1 T25 6479 T26 30 T1 1108
all_values[6] auto[1] auto[1] 6068528 1 T25 64182 T26 128 T31 12
all_values[7] auto[0] auto[0] 2778921 1 T24 257 T25 7362 T26 19
all_values[7] auto[0] auto[1] 6051586 1 T25 60136 T26 167 T31 50
all_values[7] auto[1] auto[0] 651194 1 T25 5999 T26 29 T31 3
all_values[7] auto[1] auto[1] 6060542 1 T25 64485 T26 86 T31 15
all_values[8] auto[0] auto[0] 2774339 1 T24 257 T25 6603 T26 47
all_values[8] auto[0] auto[1] 6073708 1 T25 64207 T26 102 T31 28
all_values[8] auto[1] auto[0] 658465 1 T25 6343 T26 32 T31 6
all_values[8] auto[1] auto[1] 6035731 1 T25 60829 T26 120 T31 37
all_values[9] auto[0] auto[0] 2783578 1 T24 257 T25 7104 T26 68
all_values[9] auto[0] auto[1] 6071338 1 T25 61422 T26 90 T31 22
all_values[9] auto[1] auto[0] 651844 1 T25 7532 T26 48 T31 5
all_values[9] auto[1] auto[1] 6035483 1 T25 61924 T26 95 T31 41
all_values[10] auto[0] auto[0] 2780297 1 T24 257 T25 7488 T26 18
all_values[10] auto[0] auto[1] 6075836 1 T25 62120 T26 89 T31 43
all_values[10] auto[1] auto[0] 641465 1 T25 6460 T26 27 T21 9
all_values[10] auto[1] auto[1] 6044645 1 T25 61914 T26 167 T31 28
all_values[11] auto[0] auto[0] 2769008 1 T24 257 T25 6877 T26 32
all_values[11] auto[0] auto[1] 6079094 1 T25 61637 T26 83 T31 33
all_values[11] auto[1] auto[0] 645791 1 T25 6195 T26 22 T31 7
all_values[11] auto[1] auto[1] 6048350 1 T25 63273 T26 164 T31 23
all_values[12] auto[0] auto[0] 2784657 1 T24 257 T25 7073 T26 31
all_values[12] auto[0] auto[1] 6045795 1 T25 59920 T26 85 T31 27
all_values[12] auto[1] auto[0] 650027 1 T25 7042 T26 21 T1 1432
all_values[12] auto[1] auto[1] 6061764 1 T25 63947 T26 164 T31 45
all_values[13] auto[0] auto[0] 2771150 1 T24 257 T25 7297 T26 26
all_values[13] auto[0] auto[1] 6049493 1 T25 65406 T26 178 T31 47
all_values[13] auto[1] auto[0] 644886 1 T25 5866 T26 10 T21 1
all_values[13] auto[1] auto[1] 6076714 1 T25 59413 T26 87 T31 22
all_values[14] auto[0] auto[0] 2771607 1 T24 257 T25 7030 T26 22
all_values[14] auto[0] auto[1] 6084200 1 T25 61988 T26 107 T31 48
all_values[14] auto[1] auto[0] 649063 1 T25 6506 T26 13 T1 1522
all_values[14] auto[1] auto[1] 6037373 1 T25 62458 T26 159 T31 17
all_values[15] auto[0] auto[0] 2776728 1 T24 257 T25 7267 T26 40
all_values[15] auto[0] auto[1] 6068277 1 T25 65974 T26 107 T31 11
all_values[15] auto[1] auto[0] 648988 1 T25 6004 T26 26 T31 3
all_values[15] auto[1] auto[1] 6048250 1 T25 58737 T26 128 T31 58
all_values[16] auto[0] auto[0] 2784009 1 T24 257 T25 7319 T26 10
all_values[16] auto[0] auto[1] 6066311 1 T25 62220 T26 131 T31 44
all_values[16] auto[1] auto[0] 649335 1 T25 7596 T26 26 T1 1507
all_values[16] auto[1] auto[1] 6042588 1 T25 60847 T26 134 T31 28
all_values[17] auto[0] auto[0] 2767440 1 T24 257 T25 7119 T26 36
all_values[17] auto[0] auto[1] 6079189 1 T25 63945 T26 117 T31 10
all_values[17] auto[1] auto[0] 659817 1 T25 6218 T26 31 T31 3
all_values[17] auto[1] auto[1] 6035797 1 T25 60700 T26 117 T31 58
all_values[18] auto[0] auto[0] 2774932 1 T24 257 T25 7113 T26 31
all_values[18] auto[0] auto[1] 6066108 1 T25 63426 T26 125 T31 43
all_values[18] auto[1] auto[0] 647738 1 T25 6126 T26 46 T31 2
all_values[18] auto[1] auto[1] 6053465 1 T25 61317 T26 99 T31 27
all_values[19] auto[0] auto[0] 2769657 1 T24 257 T25 7945 T26 39
all_values[19] auto[0] auto[1] 6102387 1 T25 62333 T26 100 T31 45
all_values[19] auto[1] auto[0] 653011 1 T25 7679 T26 14 T31 2
all_values[19] auto[1] auto[1] 6017188 1 T25 60025 T26 148 T31 22
all_values[20] auto[0] auto[0] 2778303 1 T24 257 T25 8515 T26 21
all_values[20] auto[0] auto[1] 6032899 1 T25 63334 T26 99 T31 9
all_values[20] auto[1] auto[0] 646426 1 T25 7117 T26 20 T1 1530
all_values[20] auto[1] auto[1] 6084615 1 T25 59016 T26 161 T31 61
all_values[21] auto[0] auto[0] 2772097 1 T24 257 T25 7240 T26 34
all_values[21] auto[0] auto[1] 6072014 1 T25 60508 T26 144 T31 19
all_values[21] auto[1] auto[0] 651848 1 T25 6022 T26 12 T31 4
all_values[21] auto[1] auto[1] 6046284 1 T25 64212 T26 111 T31 48
all_values[22] auto[0] auto[0] 2781754 1 T24 257 T25 6962 T26 2
all_values[22] auto[0] auto[1] 6056510 1 T25 60975 T26 114 T31 58
all_values[22] auto[1] auto[0] 656617 1 T25 6675 T26 47 T1 1488
all_values[22] auto[1] auto[1] 6047362 1 T25 63370 T26 138 T31 10
all_values[23] auto[0] auto[0] 2777133 1 T24 257 T25 7792 T26 38
all_values[23] auto[0] auto[1] 6032410 1 T25 63794 T26 104 T31 39
all_values[23] auto[1] auto[0] 649800 1 T25 5938 T26 28 T31 6
all_values[23] auto[1] auto[1] 6082900 1 T25 60458 T26 131 T31 21
all_values[24] auto[0] auto[0] 2783420 1 T24 257 T25 7820 T26 13
all_values[24] auto[0] auto[1] 6056926 1 T25 65039 T26 137 T31 15
all_values[24] auto[1] auto[0] 648495 1 T25 6070 T26 34 T31 16
all_values[24] auto[1] auto[1] 6053402 1 T25 59053 T26 117 T31 40
all_values[25] auto[0] auto[0] 2780693 1 T24 257 T25 7132 T26 38
all_values[25] auto[0] auto[1] 6076003 1 T25 65976 T26 116 T31 15
all_values[25] auto[1] auto[0] 657551 1 T25 6294 T26 33 T31 7
all_values[25] auto[1] auto[1] 6027996 1 T25 58580 T26 114 T31 50
all_values[26] auto[0] auto[0] 2784565 1 T24 257 T25 7273 T26 37
all_values[26] auto[0] auto[1] 6098319 1 T25 62923 T26 135 T31 25
all_values[26] auto[1] auto[0] 640115 1 T25 6272 T26 23 T31 12
all_values[26] auto[1] auto[1] 6019244 1 T25 61514 T26 106 T31 34
all_values[27] auto[0] auto[0] 2787259 1 T24 257 T25 6549 T26 8
all_values[27] auto[0] auto[1] 6030260 1 T25 65247 T26 135 T31 14
all_values[27] auto[1] auto[0] 655239 1 T25 6397 T26 24 T31 4
all_values[27] auto[1] auto[1] 6069485 1 T25 59789 T26 134 T31 51
all_values[28] auto[0] auto[0] 2779367 1 T24 257 T25 8002 T26 21
all_values[28] auto[0] auto[1] 6059252 1 T25 61538 T26 151 T31 35
all_values[28] auto[1] auto[0] 646107 1 T25 6479 T26 26 T31 5
all_values[28] auto[1] auto[1] 6057517 1 T25 61963 T26 103 T31 11
all_values[29] auto[0] auto[0] 2778226 1 T24 257 T25 6926 T26 24
all_values[29] auto[0] auto[1] 6047995 1 T25 57855 T26 113 T31 28
all_values[29] auto[1] auto[0] 653673 1 T25 7212 T26 29 T1 1396
all_values[29] auto[1] auto[1] 6062349 1 T25 65989 T26 135 T31 31
all_values[30] auto[0] auto[0] 2778451 1 T24 257 T25 7408 T26 33
all_values[30] auto[0] auto[1] 6069546 1 T25 59157 T26 160 T31 35
all_values[30] auto[1] auto[0] 649940 1 T25 6809 T26 21 T31 3
all_values[30] auto[1] auto[1] 6044306 1 T25 64608 T26 87 T31 33
all_values[31] auto[0] auto[0] 2774320 1 T24 257 T25 6941 T26 31
all_values[31] auto[0] auto[1] 6072974 1 T25 60585 T26 128 T31 42
all_values[31] auto[1] auto[0] 649625 1 T25 6233 T26 15 T1 1496
all_values[31] auto[1] auto[1] 6045324 1 T25 64223 T26 127 T31 22

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