Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8856133 |
1 |
|
|
T24 |
257 |
|
T25 |
69608 |
|
T26 |
107 |
| auto[1] |
6686110 |
1 |
|
|
T25 |
68374 |
|
T26 |
194 |
|
T31 |
28 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
12864093 |
1 |
|
|
T24 |
257 |
|
T25 |
112050 |
|
T26 |
255 |
| auto[1] |
2678150 |
1 |
|
|
T25 |
25932 |
|
T26 |
46 |
|
T31 |
30 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8820398 |
1 |
|
|
T24 |
257 |
|
T25 |
66524 |
|
T26 |
170 |
| auto[1] |
6721845 |
1 |
|
|
T25 |
71458 |
|
T26 |
131 |
|
T31 |
43 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
2027316 |
1 |
|
|
T25 |
23207 |
|
T26 |
33 |
|
T31 |
6 |
| auto[1] |
auto[0] |
auto[1] |
1342427 |
1 |
|
|
T25 |
13135 |
|
T26 |
27 |
|
T31 |
25 |
| auto[1] |
auto[1] |
auto[0] |
2016379 |
1 |
|
|
T25 |
22319 |
|
T26 |
52 |
|
T31 |
7 |
| auto[1] |
auto[1] |
auto[1] |
1335723 |
1 |
|
|
T25 |
12797 |
|
T26 |
19 |
|
T31 |
5 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |