Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8855807 |
1 |
|
|
T24 |
257 |
|
T25 |
69018 |
|
T26 |
129 |
| auto[1] |
6686436 |
1 |
|
|
T25 |
68964 |
|
T26 |
172 |
|
T31 |
17 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
12881949 |
1 |
|
|
T24 |
257 |
|
T25 |
111301 |
|
T26 |
252 |
| auto[1] |
2660294 |
1 |
|
|
T25 |
26681 |
|
T26 |
49 |
|
T31 |
19 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8862233 |
1 |
|
|
T24 |
257 |
|
T25 |
64029 |
|
T26 |
139 |
| auto[1] |
6680010 |
1 |
|
|
T25 |
73953 |
|
T26 |
162 |
|
T31 |
36 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
2021244 |
1 |
|
|
T25 |
24246 |
|
T26 |
57 |
|
T31 |
10 |
| auto[1] |
auto[0] |
auto[1] |
1335361 |
1 |
|
|
T25 |
13693 |
|
T26 |
11 |
|
T31 |
9 |
| auto[1] |
auto[1] |
auto[0] |
1998472 |
1 |
|
|
T25 |
23026 |
|
T26 |
56 |
|
T31 |
7 |
| auto[1] |
auto[1] |
auto[1] |
1324933 |
1 |
|
|
T25 |
12988 |
|
T26 |
38 |
|
T31 |
10 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |