Summary for Variable intr_en
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
8872044 |
1 |
|
|
T24 |
257 |
|
T25 |
70278 |
|
T26 |
139 |
auto[1] |
6670199 |
1 |
|
|
T25 |
67704 |
|
T26 |
162 |
|
T31 |
24 |
Summary for Variable intr_state
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
12875148 |
1 |
|
|
T24 |
257 |
|
T25 |
113502 |
|
T26 |
214 |
auto[1] |
2667095 |
1 |
|
|
T25 |
24480 |
|
T26 |
87 |
|
T31 |
31 |
Summary for Variable type_ctrl_en
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
8842992 |
1 |
|
|
T24 |
257 |
|
T25 |
72319 |
|
T26 |
135 |
auto[1] |
6699251 |
1 |
|
|
T25 |
65663 |
|
T26 |
166 |
|
T31 |
47 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
TOTAL |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[1] |
auto[0] |
auto[0] |
2026858 |
1 |
|
|
T25 |
19382 |
|
T26 |
27 |
|
T31 |
9 |
auto[1] |
auto[0] |
auto[1] |
1332791 |
1 |
|
|
T25 |
12007 |
|
T26 |
43 |
|
T31 |
21 |
auto[1] |
auto[1] |
auto[0] |
2005298 |
1 |
|
|
T25 |
21801 |
|
T26 |
52 |
|
T31 |
7 |
auto[1] |
auto[1] |
auto[1] |
1334304 |
1 |
|
|
T25 |
12473 |
|
T26 |
44 |
|
T31 |
10 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
NAME | COUNT | STATUS |
intr_type_disabled |
0 |
Excluded |