Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8838264 |
1 |
|
|
T24 |
257 |
|
T25 |
67937 |
|
T26 |
116 |
| auto[1] |
6703979 |
1 |
|
|
T25 |
70045 |
|
T26 |
185 |
|
T31 |
10 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
12866294 |
1 |
|
|
T24 |
257 |
|
T25 |
111494 |
|
T26 |
230 |
| auto[1] |
2675949 |
1 |
|
|
T25 |
26488 |
|
T26 |
71 |
|
T31 |
13 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8823155 |
1 |
|
|
T24 |
257 |
|
T25 |
66389 |
|
T26 |
115 |
| auto[1] |
6719088 |
1 |
|
|
T25 |
71593 |
|
T26 |
186 |
|
T31 |
42 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
2022364 |
1 |
|
|
T25 |
21328 |
|
T26 |
55 |
|
T31 |
25 |
| auto[1] |
auto[0] |
auto[1] |
1339040 |
1 |
|
|
T25 |
12706 |
|
T26 |
38 |
|
T31 |
13 |
| auto[1] |
auto[1] |
auto[0] |
2020775 |
1 |
|
|
T25 |
23777 |
|
T26 |
60 |
|
T31 |
4 |
| auto[1] |
auto[1] |
auto[1] |
1336909 |
1 |
|
|
T25 |
13782 |
|
T26 |
33 |
|
T1 |
3057 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |