Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
6398574 |
1 |
|
|
T22 |
155 |
|
T23 |
75 |
|
T24 |
648 |
| auto[1] |
4367757 |
1 |
|
|
T23 |
23 |
|
T25 |
875 |
|
T1 |
9319 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8948189 |
1 |
|
|
T22 |
155 |
|
T23 |
89 |
|
T24 |
648 |
| auto[1] |
1818142 |
1 |
|
|
T23 |
9 |
|
T25 |
542 |
|
T1 |
3573 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
6448394 |
1 |
|
|
T22 |
155 |
|
T23 |
88 |
|
T24 |
648 |
| auto[1] |
4317937 |
1 |
|
|
T23 |
10 |
|
T25 |
1043 |
|
T1 |
8244 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1234947 |
1 |
|
|
T23 |
1 |
|
T25 |
207 |
|
T1 |
2497 |
| auto[1] |
auto[0] |
auto[1] |
904986 |
1 |
|
|
T23 |
9 |
|
T25 |
208 |
|
T1 |
1700 |
| auto[1] |
auto[1] |
auto[0] |
1264848 |
1 |
|
|
T25 |
294 |
|
T1 |
2174 |
|
T12 |
5995 |
| auto[1] |
auto[1] |
auto[1] |
913156 |
1 |
|
|
T25 |
334 |
|
T1 |
1873 |
|
T12 |
3603 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |