Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
6416516 |
1 |
|
|
T22 |
155 |
|
T23 |
64 |
|
T24 |
648 |
| auto[1] |
4349815 |
1 |
|
|
T23 |
34 |
|
T25 |
575 |
|
T1 |
10583 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8937352 |
1 |
|
|
T22 |
155 |
|
T23 |
98 |
|
T24 |
648 |
| auto[1] |
1828979 |
1 |
|
|
T25 |
400 |
|
T1 |
3465 |
|
T12 |
7970 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
6428266 |
1 |
|
|
T22 |
155 |
|
T23 |
98 |
|
T24 |
648 |
| auto[1] |
4338065 |
1 |
|
|
T25 |
818 |
|
T1 |
8475 |
|
T12 |
20308 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1263559 |
1 |
|
|
T25 |
280 |
|
T1 |
2204 |
|
T12 |
6503 |
| auto[1] |
auto[0] |
auto[1] |
919346 |
1 |
|
|
T25 |
260 |
|
T1 |
1506 |
|
T12 |
3955 |
| auto[1] |
auto[1] |
auto[0] |
1245527 |
1 |
|
|
T25 |
138 |
|
T1 |
2806 |
|
T12 |
5835 |
| auto[1] |
auto[1] |
auto[1] |
909633 |
1 |
|
|
T25 |
140 |
|
T1 |
1959 |
|
T12 |
4015 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |