Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
6392140 |
1 |
|
|
T22 |
155 |
|
T23 |
80 |
|
T24 |
648 |
| auto[1] |
4374191 |
1 |
|
|
T23 |
18 |
|
T25 |
840 |
|
T1 |
9407 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8929019 |
1 |
|
|
T22 |
155 |
|
T23 |
91 |
|
T24 |
648 |
| auto[1] |
1837312 |
1 |
|
|
T23 |
7 |
|
T25 |
360 |
|
T1 |
3617 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
6397875 |
1 |
|
|
T22 |
155 |
|
T23 |
87 |
|
T24 |
648 |
| auto[1] |
4368456 |
1 |
|
|
T23 |
11 |
|
T25 |
747 |
|
T1 |
8350 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1263758 |
1 |
|
|
T23 |
4 |
|
T25 |
162 |
|
T1 |
2492 |
| auto[1] |
auto[0] |
auto[1] |
916327 |
1 |
|
|
T23 |
7 |
|
T25 |
158 |
|
T1 |
1886 |
| auto[1] |
auto[1] |
auto[0] |
1267386 |
1 |
|
|
T25 |
225 |
|
T1 |
2241 |
|
T12 |
5674 |
| auto[1] |
auto[1] |
auto[1] |
920985 |
1 |
|
|
T25 |
202 |
|
T1 |
1731 |
|
T12 |
3484 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |