Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2623591 |
1 |
|
|
T32 |
50729 |
|
T34 |
309 |
|
T35 |
84 |
| auto[1] |
2303661 |
1 |
|
|
T32 |
44991 |
|
T34 |
257 |
|
T35 |
124 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3095077 |
1 |
|
|
T32 |
59901 |
|
T34 |
301 |
|
T35 |
84 |
| auto[1] |
1832175 |
1 |
|
|
T32 |
35819 |
|
T34 |
265 |
|
T35 |
124 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
1700798 |
1 |
|
|
T32 |
32866 |
|
T34 |
129 |
|
T35 |
32 |
| auto[0] |
auto[1] |
922793 |
1 |
|
|
T32 |
17863 |
|
T34 |
180 |
|
T35 |
52 |
| auto[1] |
auto[0] |
1394279 |
1 |
|
|
T32 |
27035 |
|
T34 |
172 |
|
T35 |
52 |
| auto[1] |
auto[1] |
909382 |
1 |
|
|
T32 |
17956 |
|
T34 |
85 |
|
T35 |
72 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2624310 |
1 |
|
|
T32 |
51128 |
|
T34 |
260 |
|
T35 |
106 |
| auto[1] |
2302942 |
1 |
|
|
T32 |
44592 |
|
T34 |
306 |
|
T35 |
102 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3095284 |
1 |
|
|
T32 |
60062 |
|
T34 |
354 |
|
T35 |
123 |
| auto[1] |
1831968 |
1 |
|
|
T32 |
35658 |
|
T34 |
212 |
|
T35 |
85 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
1701048 |
1 |
|
|
T32 |
32992 |
|
T34 |
170 |
|
T35 |
66 |
| auto[0] |
auto[1] |
923262 |
1 |
|
|
T32 |
18136 |
|
T34 |
90 |
|
T35 |
40 |
| auto[1] |
auto[0] |
1394236 |
1 |
|
|
T32 |
27070 |
|
T34 |
184 |
|
T35 |
57 |
| auto[1] |
auto[1] |
908706 |
1 |
|
|
T32 |
17522 |
|
T34 |
122 |
|
T35 |
45 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2625533 |
1 |
|
|
T32 |
50884 |
|
T34 |
373 |
|
T35 |
102 |
| auto[1] |
2301719 |
1 |
|
|
T32 |
44836 |
|
T34 |
193 |
|
T35 |
106 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3097982 |
1 |
|
|
T32 |
59911 |
|
T34 |
313 |
|
T35 |
90 |
| auto[1] |
1829270 |
1 |
|
|
T32 |
35809 |
|
T34 |
253 |
|
T35 |
118 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
1704999 |
1 |
|
|
T32 |
33013 |
|
T34 |
213 |
|
T35 |
43 |
| auto[0] |
auto[1] |
920534 |
1 |
|
|
T32 |
17871 |
|
T34 |
160 |
|
T35 |
59 |
| auto[1] |
auto[0] |
1392983 |
1 |
|
|
T32 |
26898 |
|
T34 |
100 |
|
T35 |
47 |
| auto[1] |
auto[1] |
908736 |
1 |
|
|
T32 |
17938 |
|
T34 |
93 |
|
T35 |
59 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2622294 |
1 |
|
|
T32 |
50493 |
|
T34 |
303 |
|
T35 |
118 |
| auto[1] |
2304958 |
1 |
|
|
T32 |
45227 |
|
T34 |
263 |
|
T35 |
90 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3098284 |
1 |
|
|
T32 |
59247 |
|
T34 |
324 |
|
T35 |
116 |
| auto[1] |
1828968 |
1 |
|
|
T32 |
36473 |
|
T34 |
242 |
|
T35 |
92 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
1702181 |
1 |
|
|
T32 |
32298 |
|
T34 |
188 |
|
T35 |
71 |
| auto[0] |
auto[1] |
920113 |
1 |
|
|
T32 |
18195 |
|
T34 |
115 |
|
T35 |
47 |
| auto[1] |
auto[0] |
1396103 |
1 |
|
|
T32 |
26949 |
|
T34 |
136 |
|
T35 |
45 |
| auto[1] |
auto[1] |
908855 |
1 |
|
|
T32 |
18278 |
|
T34 |
127 |
|
T35 |
45 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2622811 |
1 |
|
|
T32 |
50742 |
|
T34 |
299 |
|
T35 |
92 |
| auto[1] |
2304441 |
1 |
|
|
T32 |
44978 |
|
T34 |
267 |
|
T35 |
116 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3097297 |
1 |
|
|
T32 |
60010 |
|
T34 |
315 |
|
T35 |
110 |
| auto[1] |
1829955 |
1 |
|
|
T32 |
35710 |
|
T34 |
251 |
|
T35 |
98 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
1701432 |
1 |
|
|
T32 |
32821 |
|
T34 |
149 |
|
T35 |
41 |
| auto[0] |
auto[1] |
921379 |
1 |
|
|
T32 |
17921 |
|
T34 |
150 |
|
T35 |
51 |
| auto[1] |
auto[0] |
1395865 |
1 |
|
|
T32 |
27189 |
|
T34 |
166 |
|
T35 |
69 |
| auto[1] |
auto[1] |
908576 |
1 |
|
|
T32 |
17789 |
|
T34 |
101 |
|
T35 |
47 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2627553 |
1 |
|
|
T32 |
51235 |
|
T34 |
281 |
|
T35 |
96 |
| auto[1] |
2299699 |
1 |
|
|
T32 |
44485 |
|
T34 |
285 |
|
T35 |
112 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3093172 |
1 |
|
|
T32 |
60382 |
|
T34 |
336 |
|
T35 |
102 |
| auto[1] |
1834080 |
1 |
|
|
T32 |
35338 |
|
T34 |
230 |
|
T35 |
106 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
1703838 |
1 |
|
|
T32 |
33333 |
|
T34 |
154 |
|
T35 |
54 |
| auto[0] |
auto[1] |
923715 |
1 |
|
|
T32 |
17902 |
|
T34 |
127 |
|
T35 |
42 |
| auto[1] |
auto[0] |
1389334 |
1 |
|
|
T32 |
27049 |
|
T34 |
182 |
|
T35 |
48 |
| auto[1] |
auto[1] |
910365 |
1 |
|
|
T32 |
17436 |
|
T34 |
103 |
|
T35 |
64 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2626675 |
1 |
|
|
T32 |
51167 |
|
T34 |
286 |
|
T35 |
102 |
| auto[1] |
2300577 |
1 |
|
|
T32 |
44553 |
|
T34 |
280 |
|
T35 |
106 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3100809 |
1 |
|
|
T32 |
59765 |
|
T34 |
335 |
|
T35 |
83 |
| auto[1] |
1826443 |
1 |
|
|
T32 |
35955 |
|
T34 |
231 |
|
T35 |
125 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
1706807 |
1 |
|
|
T32 |
32965 |
|
T34 |
175 |
|
T35 |
36 |
| auto[0] |
auto[1] |
919868 |
1 |
|
|
T32 |
18202 |
|
T34 |
111 |
|
T35 |
66 |
| auto[1] |
auto[0] |
1394002 |
1 |
|
|
T32 |
26800 |
|
T34 |
160 |
|
T35 |
47 |
| auto[1] |
auto[1] |
906575 |
1 |
|
|
T32 |
17753 |
|
T34 |
120 |
|
T35 |
59 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2621199 |
1 |
|
|
T32 |
50868 |
|
T34 |
264 |
|
T35 |
86 |
| auto[1] |
2306053 |
1 |
|
|
T32 |
44852 |
|
T34 |
302 |
|
T35 |
122 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3096492 |
1 |
|
|
T32 |
59433 |
|
T34 |
316 |
|
T35 |
107 |
| auto[1] |
1830760 |
1 |
|
|
T32 |
36287 |
|
T34 |
250 |
|
T35 |
101 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
1700391 |
1 |
|
|
T32 |
32456 |
|
T34 |
158 |
|
T35 |
48 |
| auto[0] |
auto[1] |
920808 |
1 |
|
|
T32 |
18412 |
|
T34 |
106 |
|
T35 |
38 |
| auto[1] |
auto[0] |
1396101 |
1 |
|
|
T32 |
26977 |
|
T34 |
158 |
|
T35 |
59 |
| auto[1] |
auto[1] |
909952 |
1 |
|
|
T32 |
17875 |
|
T34 |
144 |
|
T35 |
63 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2625789 |
1 |
|
|
T32 |
51314 |
|
T34 |
247 |
|
T35 |
118 |
| auto[1] |
2301463 |
1 |
|
|
T32 |
44406 |
|
T34 |
319 |
|
T35 |
90 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3110822 |
1 |
|
|
T32 |
60060 |
|
T34 |
373 |
|
T35 |
106 |
| auto[1] |
1816430 |
1 |
|
|
T32 |
35660 |
|
T34 |
193 |
|
T35 |
102 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
1712177 |
1 |
|
|
T32 |
33288 |
|
T34 |
163 |
|
T35 |
60 |
| auto[0] |
auto[1] |
913612 |
1 |
|
|
T32 |
18026 |
|
T34 |
84 |
|
T35 |
58 |
| auto[1] |
auto[0] |
1398645 |
1 |
|
|
T32 |
26772 |
|
T34 |
210 |
|
T35 |
46 |
| auto[1] |
auto[1] |
902818 |
1 |
|
|
T32 |
17634 |
|
T34 |
109 |
|
T35 |
44 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2626077 |
1 |
|
|
T32 |
50657 |
|
T34 |
292 |
|
T35 |
112 |
| auto[1] |
2301175 |
1 |
|
|
T32 |
45063 |
|
T34 |
274 |
|
T35 |
96 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3106326 |
1 |
|
|
T32 |
60577 |
|
T34 |
308 |
|
T35 |
96 |
| auto[1] |
1820926 |
1 |
|
|
T32 |
35143 |
|
T34 |
258 |
|
T35 |
112 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
1708770 |
1 |
|
|
T32 |
32958 |
|
T34 |
163 |
|
T35 |
46 |
| auto[0] |
auto[1] |
917307 |
1 |
|
|
T32 |
17699 |
|
T34 |
129 |
|
T35 |
66 |
| auto[1] |
auto[0] |
1397556 |
1 |
|
|
T32 |
27619 |
|
T34 |
145 |
|
T35 |
50 |
| auto[1] |
auto[1] |
903619 |
1 |
|
|
T32 |
17444 |
|
T34 |
129 |
|
T35 |
46 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2624819 |
1 |
|
|
T32 |
51039 |
|
T34 |
310 |
|
T35 |
114 |
| auto[1] |
2302433 |
1 |
|
|
T32 |
44681 |
|
T34 |
256 |
|
T35 |
94 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3105900 |
1 |
|
|
T32 |
59874 |
|
T34 |
310 |
|
T35 |
113 |
| auto[1] |
1821352 |
1 |
|
|
T32 |
35846 |
|
T34 |
256 |
|
T35 |
95 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
1708149 |
1 |
|
|
T32 |
32825 |
|
T34 |
180 |
|
T35 |
64 |
| auto[0] |
auto[1] |
916670 |
1 |
|
|
T32 |
18214 |
|
T34 |
130 |
|
T35 |
50 |
| auto[1] |
auto[0] |
1397751 |
1 |
|
|
T32 |
27049 |
|
T34 |
130 |
|
T35 |
49 |
| auto[1] |
auto[1] |
904682 |
1 |
|
|
T32 |
17632 |
|
T34 |
126 |
|
T35 |
45 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2621561 |
1 |
|
|
T32 |
50289 |
|
T34 |
258 |
|
T35 |
94 |
| auto[1] |
2305691 |
1 |
|
|
T32 |
45431 |
|
T34 |
308 |
|
T35 |
114 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3102510 |
1 |
|
|
T32 |
60447 |
|
T34 |
317 |
|
T35 |
90 |
| auto[1] |
1824742 |
1 |
|
|
T32 |
35273 |
|
T34 |
249 |
|
T35 |
118 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
1703654 |
1 |
|
|
T32 |
32790 |
|
T34 |
133 |
|
T35 |
38 |
| auto[0] |
auto[1] |
917907 |
1 |
|
|
T32 |
17499 |
|
T34 |
125 |
|
T35 |
56 |
| auto[1] |
auto[0] |
1398856 |
1 |
|
|
T32 |
27657 |
|
T34 |
184 |
|
T35 |
52 |
| auto[1] |
auto[1] |
906835 |
1 |
|
|
T32 |
17774 |
|
T34 |
124 |
|
T35 |
62 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2628100 |
1 |
|
|
T32 |
51259 |
|
T34 |
305 |
|
T35 |
102 |
| auto[1] |
2299152 |
1 |
|
|
T32 |
44461 |
|
T34 |
261 |
|
T35 |
106 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3098699 |
1 |
|
|
T32 |
59917 |
|
T34 |
301 |
|
T35 |
102 |
| auto[1] |
1828553 |
1 |
|
|
T32 |
35803 |
|
T34 |
265 |
|
T35 |
106 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
1706987 |
1 |
|
|
T32 |
33175 |
|
T34 |
156 |
|
T35 |
46 |
| auto[0] |
auto[1] |
921113 |
1 |
|
|
T32 |
18084 |
|
T34 |
149 |
|
T35 |
56 |
| auto[1] |
auto[0] |
1391712 |
1 |
|
|
T32 |
26742 |
|
T34 |
145 |
|
T35 |
56 |
| auto[1] |
auto[1] |
907440 |
1 |
|
|
T32 |
17719 |
|
T34 |
116 |
|
T35 |
50 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2626228 |
1 |
|
|
T32 |
50639 |
|
T34 |
266 |
|
T35 |
104 |
| auto[1] |
2301024 |
1 |
|
|
T32 |
45081 |
|
T34 |
300 |
|
T35 |
104 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3106885 |
1 |
|
|
T32 |
60420 |
|
T34 |
354 |
|
T35 |
109 |
| auto[1] |
1820367 |
1 |
|
|
T32 |
35300 |
|
T34 |
212 |
|
T35 |
99 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
1707598 |
1 |
|
|
T32 |
33014 |
|
T34 |
166 |
|
T35 |
59 |
| auto[0] |
auto[1] |
918630 |
1 |
|
|
T32 |
17625 |
|
T34 |
100 |
|
T35 |
45 |
| auto[1] |
auto[0] |
1399287 |
1 |
|
|
T32 |
27406 |
|
T34 |
188 |
|
T35 |
50 |
| auto[1] |
auto[1] |
901737 |
1 |
|
|
T32 |
17675 |
|
T34 |
112 |
|
T35 |
54 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2625667 |
1 |
|
|
T32 |
51387 |
|
T34 |
304 |
|
T35 |
112 |
| auto[1] |
2301585 |
1 |
|
|
T32 |
44333 |
|
T34 |
262 |
|
T35 |
96 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3110198 |
1 |
|
|
T32 |
59963 |
|
T34 |
295 |
|
T35 |
120 |
| auto[1] |
1817054 |
1 |
|
|
T32 |
35757 |
|
T34 |
271 |
|
T35 |
88 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
1711406 |
1 |
|
|
T32 |
33196 |
|
T34 |
134 |
|
T35 |
67 |
| auto[0] |
auto[1] |
914261 |
1 |
|
|
T32 |
18191 |
|
T34 |
170 |
|
T35 |
45 |
| auto[1] |
auto[0] |
1398792 |
1 |
|
|
T32 |
26767 |
|
T34 |
161 |
|
T35 |
53 |
| auto[1] |
auto[1] |
902793 |
1 |
|
|
T32 |
17566 |
|
T34 |
101 |
|
T35 |
43 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2630230 |
1 |
|
|
T32 |
51073 |
|
T34 |
387 |
|
T35 |
102 |
| auto[1] |
2297022 |
1 |
|
|
T32 |
44647 |
|
T34 |
179 |
|
T35 |
106 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3107532 |
1 |
|
|
T32 |
60424 |
|
T34 |
316 |
|
T35 |
109 |
| auto[1] |
1819720 |
1 |
|
|
T32 |
35296 |
|
T34 |
250 |
|
T35 |
99 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
1711883 |
1 |
|
|
T32 |
33047 |
|
T34 |
202 |
|
T35 |
56 |
| auto[0] |
auto[1] |
918347 |
1 |
|
|
T32 |
18026 |
|
T34 |
185 |
|
T35 |
46 |
| auto[1] |
auto[0] |
1395649 |
1 |
|
|
T32 |
27377 |
|
T34 |
114 |
|
T35 |
53 |
| auto[1] |
auto[1] |
901373 |
1 |
|
|
T32 |
17270 |
|
T34 |
65 |
|
T35 |
53 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2624705 |
1 |
|
|
T32 |
51814 |
|
T34 |
299 |
|
T35 |
112 |
| auto[1] |
2302547 |
1 |
|
|
T32 |
43906 |
|
T34 |
267 |
|
T35 |
96 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3109219 |
1 |
|
|
T32 |
60568 |
|
T34 |
334 |
|
T35 |
112 |
| auto[1] |
1818033 |
1 |
|
|
T32 |
35152 |
|
T34 |
232 |
|
T35 |
96 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
1709203 |
1 |
|
|
T32 |
33831 |
|
T34 |
162 |
|
T35 |
55 |
| auto[0] |
auto[1] |
915502 |
1 |
|
|
T32 |
17983 |
|
T34 |
137 |
|
T35 |
57 |
| auto[1] |
auto[0] |
1400016 |
1 |
|
|
T32 |
26737 |
|
T34 |
172 |
|
T35 |
57 |
| auto[1] |
auto[1] |
902531 |
1 |
|
|
T32 |
17169 |
|
T34 |
95 |
|
T35 |
39 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2624935 |
1 |
|
|
T32 |
51450 |
|
T34 |
268 |
|
T35 |
100 |
| auto[1] |
2302317 |
1 |
|
|
T32 |
44270 |
|
T34 |
298 |
|
T35 |
108 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3105559 |
1 |
|
|
T32 |
60261 |
|
T34 |
348 |
|
T35 |
111 |
| auto[1] |
1821693 |
1 |
|
|
T32 |
35459 |
|
T34 |
218 |
|
T35 |
97 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
1707421 |
1 |
|
|
T32 |
33446 |
|
T34 |
174 |
|
T35 |
54 |
| auto[0] |
auto[1] |
917514 |
1 |
|
|
T32 |
18004 |
|
T34 |
94 |
|
T35 |
46 |
| auto[1] |
auto[0] |
1398138 |
1 |
|
|
T32 |
26815 |
|
T34 |
174 |
|
T35 |
57 |
| auto[1] |
auto[1] |
904179 |
1 |
|
|
T32 |
17455 |
|
T34 |
124 |
|
T35 |
51 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2630450 |
1 |
|
|
T32 |
50511 |
|
T34 |
305 |
|
T35 |
110 |
| auto[1] |
2296802 |
1 |
|
|
T32 |
45209 |
|
T34 |
261 |
|
T35 |
98 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3107863 |
1 |
|
|
T32 |
60108 |
|
T34 |
350 |
|
T35 |
92 |
| auto[1] |
1819389 |
1 |
|
|
T32 |
35612 |
|
T34 |
216 |
|
T35 |
116 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
1711738 |
1 |
|
|
T32 |
32550 |
|
T34 |
182 |
|
T35 |
40 |
| auto[0] |
auto[1] |
918712 |
1 |
|
|
T32 |
17961 |
|
T34 |
123 |
|
T35 |
70 |
| auto[1] |
auto[0] |
1396125 |
1 |
|
|
T32 |
27558 |
|
T34 |
168 |
|
T35 |
52 |
| auto[1] |
auto[1] |
900677 |
1 |
|
|
T32 |
17651 |
|
T34 |
93 |
|
T35 |
46 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2622445 |
1 |
|
|
T32 |
50718 |
|
T34 |
289 |
|
T35 |
94 |
| auto[1] |
2304807 |
1 |
|
|
T32 |
45002 |
|
T34 |
277 |
|
T35 |
114 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3108911 |
1 |
|
|
T32 |
60631 |
|
T34 |
343 |
|
T35 |
95 |
| auto[1] |
1818341 |
1 |
|
|
T32 |
35089 |
|
T34 |
223 |
|
T35 |
113 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
1708552 |
1 |
|
|
T32 |
33072 |
|
T34 |
178 |
|
T35 |
37 |
| auto[0] |
auto[1] |
913893 |
1 |
|
|
T32 |
17646 |
|
T34 |
111 |
|
T35 |
57 |
| auto[1] |
auto[0] |
1400359 |
1 |
|
|
T32 |
27559 |
|
T34 |
165 |
|
T35 |
58 |
| auto[1] |
auto[1] |
904448 |
1 |
|
|
T32 |
17443 |
|
T34 |
112 |
|
T35 |
56 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2627043 |
1 |
|
|
T32 |
50701 |
|
T34 |
268 |
|
T35 |
106 |
| auto[1] |
2300209 |
1 |
|
|
T32 |
45019 |
|
T34 |
298 |
|
T35 |
102 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3103951 |
1 |
|
|
T32 |
60729 |
|
T34 |
318 |
|
T35 |
101 |
| auto[1] |
1823301 |
1 |
|
|
T32 |
34991 |
|
T34 |
248 |
|
T35 |
107 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
1708551 |
1 |
|
|
T32 |
33205 |
|
T34 |
142 |
|
T35 |
46 |
| auto[0] |
auto[1] |
918492 |
1 |
|
|
T32 |
17496 |
|
T34 |
126 |
|
T35 |
60 |
| auto[1] |
auto[0] |
1395400 |
1 |
|
|
T32 |
27524 |
|
T34 |
176 |
|
T35 |
55 |
| auto[1] |
auto[1] |
904809 |
1 |
|
|
T32 |
17495 |
|
T34 |
122 |
|
T35 |
47 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2619322 |
1 |
|
|
T32 |
50248 |
|
T34 |
251 |
|
T35 |
86 |
| auto[1] |
2307930 |
1 |
|
|
T32 |
45472 |
|
T34 |
315 |
|
T35 |
122 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3108381 |
1 |
|
|
T32 |
60326 |
|
T34 |
348 |
|
T35 |
113 |
| auto[1] |
1818871 |
1 |
|
|
T32 |
35394 |
|
T34 |
218 |
|
T35 |
95 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
1704545 |
1 |
|
|
T32 |
32643 |
|
T34 |
138 |
|
T35 |
56 |
| auto[0] |
auto[1] |
914777 |
1 |
|
|
T32 |
17605 |
|
T34 |
113 |
|
T35 |
30 |
| auto[1] |
auto[0] |
1403836 |
1 |
|
|
T32 |
27683 |
|
T34 |
210 |
|
T35 |
57 |
| auto[1] |
auto[1] |
904094 |
1 |
|
|
T32 |
17789 |
|
T34 |
105 |
|
T35 |
65 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2629178 |
1 |
|
|
T32 |
50722 |
|
T34 |
239 |
|
T35 |
92 |
| auto[1] |
2298074 |
1 |
|
|
T32 |
44998 |
|
T34 |
327 |
|
T35 |
116 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3107123 |
1 |
|
|
T32 |
60387 |
|
T34 |
332 |
|
T35 |
102 |
| auto[1] |
1820129 |
1 |
|
|
T32 |
35333 |
|
T34 |
234 |
|
T35 |
106 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
1712021 |
1 |
|
|
T32 |
32983 |
|
T34 |
130 |
|
T35 |
44 |
| auto[0] |
auto[1] |
917157 |
1 |
|
|
T32 |
17739 |
|
T34 |
109 |
|
T35 |
48 |
| auto[1] |
auto[0] |
1395102 |
1 |
|
|
T32 |
27404 |
|
T34 |
202 |
|
T35 |
58 |
| auto[1] |
auto[1] |
902972 |
1 |
|
|
T32 |
17594 |
|
T34 |
125 |
|
T35 |
58 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2627938 |
1 |
|
|
T32 |
51001 |
|
T34 |
283 |
|
T35 |
110 |
| auto[1] |
2299314 |
1 |
|
|
T32 |
44719 |
|
T34 |
283 |
|
T35 |
98 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3100049 |
1 |
|
|
T32 |
60012 |
|
T34 |
307 |
|
T35 |
106 |
| auto[1] |
1827203 |
1 |
|
|
T32 |
35708 |
|
T34 |
259 |
|
T35 |
102 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
1707532 |
1 |
|
|
T32 |
33091 |
|
T34 |
163 |
|
T35 |
51 |
| auto[0] |
auto[1] |
920406 |
1 |
|
|
T32 |
17910 |
|
T34 |
120 |
|
T35 |
59 |
| auto[1] |
auto[0] |
1392517 |
1 |
|
|
T32 |
26921 |
|
T34 |
144 |
|
T35 |
55 |
| auto[1] |
auto[1] |
906797 |
1 |
|
|
T32 |
17798 |
|
T34 |
139 |
|
T35 |
43 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2623485 |
1 |
|
|
T32 |
50666 |
|
T34 |
284 |
|
T35 |
94 |
| auto[1] |
2303767 |
1 |
|
|
T32 |
45054 |
|
T34 |
282 |
|
T35 |
114 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3108771 |
1 |
|
|
T32 |
60464 |
|
T34 |
295 |
|
T35 |
99 |
| auto[1] |
1818481 |
1 |
|
|
T32 |
35256 |
|
T34 |
271 |
|
T35 |
109 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
1707316 |
1 |
|
|
T32 |
32995 |
|
T34 |
138 |
|
T35 |
49 |
| auto[0] |
auto[1] |
916169 |
1 |
|
|
T32 |
17671 |
|
T34 |
146 |
|
T35 |
45 |
| auto[1] |
auto[0] |
1401455 |
1 |
|
|
T32 |
27469 |
|
T34 |
157 |
|
T35 |
50 |
| auto[1] |
auto[1] |
902312 |
1 |
|
|
T32 |
17585 |
|
T34 |
125 |
|
T35 |
64 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2626934 |
1 |
|
|
T32 |
50838 |
|
T34 |
344 |
|
T35 |
96 |
| auto[1] |
2300318 |
1 |
|
|
T32 |
44882 |
|
T34 |
222 |
|
T35 |
112 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3102302 |
1 |
|
|
T32 |
59893 |
|
T34 |
334 |
|
T35 |
103 |
| auto[1] |
1824950 |
1 |
|
|
T32 |
35827 |
|
T34 |
232 |
|
T35 |
105 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
1708139 |
1 |
|
|
T32 |
32657 |
|
T34 |
234 |
|
T35 |
53 |
| auto[0] |
auto[1] |
918795 |
1 |
|
|
T32 |
18181 |
|
T34 |
110 |
|
T35 |
43 |
| auto[1] |
auto[0] |
1394163 |
1 |
|
|
T32 |
27236 |
|
T34 |
100 |
|
T35 |
50 |
| auto[1] |
auto[1] |
906155 |
1 |
|
|
T32 |
17646 |
|
T34 |
122 |
|
T35 |
62 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2622830 |
1 |
|
|
T32 |
51267 |
|
T34 |
236 |
|
T35 |
104 |
| auto[1] |
2304422 |
1 |
|
|
T32 |
44453 |
|
T34 |
330 |
|
T35 |
104 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3103857 |
1 |
|
|
T32 |
59884 |
|
T34 |
297 |
|
T35 |
114 |
| auto[1] |
1823395 |
1 |
|
|
T32 |
35836 |
|
T34 |
269 |
|
T35 |
94 |