Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
10026588 |
1 |
|
|
T32 |
160006 |
|
T33 |
14861 |
|
T34 |
756 |
| auto[1] |
7708588 |
1 |
|
|
T32 |
161986 |
|
T34 |
431 |
|
T50 |
639 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
14613977 |
1 |
|
|
T32 |
261714 |
|
T33 |
14861 |
|
T34 |
772 |
| auto[1] |
3121199 |
1 |
|
|
T32 |
60278 |
|
T34 |
415 |
|
T50 |
226 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
10036632 |
1 |
|
|
T32 |
164714 |
|
T33 |
14861 |
|
T34 |
572 |
| auto[1] |
7698544 |
1 |
|
|
T32 |
157278 |
|
T34 |
615 |
|
T50 |
448 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
2297358 |
1 |
|
|
T32 |
48288 |
|
T34 |
117 |
|
T50 |
82 |
| auto[1] |
auto[0] |
auto[1] |
1563869 |
1 |
|
|
T32 |
30505 |
|
T34 |
271 |
|
T50 |
89 |
| auto[1] |
auto[1] |
auto[0] |
2279987 |
1 |
|
|
T32 |
48712 |
|
T34 |
83 |
|
T50 |
140 |
| auto[1] |
auto[1] |
auto[1] |
1557330 |
1 |
|
|
T32 |
29773 |
|
T34 |
144 |
|
T50 |
137 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |