Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
10006069 |
1 |
|
|
T32 |
158718 |
|
T33 |
14861 |
|
T34 |
574 |
| auto[1] |
7729107 |
1 |
|
|
T32 |
163274 |
|
T34 |
613 |
|
T50 |
536 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
14608064 |
1 |
|
|
T32 |
260324 |
|
T33 |
14861 |
|
T34 |
754 |
| auto[1] |
3127112 |
1 |
|
|
T32 |
61668 |
|
T34 |
433 |
|
T50 |
277 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
10021745 |
1 |
|
|
T32 |
160488 |
|
T33 |
14861 |
|
T34 |
556 |
| auto[1] |
7713431 |
1 |
|
|
T32 |
161504 |
|
T34 |
631 |
|
T50 |
509 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
2274395 |
1 |
|
|
T32 |
47940 |
|
T34 |
98 |
|
T50 |
161 |
| auto[1] |
auto[0] |
auto[1] |
1559427 |
1 |
|
|
T32 |
30022 |
|
T34 |
222 |
|
T50 |
166 |
| auto[1] |
auto[1] |
auto[0] |
2311924 |
1 |
|
|
T32 |
51896 |
|
T34 |
100 |
|
T50 |
71 |
| auto[1] |
auto[1] |
auto[1] |
1567685 |
1 |
|
|
T32 |
31646 |
|
T34 |
211 |
|
T50 |
111 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |