Unified Coverage Report :: Group :: cip_base_pkg::intr_test_cg::SHAPE{(num_interrupts - 1)=31}

Group : cip_base_pkg::intr_test_cg::SHAPE{(num_interrupts - 1)=31}

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_cip_lib_0/cip_base_env_cov.sv

---

Summary for Group cip_base_pkg::intr_test_cg::SHAPE{(num_interrupts - 1)=31}

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	38	0	38	100.00
Crosses	192	0	192	100.00

Variables for Group cip_base_pkg::intr_test_cg::SHAPE{(num_interrupts - 1)=31}

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_intr	32	0	32	100.00	100	1	1	0
cp_intr_en	2	0	2	100.00	100	1	1	2
cp_intr_state	2	0	2	100.00	100	1	1	2
cp_intr_test	2	0	2	100.00	100	1	1	2

Crosses for Group cip_base_pkg::intr_test_cg::SHAPE{(num_interrupts - 1)=31}

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
intr_test_cg_cc	192	0	192	100.00	100	1	1	0

Summary for Variable cp_intr

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	32	0	32	100.00

User Defined Bins for cp_intr

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_values[0]	17201234	1			T22	156		T23	1162		T1	2120
all_values[1]	17201234	1			T22	156		T23	1162		T1	2120
all_values[2]	17201234	1			T22	156		T23	1162		T1	2120
all_values[3]	17201234	1			T22	156		T23	1162		T1	2120
all_values[4]	17201234	1			T22	156		T23	1162		T1	2120
all_values[5]	17201234	1			T22	156		T23	1162		T1	2120
all_values[6]	17201234	1			T22	156		T23	1162		T1	2120
all_values[7]	17201234	1			T22	156		T23	1162		T1	2120
all_values[8]	17201234	1			T22	156		T23	1162		T1	2120
all_values[9]	17201234	1			T22	156		T23	1162		T1	2120
all_values[10]	17201234	1			T22	156		T23	1162		T1	2120
all_values[11]	17201234	1			T22	156		T23	1162		T1	2120
all_values[12]	17201234	1			T22	156		T23	1162		T1	2120
all_values[13]	17201234	1			T22	156		T23	1162		T1	2120
all_values[14]	17201234	1			T22	156		T23	1162		T1	2120
all_values[15]	17201234	1			T22	156		T23	1162		T1	2120
all_values[16]	17201234	1			T22	156		T23	1162		T1	2120
all_values[17]	17201234	1			T22	156		T23	1162		T1	2120
all_values[18]	17201234	1			T22	156		T23	1162		T1	2120
all_values[19]	17201234	1			T22	156		T23	1162		T1	2120
all_values[20]	17201234	1			T22	156		T23	1162		T1	2120
all_values[21]	17201234	1			T22	156		T23	1162		T1	2120
all_values[22]	17201234	1			T22	156		T23	1162		T1	2120
all_values[23]	17201234	1			T22	156		T23	1162		T1	2120
all_values[24]	17201234	1			T22	156		T23	1162		T1	2120
all_values[25]	17201234	1			T22	156		T23	1162		T1	2120
all_values[26]	17201234	1			T22	156		T23	1162		T1	2120
all_values[27]	17201234	1			T22	156		T23	1162		T1	2120
all_values[28]	17201234	1			T22	156		T23	1162		T1	2120
all_values[29]	17201234	1			T22	156		T23	1162		T1	2120
all_values[30]	17201234	1			T22	156		T23	1162		T1	2120
all_values[31]	17201234	1			T22	156		T23	1162		T1	2120

---

Summary for Variable cp_intr_en

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_intr_en

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

308367462

1

T22

4992

T23

37184

T1

33992

auto[1]

242072026

1

T1

33848

T11

927115

T12

212

---

Summary for Variable cp_intr_state

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_intr_state

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

112656616

1

T22

4992

T23

37184

T1

6977

auto[1]

437782872

1

T1

60863

T11

168609

T12

542

---

Summary for Variable cp_intr_test

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_intr_test

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

544182463

1

T22

4992

T23

37184

T1

65132

auto[1]

6257025

1

T1

2708

T11

29034

T12

62

---

Summary for Cross intr_test_cg_cc

Samples crossed: cp_intr cp_intr_test cp_intr_en cp_intr_state

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
TOTAL	192	0	192	100.00
Automatically Generated Cross Bins	192	0	192	100.00
User Defined Cross Bins	0	0	0

Automatically Generated Cross Bins for intr_test_cg_cc

Bins

cp_intr	cp_intr_test	cp_intr_en	cp_intr_state	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_values[0]	auto[0]	auto[0]	auto[0]	2786910	1			T22	156		T23	1162		T1	84
all_values[0]	auto[0]	auto[0]	auto[1]	6747870	1			T1	1073		T11	25802		T12	12
all_values[0]	auto[0]	auto[1]	auto[0]	739430	1			T1	37		T11	2789		T12	4
all_values[0]	auto[0]	auto[1]	auto[1]	6731252	1			T1	849		T11	26088		T12	7
all_values[0]	auto[1]	auto[0]	auto[1]	98163	1			T1	39		T11	505		T2	2
all_values[0]	auto[1]	auto[1]	auto[1]	97609	1			T1	38		T11	425		T2	6
all_values[1]	auto[0]	auto[0]	auto[0]	2787062	1			T22	156		T23	1162		T1	100
all_values[1]	auto[0]	auto[0]	auto[1]	6730688	1			T1	895		T11	26191		T2	24
all_values[1]	auto[0]	auto[1]	auto[0]	734296	1			T1	79		T11	2842		T12	4
all_values[1]	auto[0]	auto[1]	auto[1]	6753258	1			T1	961		T11	25554		T12	7
all_values[1]	auto[1]	auto[0]	auto[1]	98296	1			T1	40		T11	511		T12	2
all_values[1]	auto[1]	auto[1]	auto[1]	97634	1			T1	45		T11	440		T2	1
all_values[2]	auto[0]	auto[0]	auto[0]	2790912	1			T22	156		T23	1162		T1	87
all_values[2]	auto[0]	auto[0]	auto[1]	6740037	1			T1	789		T11	27590		T12	18
all_values[2]	auto[0]	auto[1]	auto[0]	722265	1			T1	128		T11	2518		T16	19
all_values[2]	auto[0]	auto[1]	auto[1]	6752488	1			T1	1038		T11	24308		T2	3
all_values[2]	auto[1]	auto[0]	auto[1]	98316	1			T1	39		T11	449		T12	3
all_values[2]	auto[1]	auto[1]	auto[1]	97216	1			T1	39		T11	449		T18	30
all_values[3]	auto[0]	auto[0]	auto[0]	2788707	1			T22	156		T23	1162		T1	198
all_values[3]	auto[0]	auto[0]	auto[1]	6717911	1			T1	836		T11	24467		T12	24
all_values[3]	auto[0]	auto[1]	auto[0]	733482	1			T1	160		T11	3040		T2	17
all_values[3]	auto[0]	auto[1]	auto[1]	6765569	1			T1	828		T11	27065		T2	25
all_values[3]	auto[1]	auto[0]	auto[1]	97852	1			T1	55		T11	494		T12	2
all_values[3]	auto[1]	auto[1]	auto[1]	97713	1			T1	43		T11	411		T2	3
all_values[4]	auto[0]	auto[0]	auto[0]	2803659	1			T22	156		T23	1162		T1	86
all_values[4]	auto[0]	auto[0]	auto[1]	6775233	1			T1	922		T11	26037		T12	15
all_values[4]	auto[0]	auto[1]	auto[0]	734803	1			T1	153		T11	2808		T12	1
all_values[4]	auto[0]	auto[1]	auto[1]	6691833	1			T1	871		T11	25816		T12	10
all_values[4]	auto[1]	auto[0]	auto[1]	97698	1			T1	49		T11	482		T12	1
all_values[4]	auto[1]	auto[1]	auto[1]	98008	1			T1	39		T11	445		T2	3
all_values[5]	auto[0]	auto[0]	auto[0]	2791336	1			T22	156		T23	1162		T1	67
all_values[5]	auto[0]	auto[0]	auto[1]	6745786	1			T1	847		T11	25898		T12	17
all_values[5]	auto[0]	auto[1]	auto[0]	741505	1			T1	97		T11	2515		T2	4
all_values[5]	auto[0]	auto[1]	auto[1]	6727308	1			T1	1011		T11	25710		T2	18
all_values[5]	auto[1]	auto[0]	auto[1]	97505	1			T1	49		T11	485		T12	2
all_values[5]	auto[1]	auto[1]	auto[1]	97794	1			T1	49		T11	417		T2	2
all_values[6]	auto[0]	auto[0]	auto[0]	2786446	1			T22	156		T23	1162		T1	133
all_values[6]	auto[0]	auto[0]	auto[1]	6765637	1			T1	1057		T11	24745		T12	10
all_values[6]	auto[0]	auto[1]	auto[0]	726724	1			T1	67		T11	2507		T12	4
all_values[6]	auto[0]	auto[1]	auto[1]	6726770	1			T1	777		T11	26592		T2	24
all_values[6]	auto[1]	auto[0]	auto[1]	98067	1			T1	48		T11	449		T2	4
all_values[6]	auto[1]	auto[1]	auto[1]	97590	1			T1	38		T11	436		T12	1
all_values[7]	auto[0]	auto[0]	auto[0]	2789200	1			T22	156		T23	1162		T1	132
all_values[7]	auto[0]	auto[0]	auto[1]	6731549	1			T1	1063		T11	25261		T12	13
all_values[7]	auto[0]	auto[1]	auto[0]	733174	1			T1	58		T11	2945		T2	6
all_values[7]	auto[0]	auto[1]	auto[1]	6751688	1			T1	789		T11	25939		T2	2
all_values[7]	auto[1]	auto[0]	auto[1]	97924	1			T1	49		T11	435		T2	4
all_values[7]	auto[1]	auto[1]	auto[1]	97699	1			T1	29		T11	484		T2	1
all_values[8]	auto[0]	auto[0]	auto[0]	2787103	1			T22	156		T23	1162		T1	82
all_values[8]	auto[0]	auto[0]	auto[1]	6762013	1			T1	833		T11	25675		T12	15
all_values[8]	auto[0]	auto[1]	auto[0]	730547	1			T1	103		T11	2883		T2	4
all_values[8]	auto[0]	auto[1]	auto[1]	6726770	1			T1	1017		T11	26228		T2	10
all_values[8]	auto[1]	auto[0]	auto[1]	98011	1			T1	41		T11	447		T12	3
all_values[8]	auto[1]	auto[1]	auto[1]	96790	1			T1	44		T11	456		T18	31
all_values[9]	auto[0]	auto[0]	auto[0]	2787381	1			T22	156		T23	1162		T1	106
all_values[9]	auto[0]	auto[0]	auto[1]	6769119	1			T1	921		T11	27658		T12	11
all_values[9]	auto[0]	auto[1]	auto[0]	734182	1			T1	109		T11	2798		T12	4
all_values[9]	auto[0]	auto[1]	auto[1]	6715434	1			T1	895		T11	23848		T2	12
all_values[9]	auto[1]	auto[0]	auto[1]	97598	1			T1	43		T11	476		T12	1
all_values[9]	auto[1]	auto[1]	auto[1]	97520	1			T1	46		T11	422		T12	1
all_values[10]	auto[0]	auto[0]	auto[0]	2787454	1			T22	156		T23	1162		T1	120
all_values[10]	auto[0]	auto[0]	auto[1]	6775176	1			T1	945		T11	25866		T12	12
all_values[10]	auto[0]	auto[1]	auto[0]	725130	1			T1	103		T11	2934		T2	19
all_values[10]	auto[0]	auto[1]	auto[1]	6717810	1			T1	871		T11	25759		T2	3
all_values[10]	auto[1]	auto[0]	auto[1]	98474	1			T1	47		T11	421		T12	2
all_values[10]	auto[1]	auto[1]	auto[1]	97190	1			T1	34		T11	458		T2	2
all_values[11]	auto[0]	auto[0]	auto[0]	2782124	1			T22	156		T23	1162		T1	114
all_values[11]	auto[0]	auto[0]	auto[1]	6724501	1			T1	841		T11	27401		T12	16
all_values[11]	auto[0]	auto[1]	auto[0]	727349	1			T1	156		T11	2483		T2	3
all_values[11]	auto[0]	auto[1]	auto[1]	6771359	1			T1	929		T11	24501		T2	28
all_values[11]	auto[1]	auto[0]	auto[1]	98063	1			T1	38		T11	484		T12	3
all_values[11]	auto[1]	auto[1]	auto[1]	97838	1			T1	42		T11	421		T2	3
all_values[12]	auto[0]	auto[0]	auto[0]	2781971	1			T22	156		T23	1162		T1	159
all_values[12]	auto[0]	auto[0]	auto[1]	6729860	1			T1	827		T11	24131		T12	13
all_values[12]	auto[0]	auto[1]	auto[0]	740086	1			T1	120		T11	2835		T12	11
all_values[12]	auto[0]	auto[1]	auto[1]	6754106	1			T1	942		T11	27866		T12	4
all_values[12]	auto[1]	auto[0]	auto[1]	98179	1			T1	44		T11	416		T2	2
all_values[12]	auto[1]	auto[1]	auto[1]	97032	1			T1	28		T11	486		T12	1
all_values[13]	auto[0]	auto[0]	auto[0]	2787063	1			T22	156		T23	1162		T1	106
all_values[13]	auto[0]	auto[0]	auto[1]	6716117	1			T1	964		T11	26067		T12	9
all_values[13]	auto[0]	auto[1]	auto[0]	742330	1			T1	89		T11	2670		T2	24
all_values[13]	auto[0]	auto[1]	auto[1]	6760240	1			T1	884		T11	26000		T2	24
all_values[13]	auto[1]	auto[0]	auto[1]	97889	1			T1	35		T11	410		T12	3
all_values[13]	auto[1]	auto[1]	auto[1]	97595	1			T1	42		T11	472		T2	2
all_values[14]	auto[0]	auto[0]	auto[0]	2792030	1			T22	156		T23	1162		T1	137
all_values[14]	auto[0]	auto[0]	auto[1]	6740575	1			T1	684		T11	26421		T12	10
all_values[14]	auto[0]	auto[1]	auto[0]	720592	1			T1	207		T11	2905		T2	12
all_values[14]	auto[0]	auto[1]	auto[1]	6752521	1			T1	1012		T11	25528		T2	16
all_values[14]	auto[1]	auto[0]	auto[1]	97749	1			T1	31		T11	466		T12	3
all_values[14]	auto[1]	auto[1]	auto[1]	97767	1			T1	49		T11	432		T16	1
all_values[15]	auto[0]	auto[0]	auto[0]	2788009	1			T22	156		T23	1162		T1	82
all_values[15]	auto[0]	auto[0]	auto[1]	6750654	1			T1	937		T11	25994		T12	14
all_values[15]	auto[0]	auto[1]	auto[0]	732180	1			T1	178		T11	3069		T2	17
all_values[15]	auto[0]	auto[1]	auto[1]	6734440	1			T1	838		T11	25054		T2	9
all_values[15]	auto[1]	auto[0]	auto[1]	98717	1			T1	42		T11	483		T12	3
all_values[15]	auto[1]	auto[1]	auto[1]	97234	1			T1	43		T11	423		T2	3
all_values[16]	auto[0]	auto[0]	auto[0]	2780730	1			T22	156		T23	1162		T1	105
all_values[16]	auto[0]	auto[0]	auto[1]	6767486	1			T1	996		T11	26004		T2	23
all_values[16]	auto[0]	auto[1]	auto[0]	733787	1			T1	74		T11	2469		T12	5
all_values[16]	auto[0]	auto[1]	auto[1]	6723716	1			T1	865		T11	26039		T12	9
all_values[16]	auto[1]	auto[0]	auto[1]	98220	1			T1	36		T11	417		T2	5
all_values[16]	auto[1]	auto[1]	auto[1]	97295	1			T1	44		T11	489		T12	2
all_values[17]	auto[0]	auto[0]	auto[0]	2793467	1			T22	156		T23	1162		T1	71
all_values[17]	auto[0]	auto[0]	auto[1]	6760874	1			T1	895		T11	24941		T12	23
all_values[17]	auto[0]	auto[1]	auto[0]	728759	1			T1	136		T11	2723		T12	4
all_values[17]	auto[0]	auto[1]	auto[1]	6722316	1			T1	927		T11	26972		T2	17
all_values[17]	auto[1]	auto[0]	auto[1]	98575	1			T1	44		T11	441		T2	2
all_values[17]	auto[1]	auto[1]	auto[1]	97243	1			T1	47		T11	423		T12	1
all_values[18]	auto[0]	auto[0]	auto[0]	2790234	1			T22	156		T23	1162		T1	159
all_values[18]	auto[0]	auto[0]	auto[1]	6750405	1			T1	821		T11	26917		T12	14
all_values[18]	auto[0]	auto[1]	auto[0]	735274	1			T1	95		T11	3079		T12	3
all_values[18]	auto[0]	auto[1]	auto[1]	6730258	1			T1	958		T11	24707		T12	7
all_values[18]	auto[1]	auto[0]	auto[1]	97881	1			T1	32		T11	461		T12	1
all_values[18]	auto[1]	auto[1]	auto[1]	97182	1			T1	55		T11	463		T12	1
all_values[19]	auto[0]	auto[0]	auto[0]	2786319	1			T22	156		T23	1162		T1	76
all_values[19]	auto[0]	auto[0]	auto[1]	6769815	1			T1	899		T11	25375		T12	14
all_values[19]	auto[0]	auto[1]	auto[0]	731885	1			T1	109		T11	2952		T2	7
all_values[19]	auto[0]	auto[1]	auto[1]	6718039	1			T1	954		T11	26373		T2	18
all_values[19]	auto[1]	auto[0]	auto[1]	98238	1			T1	42		T11	461		T12	3
all_values[19]	auto[1]	auto[1]	auto[1]	96938	1			T1	40		T11	427		T2	3
all_values[20]	auto[0]	auto[0]	auto[0]	2786414	1			T22	156		T23	1162		T1	68
all_values[20]	auto[0]	auto[0]	auto[1]	6721762	1			T1	1004		T11	26036		T12	13
all_values[20]	auto[0]	auto[1]	auto[0]	741210	1			T1	126		T11	2849		T12	2
all_values[20]	auto[0]	auto[1]	auto[1]	6756148	1			T1	842		T11	25622		T12	3
all_values[20]	auto[1]	auto[0]	auto[1]	98471	1			T1	44		T11	427		T12	2
all_values[20]	auto[1]	auto[1]	auto[1]	97229	1			T1	36		T11	478		T16	1
all_values[21]	auto[0]	auto[0]	auto[0]	2784935	1			T22	156		T23	1162		T1	87
all_values[21]	auto[0]	auto[0]	auto[1]	6757779	1			T1	1067		T11	25716		T12	3
all_values[21]	auto[0]	auto[1]	auto[0]	734792	1			T1	123		T11	2621		T12	9
all_values[21]	auto[0]	auto[1]	auto[1]	6728118	1			T1	758		T11	26475		T12	6
all_values[21]	auto[1]	auto[0]	auto[1]	98485	1			T1	55		T11	431		T2	3
all_values[21]	auto[1]	auto[1]	auto[1]	97125	1			T1	30		T11	446		T12	1
all_values[22]	auto[0]	auto[0]	auto[0]	2783820	1			T22	156		T23	1162		T1	138
all_values[22]	auto[0]	auto[0]	auto[1]	6756992	1			T1	796		T11	27127		T12	12
all_values[22]	auto[0]	auto[1]	auto[0]	734913	1			T1	150		T11	2512		T2	8
all_values[22]	auto[0]	auto[1]	auto[1]	6729891	1			T1	948		T11	24413		T2	11
all_values[22]	auto[1]	auto[0]	auto[1]	97752	1			T1	44		T11	470		T12	1
all_values[22]	auto[1]	auto[1]	auto[1]	97866	1			T1	44		T11	426		T2	2
all_values[23]	auto[0]	auto[0]	auto[0]	2784032	1			T22	156		T23	1162		T1	80
all_values[23]	auto[0]	auto[0]	auto[1]	6753472	1			T1	751		T11	27907		T12	17
all_values[23]	auto[0]	auto[1]	auto[0]	732954	1			T1	64		T11	2498		T12	3
all_values[23]	auto[0]	auto[1]	auto[1]	6735443	1			T1	1140		T11	23951		T12	1
all_values[23]	auto[1]	auto[0]	auto[1]	98033	1			T1	26		T11	478		T12	1
all_values[23]	auto[1]	auto[1]	auto[1]	97300	1			T1	59		T11	457		T12	1
all_values[24]	auto[0]	auto[0]	auto[0]	2785384	1			T22	156		T23	1162		T1	55
all_values[24]	auto[0]	auto[0]	auto[1]	6772859	1			T1	982		T11	26480		T12	10
all_values[24]	auto[0]	auto[1]	auto[0]	738020	1			T1	99		T11	2688		T12	4
all_values[24]	auto[0]	auto[1]	auto[1]	6709475	1			T1	905		T11	25223		T12	10
all_values[24]	auto[1]	auto[0]	auto[1]	97808	1			T1	46		T11	470		T12	1
all_values[24]	auto[1]	auto[1]	auto[1]	97688	1			T1	33		T11	446		T12	2
all_values[25]	auto[0]	auto[0]	auto[0]	2795195	1			T22	156		T23	1162		T1	101
all_values[25]	auto[0]	auto[0]	auto[1]	6779537	1			T1	821		T11	26118		T12	6
all_values[25]	auto[0]	auto[1]	auto[0]	720356	1			T1	159		T11	2772		T12	7
all_values[25]	auto[0]	auto[1]	auto[1]	6710770	1			T1	943		T11	25576		T12	7
all_values[25]	auto[1]	auto[0]	auto[1]	98274	1			T1	59		T11	476		T12	1
all_values[25]	auto[1]	auto[1]	auto[1]	97102	1			T1	37		T11	459		T12	2
all_values[26]	auto[0]	auto[0]	auto[0]	2789896	1			T22	156		T23	1162		T1	81
all_values[26]	auto[0]	auto[0]	auto[1]	6759122	1			T1	722		T11	25524		T12	17
all_values[26]	auto[0]	auto[1]	auto[0]	727000	1			T1	111		T11	2616		T12	2
all_values[26]	auto[0]	auto[1]	auto[1]	6729962	1			T1	1106		T11	26636		T12	3
all_values[26]	auto[1]	auto[0]	auto[1]	98136	1			T1	37		T11	455		T12	1
all_values[26]	auto[1]	auto[1]	auto[1]	97118	1			T1	63		T11	447		T2	3
all_values[27]	auto[0]	auto[0]	auto[0]	2783755	1			T22	156		T23	1162		T1	110
all_values[27]	auto[0]	auto[0]	auto[1]	6740892	1			T1	1059		T11	24680		T12	11
all_values[27]	auto[0]	auto[1]	auto[0]	730615	1			T1	102		T11	2691		T12	5
all_values[27]	auto[0]	auto[1]	auto[1]	6750565	1			T1	761		T11	27316		T2	10
all_values[27]	auto[1]	auto[0]	auto[1]	98103	1			T1	55		T11	428		T12	1
all_values[27]	auto[1]	auto[1]	auto[1]	97304	1			T1	33		T11	480		T2	2
all_values[28]	auto[0]	auto[0]	auto[0]	2784895	1			T22	156		T23	1162		T1	135
all_values[28]	auto[0]	auto[0]	auto[1]	6747639	1			T1	1080		T11	26106		T12	13
all_values[28]	auto[0]	auto[1]	auto[0]	732360	1			T1	69		T11	2846		T12	2
all_values[28]	auto[0]	auto[1]	auto[1]	6740136	1			T1	758		T11	25688		T12	3
all_values[28]	auto[1]	auto[0]	auto[1]	98218	1			T1	53		T11	465		T12	2
all_values[28]	auto[1]	auto[1]	auto[1]	97986	1			T1	25		T11	432		T2	1
all_values[29]	auto[0]	auto[0]	auto[0]	2784802	1			T22	156		T23	1162		T1	112
all_values[29]	auto[0]	auto[0]	auto[1]	6756737	1			T1	910		T11	26156		T12	3
all_values[29]	auto[0]	auto[1]	auto[0]	727821	1			T1	135		T11	2406		T12	8
all_values[29]	auto[0]	auto[1]	auto[1]	6736474	1			T1	876		T11	26200		T12	6
all_values[29]	auto[1]	auto[0]	auto[1]	97994	1			T1	42		T11	479		T2	3
all_values[29]	auto[1]	auto[1]	auto[1]	97406	1			T1	45		T11	477		T12	2
all_values[30]	auto[0]	auto[0]	auto[0]	2787835	1			T22	156		T23	1162		T1	103
all_values[30]	auto[0]	auto[0]	auto[1]	6750685	1			T1	1002		T11	25845		T12	8
all_values[30]	auto[0]	auto[1]	auto[0]	747740	1			T1	112		T11	2715		T12	4
all_values[30]	auto[0]	auto[1]	auto[1]	6719038	1			T1	815		T11	25767		T12	9
all_values[30]	auto[1]	auto[0]	auto[1]	98126	1			T1	47		T11	468		T12	1
all_values[30]	auto[1]	auto[1]	auto[1]	97810	1			T1	41		T11	450		T12	3
all_values[31]	auto[0]	auto[0]	auto[0]	2785229	1			T22	156		T23	1162		T1	98
all_values[31]	auto[0]	auto[0]	auto[1]	6755598	1			T1	993		T11	25813		T12	7
all_values[31]	auto[0]	auto[1]	auto[0]	736746	1			T1	97		T11	2712		T12	7
all_values[31]	auto[0]	auto[1]	auto[1]	6728272	1			T1	855		T11	26298		T12	8
all_values[31]	auto[1]	auto[0]	auto[1]	97958	1			T1	37		T11	481		T2	3
all_values[31]	auto[1]	auto[1]	auto[1]	97431	1			T1	40		T11	436		T12	1

User Defined Cross Bins for intr_test_cg_cc

Excluded/Illegal bins

NAME	COUNT	STATUS
test_1_state_0	0	Illegal