Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
9650150 |
1 |
|
|
T22 |
156 |
|
T23 |
1162 |
|
T1 |
1238 |
| auto[1] |
7551084 |
1 |
|
|
T1 |
882 |
|
T11 |
29535 |
|
T12 |
5 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
16231885 |
1 |
|
|
T22 |
156 |
|
T23 |
1162 |
|
T1 |
2083 |
| auto[1] |
969349 |
1 |
|
|
T1 |
37 |
|
T11 |
3336 |
|
T2 |
2 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
9625211 |
1 |
|
|
T22 |
156 |
|
T23 |
1162 |
|
T1 |
929 |
| auto[1] |
7576023 |
1 |
|
|
T1 |
1191 |
|
T11 |
27554 |
|
T12 |
3 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
3322000 |
1 |
|
|
T1 |
646 |
|
T11 |
11459 |
|
T12 |
3 |
| auto[1] |
auto[0] |
auto[1] |
487016 |
1 |
|
|
T1 |
14 |
|
T11 |
1503 |
|
T2 |
1 |
| auto[1] |
auto[1] |
auto[0] |
3284674 |
1 |
|
|
T1 |
508 |
|
T11 |
12759 |
|
T2 |
27 |
| auto[1] |
auto[1] |
auto[1] |
482333 |
1 |
|
|
T1 |
23 |
|
T11 |
1833 |
|
T2 |
1 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |