Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
9630752 |
1 |
|
|
T22 |
156 |
|
T23 |
1162 |
|
T1 |
1268 |
| auto[1] |
7570482 |
1 |
|
|
T1 |
852 |
|
T11 |
28966 |
|
T12 |
5 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
16226977 |
1 |
|
|
T22 |
156 |
|
T23 |
1162 |
|
T1 |
2065 |
| auto[1] |
974257 |
1 |
|
|
T1 |
55 |
|
T11 |
3641 |
|
T2 |
1 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
9603633 |
1 |
|
|
T22 |
156 |
|
T23 |
1162 |
|
T1 |
991 |
| auto[1] |
7597601 |
1 |
|
|
T1 |
1129 |
|
T11 |
29749 |
|
T12 |
4 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
3322914 |
1 |
|
|
T1 |
605 |
|
T11 |
12771 |
|
T2 |
15 |
| auto[1] |
auto[0] |
auto[1] |
490004 |
1 |
|
|
T1 |
36 |
|
T11 |
1790 |
|
T2 |
1 |
| auto[1] |
auto[1] |
auto[0] |
3300430 |
1 |
|
|
T1 |
469 |
|
T11 |
13337 |
|
T12 |
4 |
| auto[1] |
auto[1] |
auto[1] |
484253 |
1 |
|
|
T1 |
19 |
|
T11 |
1851 |
|
T18 |
16 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |