Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2538802 |
1 |
|
|
T32 |
3434 |
|
T1 |
34 |
|
T11 |
71 |
| auto[1] |
2213039 |
1 |
|
|
T32 |
3528 |
|
T1 |
19 |
|
T11 |
40 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2986737 |
1 |
|
|
T32 |
4336 |
|
T1 |
47 |
|
T11 |
100 |
| auto[1] |
1765104 |
1 |
|
|
T32 |
2626 |
|
T1 |
6 |
|
T11 |
11 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
1648382 |
1 |
|
|
T32 |
2182 |
|
T1 |
34 |
|
T11 |
67 |
| auto[0] |
auto[1] |
890420 |
1 |
|
|
T32 |
1252 |
|
T11 |
4 |
|
T12 |
22 |
| auto[1] |
auto[0] |
1338355 |
1 |
|
|
T32 |
2154 |
|
T1 |
13 |
|
T11 |
33 |
| auto[1] |
auto[1] |
874684 |
1 |
|
|
T32 |
1374 |
|
T1 |
6 |
|
T11 |
7 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2532718 |
1 |
|
|
T32 |
3771 |
|
T1 |
35 |
|
T11 |
79 |
| auto[1] |
2219123 |
1 |
|
|
T32 |
3191 |
|
T1 |
18 |
|
T11 |
32 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2990719 |
1 |
|
|
T32 |
4226 |
|
T1 |
41 |
|
T11 |
103 |
| auto[1] |
1761122 |
1 |
|
|
T32 |
2736 |
|
T1 |
12 |
|
T11 |
8 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
1647998 |
1 |
|
|
T32 |
2371 |
|
T1 |
34 |
|
T11 |
76 |
| auto[0] |
auto[1] |
884720 |
1 |
|
|
T32 |
1400 |
|
T1 |
1 |
|
T11 |
3 |
| auto[1] |
auto[0] |
1342721 |
1 |
|
|
T32 |
1855 |
|
T1 |
7 |
|
T11 |
27 |
| auto[1] |
auto[1] |
876402 |
1 |
|
|
T32 |
1336 |
|
T1 |
11 |
|
T11 |
5 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2538075 |
1 |
|
|
T32 |
3710 |
|
T1 |
45 |
|
T11 |
72 |
| auto[1] |
2213766 |
1 |
|
|
T32 |
3252 |
|
T1 |
8 |
|
T11 |
39 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2986111 |
1 |
|
|
T32 |
4432 |
|
T1 |
51 |
|
T11 |
93 |
| auto[1] |
1765730 |
1 |
|
|
T32 |
2530 |
|
T1 |
2 |
|
T11 |
18 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
1648923 |
1 |
|
|
T32 |
2449 |
|
T1 |
45 |
|
T11 |
67 |
| auto[0] |
auto[1] |
889152 |
1 |
|
|
T32 |
1261 |
|
T11 |
5 |
|
T12 |
13 |
| auto[1] |
auto[0] |
1337188 |
1 |
|
|
T32 |
1983 |
|
T1 |
6 |
|
T11 |
26 |
| auto[1] |
auto[1] |
876578 |
1 |
|
|
T32 |
1269 |
|
T1 |
2 |
|
T11 |
13 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2535814 |
1 |
|
|
T32 |
3640 |
|
T1 |
43 |
|
T11 |
74 |
| auto[1] |
2216027 |
1 |
|
|
T32 |
3322 |
|
T1 |
10 |
|
T11 |
37 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2990711 |
1 |
|
|
T32 |
4303 |
|
T1 |
53 |
|
T11 |
95 |
| auto[1] |
1761130 |
1 |
|
|
T32 |
2659 |
|
T11 |
16 |
|
T12 |
37 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
1648595 |
1 |
|
|
T32 |
2330 |
|
T1 |
43 |
|
T11 |
66 |
| auto[0] |
auto[1] |
887219 |
1 |
|
|
T32 |
1310 |
|
T11 |
8 |
|
T12 |
20 |
| auto[1] |
auto[0] |
1342116 |
1 |
|
|
T32 |
1973 |
|
T1 |
10 |
|
T11 |
29 |
| auto[1] |
auto[1] |
873911 |
1 |
|
|
T32 |
1349 |
|
T11 |
8 |
|
T12 |
17 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2535741 |
1 |
|
|
T32 |
3549 |
|
T1 |
38 |
|
T11 |
64 |
| auto[1] |
2216100 |
1 |
|
|
T32 |
3413 |
|
T1 |
15 |
|
T11 |
47 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2985532 |
1 |
|
|
T32 |
4398 |
|
T1 |
46 |
|
T11 |
86 |
| auto[1] |
1766309 |
1 |
|
|
T32 |
2564 |
|
T1 |
7 |
|
T11 |
25 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
1645566 |
1 |
|
|
T32 |
2301 |
|
T1 |
36 |
|
T11 |
53 |
| auto[0] |
auto[1] |
890175 |
1 |
|
|
T32 |
1248 |
|
T1 |
2 |
|
T11 |
11 |
| auto[1] |
auto[0] |
1339966 |
1 |
|
|
T32 |
2097 |
|
T1 |
10 |
|
T11 |
33 |
| auto[1] |
auto[1] |
876134 |
1 |
|
|
T32 |
1316 |
|
T1 |
5 |
|
T11 |
14 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2536891 |
1 |
|
|
T32 |
3699 |
|
T1 |
44 |
|
T11 |
52 |
| auto[1] |
2214950 |
1 |
|
|
T32 |
3263 |
|
T1 |
9 |
|
T11 |
59 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2986772 |
1 |
|
|
T32 |
4373 |
|
T1 |
49 |
|
T11 |
90 |
| auto[1] |
1765069 |
1 |
|
|
T32 |
2589 |
|
T1 |
4 |
|
T11 |
21 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
1647138 |
1 |
|
|
T32 |
2368 |
|
T1 |
43 |
|
T11 |
49 |
| auto[0] |
auto[1] |
889753 |
1 |
|
|
T32 |
1331 |
|
T1 |
1 |
|
T11 |
3 |
| auto[1] |
auto[0] |
1339634 |
1 |
|
|
T32 |
2005 |
|
T1 |
6 |
|
T11 |
41 |
| auto[1] |
auto[1] |
875316 |
1 |
|
|
T32 |
1258 |
|
T1 |
3 |
|
T11 |
18 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2538364 |
1 |
|
|
T32 |
3790 |
|
T1 |
35 |
|
T11 |
67 |
| auto[1] |
2213477 |
1 |
|
|
T32 |
3172 |
|
T1 |
18 |
|
T11 |
44 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2990662 |
1 |
|
|
T32 |
4252 |
|
T1 |
45 |
|
T11 |
85 |
| auto[1] |
1761179 |
1 |
|
|
T32 |
2710 |
|
T1 |
8 |
|
T11 |
26 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
1650943 |
1 |
|
|
T32 |
2422 |
|
T1 |
35 |
|
T11 |
53 |
| auto[0] |
auto[1] |
887421 |
1 |
|
|
T32 |
1368 |
|
T11 |
14 |
|
T12 |
7 |
| auto[1] |
auto[0] |
1339719 |
1 |
|
|
T32 |
1830 |
|
T1 |
10 |
|
T11 |
32 |
| auto[1] |
auto[1] |
873758 |
1 |
|
|
T32 |
1342 |
|
T1 |
8 |
|
T11 |
12 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2533106 |
1 |
|
|
T32 |
3588 |
|
T1 |
30 |
|
T11 |
79 |
| auto[1] |
2218735 |
1 |
|
|
T32 |
3374 |
|
T1 |
23 |
|
T11 |
32 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2988355 |
1 |
|
|
T32 |
4236 |
|
T1 |
47 |
|
T11 |
101 |
| auto[1] |
1763486 |
1 |
|
|
T32 |
2726 |
|
T1 |
6 |
|
T11 |
10 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
1647595 |
1 |
|
|
T32 |
2280 |
|
T1 |
28 |
|
T11 |
75 |
| auto[0] |
auto[1] |
885511 |
1 |
|
|
T32 |
1308 |
|
T1 |
2 |
|
T11 |
4 |
| auto[1] |
auto[0] |
1340760 |
1 |
|
|
T32 |
1956 |
|
T1 |
19 |
|
T11 |
26 |
| auto[1] |
auto[1] |
877975 |
1 |
|
|
T32 |
1418 |
|
T1 |
4 |
|
T11 |
6 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2536880 |
1 |
|
|
T32 |
3655 |
|
T1 |
40 |
|
T11 |
74 |
| auto[1] |
2214961 |
1 |
|
|
T32 |
3307 |
|
T1 |
13 |
|
T11 |
37 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2997879 |
1 |
|
|
T32 |
4485 |
|
T1 |
50 |
|
T11 |
106 |
| auto[1] |
1753962 |
1 |
|
|
T32 |
2477 |
|
T1 |
3 |
|
T11 |
5 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
1653199 |
1 |
|
|
T32 |
2374 |
|
T1 |
38 |
|
T11 |
72 |
| auto[0] |
auto[1] |
883681 |
1 |
|
|
T32 |
1281 |
|
T1 |
2 |
|
T11 |
2 |
| auto[1] |
auto[0] |
1344680 |
1 |
|
|
T32 |
2111 |
|
T1 |
12 |
|
T11 |
34 |
| auto[1] |
auto[1] |
870281 |
1 |
|
|
T32 |
1196 |
|
T1 |
1 |
|
T11 |
3 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2534163 |
1 |
|
|
T32 |
3759 |
|
T1 |
43 |
|
T11 |
79 |
| auto[1] |
2217678 |
1 |
|
|
T32 |
3203 |
|
T1 |
10 |
|
T11 |
32 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2996292 |
1 |
|
|
T32 |
4411 |
|
T1 |
51 |
|
T11 |
102 |
| auto[1] |
1755549 |
1 |
|
|
T32 |
2551 |
|
T1 |
2 |
|
T11 |
9 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
1649846 |
1 |
|
|
T32 |
2423 |
|
T1 |
41 |
|
T11 |
75 |
| auto[0] |
auto[1] |
884317 |
1 |
|
|
T32 |
1336 |
|
T1 |
2 |
|
T11 |
4 |
| auto[1] |
auto[0] |
1346446 |
1 |
|
|
T32 |
1988 |
|
T1 |
10 |
|
T11 |
27 |
| auto[1] |
auto[1] |
871232 |
1 |
|
|
T32 |
1215 |
|
T11 |
5 |
|
T12 |
13 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2535890 |
1 |
|
|
T32 |
3332 |
|
T1 |
50 |
|
T11 |
79 |
| auto[1] |
2215951 |
1 |
|
|
T32 |
3630 |
|
T1 |
3 |
|
T11 |
32 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2997968 |
1 |
|
|
T32 |
4365 |
|
T1 |
50 |
|
T11 |
95 |
| auto[1] |
1753873 |
1 |
|
|
T32 |
2597 |
|
T1 |
3 |
|
T11 |
16 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
1652767 |
1 |
|
|
T32 |
2150 |
|
T1 |
47 |
|
T11 |
63 |
| auto[0] |
auto[1] |
883123 |
1 |
|
|
T32 |
1182 |
|
T1 |
3 |
|
T11 |
16 |
| auto[1] |
auto[0] |
1345201 |
1 |
|
|
T32 |
2215 |
|
T1 |
3 |
|
T11 |
32 |
| auto[1] |
auto[1] |
870750 |
1 |
|
|
T32 |
1415 |
|
T12 |
22 |
|
T13 |
23028 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2541357 |
1 |
|
|
T32 |
3724 |
|
T1 |
45 |
|
T11 |
69 |
| auto[1] |
2210484 |
1 |
|
|
T32 |
3238 |
|
T1 |
8 |
|
T11 |
42 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2994892 |
1 |
|
|
T32 |
4399 |
|
T1 |
51 |
|
T11 |
104 |
| auto[1] |
1756949 |
1 |
|
|
T32 |
2563 |
|
T1 |
2 |
|
T11 |
7 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
1655057 |
1 |
|
|
T32 |
2392 |
|
T1 |
43 |
|
T11 |
67 |
| auto[0] |
auto[1] |
886300 |
1 |
|
|
T32 |
1332 |
|
T1 |
2 |
|
T11 |
2 |
| auto[1] |
auto[0] |
1339835 |
1 |
|
|
T32 |
2007 |
|
T1 |
8 |
|
T11 |
37 |
| auto[1] |
auto[1] |
870649 |
1 |
|
|
T32 |
1231 |
|
T11 |
5 |
|
T12 |
22 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2538305 |
1 |
|
|
T32 |
3753 |
|
T1 |
40 |
|
T11 |
83 |
| auto[1] |
2213536 |
1 |
|
|
T32 |
3209 |
|
T1 |
13 |
|
T11 |
28 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2987048 |
1 |
|
|
T32 |
4363 |
|
T1 |
53 |
|
T11 |
105 |
| auto[1] |
1764793 |
1 |
|
|
T32 |
2599 |
|
T11 |
6 |
|
T12 |
37 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
1649022 |
1 |
|
|
T32 |
2418 |
|
T1 |
40 |
|
T11 |
82 |
| auto[0] |
auto[1] |
889283 |
1 |
|
|
T32 |
1335 |
|
T11 |
1 |
|
T12 |
17 |
| auto[1] |
auto[0] |
1338026 |
1 |
|
|
T32 |
1945 |
|
T1 |
13 |
|
T11 |
23 |
| auto[1] |
auto[1] |
875510 |
1 |
|
|
T32 |
1264 |
|
T11 |
5 |
|
T12 |
20 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2535735 |
1 |
|
|
T32 |
3678 |
|
T1 |
40 |
|
T11 |
77 |
| auto[1] |
2216106 |
1 |
|
|
T32 |
3284 |
|
T1 |
13 |
|
T11 |
34 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2997646 |
1 |
|
|
T32 |
4359 |
|
T1 |
51 |
|
T11 |
93 |
| auto[1] |
1754195 |
1 |
|
|
T32 |
2603 |
|
T1 |
2 |
|
T11 |
18 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
1653251 |
1 |
|
|
T32 |
2381 |
|
T1 |
38 |
|
T11 |
74 |
| auto[0] |
auto[1] |
882484 |
1 |
|
|
T32 |
1297 |
|
T1 |
2 |
|
T11 |
3 |
| auto[1] |
auto[0] |
1344395 |
1 |
|
|
T32 |
1978 |
|
T1 |
13 |
|
T11 |
19 |
| auto[1] |
auto[1] |
871711 |
1 |
|
|
T32 |
1306 |
|
T11 |
15 |
|
T12 |
19 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2535812 |
1 |
|
|
T32 |
3592 |
|
T1 |
36 |
|
T11 |
70 |
| auto[1] |
2216029 |
1 |
|
|
T32 |
3370 |
|
T1 |
17 |
|
T11 |
41 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3001836 |
1 |
|
|
T32 |
4308 |
|
T1 |
50 |
|
T11 |
106 |
| auto[1] |
1750005 |
1 |
|
|
T32 |
2654 |
|
T1 |
3 |
|
T11 |
5 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
1654426 |
1 |
|
|
T32 |
2297 |
|
T1 |
36 |
|
T11 |
69 |
| auto[0] |
auto[1] |
881386 |
1 |
|
|
T32 |
1295 |
|
T11 |
1 |
|
T12 |
19 |
| auto[1] |
auto[0] |
1347410 |
1 |
|
|
T32 |
2011 |
|
T1 |
14 |
|
T11 |
37 |
| auto[1] |
auto[1] |
868619 |
1 |
|
|
T32 |
1359 |
|
T1 |
3 |
|
T11 |
4 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2537031 |
1 |
|
|
T32 |
3596 |
|
T1 |
40 |
|
T11 |
84 |
| auto[1] |
2214810 |
1 |
|
|
T32 |
3366 |
|
T1 |
13 |
|
T11 |
27 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2996446 |
1 |
|
|
T32 |
4353 |
|
T1 |
51 |
|
T11 |
102 |
| auto[1] |
1755395 |
1 |
|
|
T32 |
2609 |
|
T1 |
2 |
|
T11 |
9 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
1653815 |
1 |
|
|
T32 |
2320 |
|
T1 |
40 |
|
T11 |
83 |
| auto[0] |
auto[1] |
883216 |
1 |
|
|
T32 |
1276 |
|
T11 |
1 |
|
T12 |
14 |
| auto[1] |
auto[0] |
1342631 |
1 |
|
|
T32 |
2033 |
|
T1 |
11 |
|
T11 |
19 |
| auto[1] |
auto[1] |
872179 |
1 |
|
|
T32 |
1333 |
|
T1 |
2 |
|
T11 |
8 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2533419 |
1 |
|
|
T32 |
3628 |
|
T1 |
44 |
|
T11 |
66 |
| auto[1] |
2218422 |
1 |
|
|
T32 |
3334 |
|
T1 |
9 |
|
T11 |
45 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2998373 |
1 |
|
|
T32 |
4376 |
|
T1 |
53 |
|
T11 |
99 |
| auto[1] |
1753468 |
1 |
|
|
T32 |
2586 |
|
T11 |
12 |
|
T12 |
29 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
1652254 |
1 |
|
|
T32 |
2387 |
|
T1 |
44 |
|
T11 |
66 |
| auto[0] |
auto[1] |
881165 |
1 |
|
|
T32 |
1241 |
|
T12 |
11 |
|
T13 |
22945 |
| auto[1] |
auto[0] |
1346119 |
1 |
|
|
T32 |
1989 |
|
T1 |
9 |
|
T11 |
33 |
| auto[1] |
auto[1] |
872303 |
1 |
|
|
T32 |
1345 |
|
T11 |
12 |
|
T12 |
18 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2538280 |
1 |
|
|
T32 |
3638 |
|
T1 |
48 |
|
T11 |
79 |
| auto[1] |
2213561 |
1 |
|
|
T32 |
3324 |
|
T1 |
5 |
|
T11 |
32 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2993227 |
1 |
|
|
T32 |
4269 |
|
T1 |
51 |
|
T11 |
98 |
| auto[1] |
1758614 |
1 |
|
|
T32 |
2693 |
|
T1 |
2 |
|
T11 |
13 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
1652676 |
1 |
|
|
T32 |
2281 |
|
T1 |
48 |
|
T11 |
74 |
| auto[0] |
auto[1] |
885604 |
1 |
|
|
T32 |
1357 |
|
T11 |
5 |
|
T12 |
16 |
| auto[1] |
auto[0] |
1340551 |
1 |
|
|
T32 |
1988 |
|
T1 |
3 |
|
T11 |
24 |
| auto[1] |
auto[1] |
873010 |
1 |
|
|
T32 |
1336 |
|
T1 |
2 |
|
T11 |
8 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2535633 |
1 |
|
|
T32 |
3590 |
|
T1 |
41 |
|
T11 |
80 |
| auto[1] |
2216208 |
1 |
|
|
T32 |
3372 |
|
T1 |
12 |
|
T11 |
31 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2994361 |
1 |
|
|
T32 |
4378 |
|
T1 |
49 |
|
T11 |
103 |
| auto[1] |
1757480 |
1 |
|
|
T32 |
2584 |
|
T1 |
4 |
|
T11 |
8 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
1650141 |
1 |
|
|
T32 |
2265 |
|
T1 |
37 |
|
T11 |
77 |
| auto[0] |
auto[1] |
885492 |
1 |
|
|
T32 |
1325 |
|
T1 |
4 |
|
T11 |
3 |
| auto[1] |
auto[0] |
1344220 |
1 |
|
|
T32 |
2113 |
|
T1 |
12 |
|
T11 |
26 |
| auto[1] |
auto[1] |
871988 |
1 |
|
|
T32 |
1259 |
|
T11 |
5 |
|
T12 |
21 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2533752 |
1 |
|
|
T32 |
3744 |
|
T1 |
47 |
|
T11 |
68 |
| auto[1] |
2218089 |
1 |
|
|
T32 |
3218 |
|
T1 |
6 |
|
T11 |
43 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2995338 |
1 |
|
|
T32 |
4435 |
|
T1 |
52 |
|
T11 |
99 |
| auto[1] |
1756503 |
1 |
|
|
T32 |
2527 |
|
T1 |
1 |
|
T11 |
12 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
1648755 |
1 |
|
|
T32 |
2375 |
|
T1 |
46 |
|
T11 |
66 |
| auto[0] |
auto[1] |
884997 |
1 |
|
|
T32 |
1369 |
|
T1 |
1 |
|
T11 |
2 |
| auto[1] |
auto[0] |
1346583 |
1 |
|
|
T32 |
2060 |
|
T1 |
6 |
|
T11 |
33 |
| auto[1] |
auto[1] |
871506 |
1 |
|
|
T32 |
1158 |
|
T11 |
10 |
|
T12 |
19 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2538010 |
1 |
|
|
T32 |
3532 |
|
T1 |
43 |
|
T11 |
99 |
| auto[1] |
2213831 |
1 |
|
|
T32 |
3430 |
|
T1 |
10 |
|
T11 |
12 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2998611 |
1 |
|
|
T32 |
4496 |
|
T1 |
52 |
|
T11 |
102 |
| auto[1] |
1753230 |
1 |
|
|
T32 |
2466 |
|
T1 |
1 |
|
T11 |
9 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
1654144 |
1 |
|
|
T32 |
2296 |
|
T1 |
43 |
|
T11 |
93 |
| auto[0] |
auto[1] |
883866 |
1 |
|
|
T32 |
1236 |
|
T11 |
6 |
|
T12 |
23 |
| auto[1] |
auto[0] |
1344467 |
1 |
|
|
T32 |
2200 |
|
T1 |
9 |
|
T11 |
9 |
| auto[1] |
auto[1] |
869364 |
1 |
|
|
T32 |
1230 |
|
T1 |
1 |
|
T11 |
3 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2532195 |
1 |
|
|
T32 |
3727 |
|
T1 |
40 |
|
T11 |
84 |
| auto[1] |
2219646 |
1 |
|
|
T32 |
3235 |
|
T1 |
13 |
|
T11 |
27 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2996544 |
1 |
|
|
T32 |
4386 |
|
T1 |
51 |
|
T11 |
97 |
| auto[1] |
1755297 |
1 |
|
|
T32 |
2576 |
|
T1 |
2 |
|
T11 |
14 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
1650024 |
1 |
|
|
T32 |
2442 |
|
T1 |
38 |
|
T11 |
83 |
| auto[0] |
auto[1] |
882171 |
1 |
|
|
T32 |
1285 |
|
T1 |
2 |
|
T11 |
1 |
| auto[1] |
auto[0] |
1346520 |
1 |
|
|
T32 |
1944 |
|
T1 |
13 |
|
T11 |
14 |
| auto[1] |
auto[1] |
873126 |
1 |
|
|
T32 |
1291 |
|
T11 |
13 |
|
T12 |
19 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2538989 |
1 |
|
|
T32 |
3755 |
|
T1 |
44 |
|
T11 |
66 |
| auto[1] |
2212852 |
1 |
|
|
T32 |
3207 |
|
T1 |
9 |
|
T11 |
45 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2997034 |
1 |
|
|
T32 |
4391 |
|
T1 |
52 |
|
T11 |
106 |
| auto[1] |
1754807 |
1 |
|
|
T32 |
2571 |
|
T1 |
1 |
|
T11 |
5 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
1653447 |
1 |
|
|
T32 |
2453 |
|
T1 |
44 |
|
T11 |
65 |
| auto[0] |
auto[1] |
885542 |
1 |
|
|
T32 |
1302 |
|
T11 |
1 |
|
T12 |
14 |
| auto[1] |
auto[0] |
1343587 |
1 |
|
|
T32 |
1938 |
|
T1 |
8 |
|
T11 |
41 |
| auto[1] |
auto[1] |
869265 |
1 |
|
|
T32 |
1269 |
|
T1 |
1 |
|
T11 |
4 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2534866 |
1 |
|
|
T32 |
3614 |
|
T1 |
41 |
|
T11 |
67 |
| auto[1] |
2216975 |
1 |
|
|
T32 |
3348 |
|
T1 |
12 |
|
T11 |
44 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2989551 |
1 |
|
|
T32 |
4360 |
|
T1 |
46 |
|
T11 |
94 |
| auto[1] |
1762290 |
1 |
|
|
T32 |
2602 |
|
T1 |
7 |
|
T11 |
17 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
1649288 |
1 |
|
|
T32 |
2341 |
|
T1 |
41 |
|
T11 |
55 |
| auto[0] |
auto[1] |
885578 |
1 |
|
|
T32 |
1273 |
|
T11 |
12 |
|
T12 |
18 |
| auto[1] |
auto[0] |
1340263 |
1 |
|
|
T32 |
2019 |
|
T1 |
5 |
|
T11 |
39 |
| auto[1] |
auto[1] |
876712 |
1 |
|
|
T32 |
1329 |
|
T1 |
7 |
|
T11 |
5 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2533502 |
1 |
|
|
T32 |
3904 |
|
T1 |
43 |
|
T11 |
70 |
| auto[1] |
2218339 |
1 |
|
|
T32 |
3058 |
|
T1 |
10 |
|
T11 |
41 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2996219 |
1 |
|
|
T32 |
4417 |
|
T1 |
47 |
|
T11 |
105 |
| auto[1] |
1755622 |
1 |
|
|
T32 |
2545 |
|
T1 |
6 |
|
T11 |
6 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
1651671 |
1 |
|
|
T32 |
2572 |
|
T1 |
42 |
|
T11 |
66 |
| auto[0] |
auto[1] |
881831 |
1 |
|
|
T32 |
1332 |
|
T1 |
1 |
|
T11 |
4 |
| auto[1] |
auto[0] |
1344548 |
1 |
|
|
T32 |
1845 |
|
T1 |
5 |
|
T11 |
39 |
| auto[1] |
auto[1] |
873791 |
1 |
|
|
T32 |
1213 |
|
T1 |
5 |
|
T11 |
2 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2536144 |
1 |
|
|
T32 |
3622 |
|
T1 |
34 |
|
T11 |
95 |
| auto[1] |
2215697 |
1 |
|
|
T32 |
3340 |
|
T1 |
19 |
|
T11 |
16 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3000691 |
1 |
|
|
T32 |
4363 |
|
T1 |
52 |
|
T11 |
106 |
| auto[1] |
1751150 |
1 |
|
|
T32 |
2599 |
|
T1 |
1 |
|
T11 |
5 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
1654765 |
1 |
|
|
T32 |
2320 |
|
T1 |
34 |
|
T11 |
93 |
| auto[0] |
auto[1] |
881379 |
1 |
|
|
T32 |
1302 |
|
T11 |
2 |
|
T12 |
17 |
| auto[1] |
auto[0] |
1345926 |
1 |
|
|
T32 |
2043 |
|
T1 |
18 |
|
T11 |
13 |
| auto[1] |
auto[1] |
869771 |
1 |
|
|
T32 |
1297 |
|
T1 |
1 |
|
T11 |
3 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2534317 |
1 |
|
|
T32 |
3729 |
|
T1 |
42 |
|
T11 |
61 |
| auto[1] |
2217524 |
1 |
|
|
T32 |
3233 |
|
T1 |
11 |
|
T11 |
50 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2988134 |
1 |
|
|
T32 |
4252 |
|
T1 |
51 |
|
T11 |
83 |
| auto[1] |
1763707 |
1 |
|
|
T32 |
2710 |
|
T1 |
2 |
|
T11 |
28 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
| cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
1647794 |
1 |
|
|
T32 |
2319 |
|
T1 |
42 |
|
T11 |
54 |
| auto[0] |
auto[1] |
886523 |
1 |
|
|
T32 |
1410 |
|
T11 |
7 |
|
T12 |
17 |
| auto[1] |
auto[0] |
1340340 |
1 |
|
|
T32 |
1933 |
|
T1 |
9 |
|
T11 |
29 |
| auto[1] |
auto[1] |
877184 |
1 |
|
|
T32 |
1300 |
|
T1 |
2 |
|
T11 |
21 |
Summary for Variable cp_var1
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2534030 |
1 |
|
|
T32 |
3606 |
|
T1 |
38 |
|
T11 |
89 |
| auto[1] |
2217811 |
1 |
|
|
T32 |
3356 |
|
T1 |
15 |
|
T11 |
22 |
Summary for Variable cp_var2
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2989317 |
1 |
|
|
T32 |
4421 |
|
T1 |
45 |
|
T11 |
80 |
| auto[1] |
1762524 |
1 |
|
|
T32 |
2541 |
|
T1 |
8 |
|
T11 |
31 |