CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins | 4 | 0 | 4 | 100.00 |
cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | auto[0] | 1646282 | 1 | T32 | 2389 | T1 | 34 | T11 | 72 | ||||
auto[0] | auto[1] | 887748 | 1 | T32 | 1217 | T1 | 4 | T11 | 17 | ||||
auto[1] | auto[0] | 1343035 | 1 | T32 | 2032 | T1 | 11 | T11 | 8 | ||||
auto[1] | auto[1] | 874776 | 1 | T32 | 1324 | T1 | 4 | T11 | 14 |
0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |