Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
9422082 |
1 |
|
|
T32 |
8339 |
|
T1 |
60 |
|
T11 |
54 |
| auto[1] |
7404524 |
1 |
|
|
T32 |
6634 |
|
T1 |
6 |
|
T11 |
45 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
13866142 |
1 |
|
|
T32 |
10455 |
|
T1 |
64 |
|
T11 |
90 |
| auto[1] |
2960464 |
1 |
|
|
T32 |
4518 |
|
T1 |
2 |
|
T11 |
9 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
9470949 |
1 |
|
|
T32 |
8226 |
|
T1 |
63 |
|
T11 |
85 |
| auto[1] |
7355657 |
1 |
|
|
T32 |
6747 |
|
T1 |
3 |
|
T11 |
14 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
2184857 |
1 |
|
|
T32 |
781 |
|
T1 |
1 |
|
T13 |
61591 |
| auto[1] |
auto[0] |
auto[1] |
1471087 |
1 |
|
|
T32 |
1684 |
|
T1 |
2 |
|
T11 |
3 |
| auto[1] |
auto[1] |
auto[0] |
2210336 |
1 |
|
|
T32 |
1448 |
|
T11 |
5 |
|
T13 |
59740 |
| auto[1] |
auto[1] |
auto[1] |
1489377 |
1 |
|
|
T32 |
2834 |
|
T11 |
6 |
|
T13 |
36279 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |