Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
9431538 |
1 |
|
|
T32 |
8500 |
|
T1 |
55 |
|
T11 |
60 |
| auto[1] |
7395068 |
1 |
|
|
T32 |
6473 |
|
T1 |
11 |
|
T11 |
39 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
13849787 |
1 |
|
|
T32 |
8626 |
|
T1 |
60 |
|
T11 |
73 |
| auto[1] |
2976819 |
1 |
|
|
T32 |
6347 |
|
T1 |
6 |
|
T11 |
26 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
9423266 |
1 |
|
|
T32 |
5934 |
|
T1 |
53 |
|
T11 |
69 |
| auto[1] |
7403340 |
1 |
|
|
T32 |
9039 |
|
T1 |
13 |
|
T11 |
30 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
2214593 |
1 |
|
|
T32 |
1389 |
|
T1 |
7 |
|
T13 |
62367 |
| auto[1] |
auto[0] |
auto[1] |
1495427 |
1 |
|
|
T32 |
3190 |
|
T1 |
6 |
|
T11 |
10 |
| auto[1] |
auto[1] |
auto[0] |
2211928 |
1 |
|
|
T32 |
1303 |
|
T11 |
4 |
|
T13 |
64050 |
| auto[1] |
auto[1] |
auto[1] |
1481392 |
1 |
|
|
T32 |
3157 |
|
T11 |
16 |
|
T13 |
38197 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |