Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
9474810 |
1 |
|
|
T32 |
8252 |
|
T1 |
55 |
|
T11 |
84 |
| auto[1] |
7351796 |
1 |
|
|
T32 |
6721 |
|
T1 |
11 |
|
T11 |
15 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
15893032 |
1 |
|
|
T32 |
14096 |
|
T1 |
63 |
|
T11 |
98 |
| auto[1] |
933574 |
1 |
|
|
T32 |
877 |
|
T1 |
3 |
|
T11 |
1 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
9451219 |
1 |
|
|
T32 |
7073 |
|
T1 |
35 |
|
T11 |
82 |
| auto[1] |
7375387 |
1 |
|
|
T32 |
7900 |
|
T1 |
31 |
|
T11 |
17 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
3233566 |
1 |
|
|
T32 |
3301 |
|
T1 |
24 |
|
T11 |
7 |
| auto[1] |
auto[0] |
auto[1] |
468032 |
1 |
|
|
T32 |
425 |
|
T1 |
3 |
|
T13 |
12696 |
| auto[1] |
auto[1] |
auto[0] |
3208247 |
1 |
|
|
T32 |
3722 |
|
T1 |
4 |
|
T11 |
9 |
| auto[1] |
auto[1] |
auto[1] |
465542 |
1 |
|
|
T32 |
452 |
|
T11 |
1 |
|
T13 |
12020 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |