cp_pins | cp_stable_cycles | cp_pin_value | cp_filter_en | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[0] |
auto[0] |
61926 |
1 |
|
|
T20 |
852 |
|
T111 |
1138 |
|
T112 |
558 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48598 |
1 |
|
|
T20 |
2117 |
|
T111 |
740 |
|
T112 |
1337 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[1] |
auto[0] |
60070 |
1 |
|
|
T20 |
957 |
|
T111 |
1185 |
|
T112 |
352 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45528 |
1 |
|
|
T20 |
1373 |
|
T111 |
1801 |
|
T112 |
253 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
763 |
1 |
|
|
T20 |
12 |
|
T111 |
22 |
|
T112 |
7 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1767 |
1 |
|
|
T20 |
77 |
|
T111 |
38 |
|
T112 |
15 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
772 |
1 |
|
|
T20 |
14 |
|
T111 |
19 |
|
T112 |
8 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1757 |
1 |
|
|
T20 |
75 |
|
T111 |
42 |
|
T112 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
763 |
1 |
|
|
T20 |
12 |
|
T111 |
22 |
|
T112 |
7 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1736 |
1 |
|
|
T20 |
75 |
|
T111 |
37 |
|
T112 |
15 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
772 |
1 |
|
|
T20 |
14 |
|
T111 |
19 |
|
T112 |
8 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1720 |
1 |
|
|
T20 |
74 |
|
T111 |
41 |
|
T112 |
12 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
763 |
1 |
|
|
T20 |
12 |
|
T111 |
22 |
|
T112 |
7 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1694 |
1 |
|
|
T20 |
72 |
|
T111 |
36 |
|
T112 |
15 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
770 |
1 |
|
|
T20 |
14 |
|
T111 |
19 |
|
T112 |
8 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1687 |
1 |
|
|
T20 |
71 |
|
T111 |
40 |
|
T112 |
11 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
763 |
1 |
|
|
T20 |
12 |
|
T111 |
22 |
|
T112 |
7 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1669 |
1 |
|
|
T20 |
72 |
|
T111 |
35 |
|
T112 |
15 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
770 |
1 |
|
|
T20 |
14 |
|
T111 |
19 |
|
T112 |
8 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1649 |
1 |
|
|
T20 |
71 |
|
T111 |
39 |
|
T112 |
11 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T20 |
12 |
|
T111 |
22 |
|
T112 |
7 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1652 |
1 |
|
|
T20 |
72 |
|
T111 |
34 |
|
T112 |
15 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
769 |
1 |
|
|
T20 |
14 |
|
T111 |
19 |
|
T112 |
8 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1617 |
1 |
|
|
T20 |
71 |
|
T111 |
38 |
|
T112 |
11 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T20 |
12 |
|
T111 |
22 |
|
T112 |
7 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1625 |
1 |
|
|
T20 |
70 |
|
T111 |
34 |
|
T112 |
15 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
769 |
1 |
|
|
T20 |
14 |
|
T111 |
19 |
|
T112 |
8 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1570 |
1 |
|
|
T20 |
68 |
|
T111 |
37 |
|
T112 |
11 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
757 |
1 |
|
|
T20 |
12 |
|
T111 |
22 |
|
T112 |
7 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1592 |
1 |
|
|
T20 |
69 |
|
T111 |
32 |
|
T112 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T20 |
14 |
|
T111 |
18 |
|
T112 |
8 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1529 |
1 |
|
|
T20 |
67 |
|
T111 |
35 |
|
T112 |
10 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
757 |
1 |
|
|
T20 |
12 |
|
T111 |
22 |
|
T112 |
7 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1560 |
1 |
|
|
T20 |
67 |
|
T111 |
32 |
|
T112 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T20 |
14 |
|
T111 |
18 |
|
T112 |
8 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1498 |
1 |
|
|
T20 |
66 |
|
T111 |
34 |
|
T112 |
10 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
754 |
1 |
|
|
T20 |
12 |
|
T111 |
22 |
|
T112 |
7 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1522 |
1 |
|
|
T20 |
66 |
|
T111 |
32 |
|
T112 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T20 |
14 |
|
T111 |
18 |
|
T112 |
8 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1451 |
1 |
|
|
T20 |
64 |
|
T111 |
33 |
|
T112 |
9 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
754 |
1 |
|
|
T20 |
12 |
|
T111 |
22 |
|
T112 |
7 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1484 |
1 |
|
|
T20 |
65 |
|
T111 |
32 |
|
T112 |
12 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T20 |
14 |
|
T111 |
18 |
|
T112 |
8 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1422 |
1 |
|
|
T20 |
62 |
|
T111 |
33 |
|
T112 |
9 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T20 |
12 |
|
T111 |
22 |
|
T112 |
6 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1440 |
1 |
|
|
T20 |
63 |
|
T111 |
31 |
|
T112 |
12 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
759 |
1 |
|
|
T20 |
14 |
|
T111 |
18 |
|
T112 |
8 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1398 |
1 |
|
|
T20 |
59 |
|
T111 |
33 |
|
T112 |
9 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T20 |
12 |
|
T111 |
22 |
|
T112 |
6 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1403 |
1 |
|
|
T20 |
62 |
|
T111 |
30 |
|
T112 |
12 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
759 |
1 |
|
|
T20 |
14 |
|
T111 |
18 |
|
T112 |
8 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1364 |
1 |
|
|
T20 |
57 |
|
T111 |
33 |
|
T112 |
8 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T20 |
12 |
|
T111 |
22 |
|
T112 |
6 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1369 |
1 |
|
|
T20 |
62 |
|
T111 |
30 |
|
T112 |
12 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
759 |
1 |
|
|
T20 |
14 |
|
T111 |
18 |
|
T112 |
8 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1337 |
1 |
|
|
T20 |
55 |
|
T111 |
32 |
|
T112 |
8 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T20 |
12 |
|
T111 |
22 |
|
T112 |
6 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1343 |
1 |
|
|
T20 |
61 |
|
T111 |
29 |
|
T112 |
12 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
759 |
1 |
|
|
T20 |
14 |
|
T111 |
18 |
|
T112 |
8 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1297 |
1 |
|
|
T20 |
54 |
|
T111 |
31 |
|
T112 |
7 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T20 |
12 |
|
T111 |
22 |
|
T112 |
6 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1295 |
1 |
|
|
T20 |
57 |
|
T111 |
26 |
|
T112 |
12 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
759 |
1 |
|
|
T20 |
14 |
|
T111 |
18 |
|
T112 |
8 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1258 |
1 |
|
|
T20 |
51 |
|
T111 |
30 |
|
T112 |
7 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[0] |
auto[0] |
54578 |
1 |
|
|
T20 |
1027 |
|
T111 |
807 |
|
T112 |
460 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46797 |
1 |
|
|
T20 |
1879 |
|
T111 |
897 |
|
T112 |
232 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[1] |
auto[0] |
61538 |
1 |
|
|
T20 |
1455 |
|
T111 |
1005 |
|
T112 |
1474 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[1] |
auto[1] |
52520 |
1 |
|
|
T20 |
1238 |
|
T111 |
2063 |
|
T112 |
333 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
772 |
1 |
|
|
T20 |
21 |
|
T111 |
13 |
|
T112 |
8 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1781 |
1 |
|
|
T20 |
57 |
|
T111 |
49 |
|
T112 |
14 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
781 |
1 |
|
|
T20 |
20 |
|
T111 |
17 |
|
T112 |
8 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1777 |
1 |
|
|
T20 |
58 |
|
T111 |
46 |
|
T112 |
14 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
772 |
1 |
|
|
T20 |
21 |
|
T111 |
13 |
|
T112 |
8 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1746 |
1 |
|
|
T20 |
53 |
|
T111 |
49 |
|
T112 |
14 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
781 |
1 |
|
|
T20 |
20 |
|
T111 |
17 |
|
T112 |
8 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1751 |
1 |
|
|
T20 |
57 |
|
T111 |
45 |
|
T112 |
13 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
772 |
1 |
|
|
T20 |
21 |
|
T111 |
13 |
|
T112 |
8 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1709 |
1 |
|
|
T20 |
52 |
|
T111 |
49 |
|
T112 |
12 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
781 |
1 |
|
|
T20 |
20 |
|
T111 |
17 |
|
T112 |
8 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1713 |
1 |
|
|
T20 |
56 |
|
T111 |
45 |
|
T112 |
12 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
772 |
1 |
|
|
T20 |
21 |
|
T111 |
13 |
|
T112 |
8 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1676 |
1 |
|
|
T20 |
51 |
|
T111 |
48 |
|
T112 |
12 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
781 |
1 |
|
|
T20 |
20 |
|
T111 |
17 |
|
T112 |
8 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1670 |
1 |
|
|
T20 |
53 |
|
T111 |
45 |
|
T112 |
12 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
771 |
1 |
|
|
T20 |
21 |
|
T111 |
13 |
|
T112 |
8 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1649 |
1 |
|
|
T20 |
51 |
|
T111 |
46 |
|
T112 |
12 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
778 |
1 |
|
|
T20 |
19 |
|
T111 |
17 |
|
T112 |
8 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1648 |
1 |
|
|
T20 |
53 |
|
T111 |
44 |
|
T112 |
12 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
771 |
1 |
|
|
T20 |
21 |
|
T111 |
13 |
|
T112 |
8 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1620 |
1 |
|
|
T20 |
50 |
|
T111 |
46 |
|
T112 |
12 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
778 |
1 |
|
|
T20 |
19 |
|
T111 |
17 |
|
T112 |
8 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1613 |
1 |
|
|
T20 |
52 |
|
T111 |
44 |
|
T112 |
12 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T20 |
21 |
|
T111 |
13 |
|
T112 |
7 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1588 |
1 |
|
|
T20 |
49 |
|
T111 |
43 |
|
T112 |
12 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
771 |
1 |
|
|
T20 |
19 |
|
T111 |
17 |
|
T112 |
8 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1575 |
1 |
|
|
T20 |
51 |
|
T111 |
44 |
|
T112 |
12 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T20 |
21 |
|
T111 |
13 |
|
T112 |
7 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1551 |
1 |
|
|
T20 |
46 |
|
T111 |
42 |
|
T112 |
12 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
771 |
1 |
|
|
T20 |
19 |
|
T111 |
17 |
|
T112 |
8 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1545 |
1 |
|
|
T20 |
50 |
|
T111 |
44 |
|
T112 |
11 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T20 |
21 |
|
T111 |
13 |
|
T112 |
7 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1506 |
1 |
|
|
T20 |
46 |
|
T111 |
40 |
|
T112 |
11 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
770 |
1 |
|
|
T20 |
19 |
|
T111 |
17 |
|
T112 |
8 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1511 |
1 |
|
|
T20 |
48 |
|
T111 |
41 |
|
T112 |
11 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T20 |
21 |
|
T111 |
13 |
|
T112 |
7 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1471 |
1 |
|
|
T20 |
45 |
|
T111 |
39 |
|
T112 |
11 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
770 |
1 |
|
|
T20 |
19 |
|
T111 |
17 |
|
T112 |
8 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1471 |
1 |
|
|
T20 |
48 |
|
T111 |
40 |
|
T112 |
11 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T20 |
21 |
|
T111 |
13 |
|
T112 |
7 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1425 |
1 |
|
|
T20 |
43 |
|
T111 |
39 |
|
T112 |
11 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
768 |
1 |
|
|
T20 |
19 |
|
T111 |
17 |
|
T112 |
8 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1433 |
1 |
|
|
T20 |
47 |
|
T111 |
40 |
|
T112 |
10 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T20 |
21 |
|
T111 |
13 |
|
T112 |
7 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1381 |
1 |
|
|
T20 |
42 |
|
T111 |
38 |
|
T112 |
10 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
768 |
1 |
|
|
T20 |
19 |
|
T111 |
17 |
|
T112 |
8 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1401 |
1 |
|
|
T20 |
45 |
|
T111 |
38 |
|
T112 |
10 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T20 |
21 |
|
T111 |
13 |
|
T112 |
7 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1348 |
1 |
|
|
T20 |
42 |
|
T111 |
38 |
|
T112 |
9 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
768 |
1 |
|
|
T20 |
19 |
|
T111 |
17 |
|
T112 |
8 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1371 |
1 |
|
|
T20 |
45 |
|
T111 |
38 |
|
T112 |
10 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T20 |
21 |
|
T111 |
13 |
|
T112 |
7 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1307 |
1 |
|
|
T20 |
41 |
|
T111 |
38 |
|
T112 |
9 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
768 |
1 |
|
|
T20 |
19 |
|
T111 |
17 |
|
T112 |
8 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1335 |
1 |
|
|
T20 |
45 |
|
T111 |
37 |
|
T112 |
10 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T20 |
21 |
|
T111 |
13 |
|
T112 |
7 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1271 |
1 |
|
|
T20 |
40 |
|
T111 |
36 |
|
T112 |
9 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
768 |
1 |
|
|
T20 |
19 |
|
T111 |
17 |
|
T112 |
8 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1305 |
1 |
|
|
T20 |
45 |
|
T111 |
36 |
|
T112 |
10 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[0] |
auto[0] |
60086 |
1 |
|
|
T20 |
1873 |
|
T111 |
1492 |
|
T112 |
486 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46523 |
1 |
|
|
T20 |
1024 |
|
T111 |
1726 |
|
T112 |
263 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[1] |
auto[0] |
58925 |
1 |
|
|
T20 |
1524 |
|
T111 |
901 |
|
T112 |
505 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[1] |
auto[1] |
50060 |
1 |
|
|
T20 |
1182 |
|
T111 |
778 |
|
T112 |
1209 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
781 |
1 |
|
|
T20 |
22 |
|
T111 |
19 |
|
T112 |
8 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1778 |
1 |
|
|
T20 |
54 |
|
T111 |
39 |
|
T112 |
14 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T20 |
22 |
|
T111 |
18 |
|
T112 |
10 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1801 |
1 |
|
|
T20 |
54 |
|
T111 |
40 |
|
T112 |
12 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
781 |
1 |
|
|
T20 |
22 |
|
T111 |
19 |
|
T112 |
8 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1728 |
1 |
|
|
T20 |
52 |
|
T111 |
38 |
|
T112 |
14 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T20 |
22 |
|
T111 |
18 |
|
T112 |
10 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1771 |
1 |
|
|
T20 |
52 |
|
T111 |
40 |
|
T112 |
12 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
781 |
1 |
|
|
T20 |
22 |
|
T111 |
19 |
|
T112 |
8 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1682 |
1 |
|
|
T20 |
51 |
|
T111 |
38 |
|
T112 |
14 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T20 |
22 |
|
T111 |
18 |
|
T112 |
10 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1729 |
1 |
|
|
T20 |
51 |
|
T111 |
39 |
|
T112 |
12 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
781 |
1 |
|
|
T20 |
22 |
|
T111 |
19 |
|
T112 |
8 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1656 |
1 |
|
|
T20 |
51 |
|
T111 |
38 |
|
T112 |
14 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T20 |
22 |
|
T111 |
18 |
|
T112 |
10 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1694 |
1 |
|
|
T20 |
51 |
|
T111 |
39 |
|
T112 |
11 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
775 |
1 |
|
|
T20 |
22 |
|
T111 |
19 |
|
T112 |
8 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1622 |
1 |
|
|
T20 |
49 |
|
T111 |
37 |
|
T112 |
14 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T20 |
21 |
|
T111 |
18 |
|
T112 |
10 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1649 |
1 |
|
|
T20 |
51 |
|
T111 |
39 |
|
T112 |
11 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
775 |
1 |
|
|
T20 |
22 |
|
T111 |
19 |
|
T112 |
8 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1592 |
1 |
|
|
T20 |
48 |
|
T111 |
36 |
|
T112 |
14 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T20 |
21 |
|
T111 |
18 |
|
T112 |
10 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1609 |
1 |
|
|
T20 |
50 |
|
T111 |
37 |
|
T112 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
771 |
1 |
|
|
T20 |
22 |
|
T111 |
19 |
|
T112 |
7 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1569 |
1 |
|
|
T20 |
45 |
|
T111 |
35 |
|
T112 |
15 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T20 |
21 |
|
T111 |
18 |
|
T112 |
10 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1585 |
1 |
|
|
T20 |
50 |
|
T111 |
36 |
|
T112 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
771 |
1 |
|
|
T20 |
22 |
|
T111 |
19 |
|
T112 |
7 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1525 |
1 |
|
|
T20 |
45 |
|
T111 |
34 |
|
T112 |
15 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T20 |
21 |
|
T111 |
18 |
|
T112 |
10 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1553 |
1 |
|
|
T20 |
49 |
|
T111 |
35 |
|
T112 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
769 |
1 |
|
|
T20 |
22 |
|
T111 |
19 |
|
T112 |
7 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1492 |
1 |
|
|
T20 |
45 |
|
T111 |
33 |
|
T112 |
14 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T20 |
21 |
|
T111 |
18 |
|
T112 |
10 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1524 |
1 |
|
|
T20 |
47 |
|
T111 |
35 |
|
T112 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
769 |
1 |
|
|
T20 |
22 |
|
T111 |
19 |
|
T112 |
7 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1455 |
1 |
|
|
T20 |
45 |
|
T111 |
33 |
|
T112 |
14 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T20 |
21 |
|
T111 |
18 |
|
T112 |
10 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1491 |
1 |
|
|
T20 |
46 |
|
T111 |
33 |
|
T112 |
8 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
767 |
1 |
|
|
T20 |
22 |
|
T111 |
19 |
|
T112 |
7 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1419 |
1 |
|
|
T20 |
44 |
|
T111 |
32 |
|
T112 |
13 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T20 |
21 |
|
T111 |
18 |
|
T112 |
10 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1453 |
1 |
|
|
T20 |
46 |
|
T111 |
32 |
|
T112 |
8 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
767 |
1 |
|
|
T20 |
22 |
|
T111 |
19 |
|
T112 |
7 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1383 |
1 |
|
|
T20 |
43 |
|
T111 |
32 |
|
T112 |
13 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T20 |
21 |
|
T111 |
18 |
|
T112 |
10 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1413 |
1 |
|
|
T20 |
46 |
|
T111 |
29 |
|
T112 |
8 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
767 |
1 |
|
|
T20 |
22 |
|
T111 |
19 |
|
T112 |
7 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1348 |
1 |
|
|
T20 |
42 |
|
T111 |
31 |
|
T112 |
13 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T20 |
21 |
|
T111 |
18 |
|
T112 |
10 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1381 |
1 |
|
|
T20 |
45 |
|
T111 |
29 |
|
T112 |
7 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
767 |
1 |
|
|
T20 |
22 |
|
T111 |
19 |
|
T112 |
7 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1309 |
1 |
|
|
T20 |
39 |
|
T111 |
31 |
|
T112 |
13 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T20 |
21 |
|
T111 |
18 |
|
T112 |
10 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1354 |
1 |
|
|
T20 |
42 |
|
T111 |
28 |
|
T112 |
7 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
767 |
1 |
|
|
T20 |
22 |
|
T111 |
19 |
|
T112 |
7 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1272 |
1 |
|
|
T20 |
38 |
|
T111 |
31 |
|
T112 |
13 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T20 |
21 |
|
T111 |
18 |
|
T112 |
10 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1325 |
1 |
|
|
T20 |
41 |
|
T111 |
28 |
|
T112 |
7 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[0] |
auto[0] |
60966 |
1 |
|
|
T20 |
2661 |
|
T111 |
1219 |
|
T112 |
557 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48424 |
1 |
|
|
T20 |
943 |
|
T111 |
1602 |
|
T112 |
1173 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[1] |
auto[0] |
58443 |
1 |
|
|
T20 |
894 |
|
T111 |
1087 |
|
T112 |
620 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48868 |
1 |
|
|
T20 |
1322 |
|
T111 |
980 |
|
T112 |
243 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T20 |
20 |
|
T111 |
17 |
|
T112 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1755 |
1 |
|
|
T20 |
49 |
|
T111 |
41 |
|
T112 |
12 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T20 |
16 |
|
T111 |
18 |
|
T112 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1774 |
1 |
|
|
T20 |
53 |
|
T111 |
40 |
|
T112 |
11 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T20 |
20 |
|
T111 |
17 |
|
T112 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1720 |
1 |
|
|
T20 |
48 |
|
T111 |
41 |
|
T112 |
12 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T20 |
16 |
|
T111 |
18 |
|
T112 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1735 |
1 |
|
|
T20 |
53 |
|
T111 |
39 |
|
T112 |
11 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T20 |
20 |
|
T111 |
17 |
|
T112 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1678 |
1 |
|
|
T20 |
46 |
|
T111 |
41 |
|
T112 |
12 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T20 |
16 |
|
T111 |
18 |
|
T112 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1706 |
1 |
|
|
T20 |
50 |
|
T111 |
39 |
|
T112 |
11 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T20 |
20 |
|
T111 |
17 |
|
T112 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1643 |
1 |
|
|
T20 |
44 |
|
T111 |
41 |
|
T112 |
10 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T20 |
16 |
|
T111 |
18 |
|
T112 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1677 |
1 |
|
|
T20 |
50 |
|
T111 |
38 |
|
T112 |
10 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T20 |
20 |
|
T111 |
17 |
|
T112 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1611 |
1 |
|
|
T20 |
43 |
|
T111 |
40 |
|
T112 |
10 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T20 |
16 |
|
T111 |
18 |
|
T112 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1648 |
1 |
|
|
T20 |
50 |
|
T111 |
38 |
|
T112 |
10 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T20 |
20 |
|
T111 |
17 |
|
T112 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1575 |
1 |
|
|
T20 |
41 |
|
T111 |
38 |
|
T112 |
10 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T20 |
16 |
|
T111 |
18 |
|
T112 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1601 |
1 |
|
|
T20 |
47 |
|
T111 |
38 |
|
T112 |
10 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T20 |
20 |
|
T111 |
17 |
|
T112 |
5 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1538 |
1 |
|
|
T20 |
41 |
|
T111 |
36 |
|
T112 |
10 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T20 |
16 |
|
T111 |
18 |
|
T112 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1567 |
1 |
|
|
T20 |
47 |
|
T111 |
37 |
|
T112 |
10 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T20 |
20 |
|
T111 |
17 |
|
T112 |
5 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1511 |
1 |
|
|
T20 |
40 |
|
T111 |
35 |
|
T112 |
10 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T20 |
16 |
|
T111 |
18 |
|
T112 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1536 |
1 |
|
|
T20 |
46 |
|
T111 |
35 |
|
T112 |
10 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T20 |
20 |
|
T111 |
17 |
|
T112 |
5 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1472 |
1 |
|
|
T20 |
40 |
|
T111 |
34 |
|
T112 |
10 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T20 |
16 |
|
T111 |
18 |
|
T112 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1497 |
1 |
|
|
T20 |
46 |
|
T111 |
35 |
|
T112 |
10 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T20 |
20 |
|
T111 |
17 |
|
T112 |
5 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1436 |
1 |
|
|
T20 |
38 |
|
T111 |
33 |
|
T112 |
10 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T20 |
16 |
|
T111 |
18 |
|
T112 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1470 |
1 |
|
|
T20 |
45 |
|
T111 |
35 |
|
T112 |
10 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T20 |
20 |
|
T111 |
17 |
|
T112 |
5 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1396 |
1 |
|
|
T20 |
36 |
|
T111 |
33 |
|
T112 |
10 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T20 |
16 |
|
T111 |
18 |
|
T112 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1437 |
1 |
|
|
T20 |
45 |
|
T111 |
35 |
|
T112 |
10 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T20 |
20 |
|
T111 |
17 |
|
T112 |
5 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1360 |
1 |
|
|
T20 |
36 |
|
T111 |
32 |
|
T112 |
10 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T20 |
16 |
|
T111 |
18 |
|
T112 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1410 |
1 |
|
|
T20 |
44 |
|
T111 |
35 |
|
T112 |
10 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T20 |
20 |
|
T111 |
17 |
|
T112 |
5 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1333 |
1 |
|
|
T20 |
35 |
|
T111 |
30 |
|
T112 |
10 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T20 |
16 |
|
T111 |
18 |
|
T112 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1384 |
1 |
|
|
T20 |
43 |
|
T111 |
34 |
|
T112 |
10 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T20 |
20 |
|
T111 |
17 |
|
T112 |
5 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1292 |
1 |
|
|
T20 |
34 |
|
T111 |
30 |
|
T112 |
10 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T20 |
16 |
|
T111 |
18 |
|
T112 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1351 |
1 |
|
|
T20 |
41 |
|
T111 |
33 |
|
T112 |
9 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T20 |
20 |
|
T111 |
17 |
|
T112 |
5 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1254 |
1 |
|
|
T20 |
32 |
|
T111 |
28 |
|
T112 |
9 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T20 |
16 |
|
T111 |
18 |
|
T112 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1327 |
1 |
|
|
T20 |
41 |
|
T111 |
32 |
|
T112 |
9 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[0] |
auto[0] |
54681 |
1 |
|
|
T20 |
1903 |
|
T111 |
1081 |
|
T112 |
687 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46783 |
1 |
|
|
T20 |
1271 |
|
T111 |
664 |
|
T112 |
1146 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[1] |
auto[0] |
65321 |
1 |
|
|
T20 |
1085 |
|
T111 |
2519 |
|
T112 |
437 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[1] |
auto[1] |
49313 |
1 |
|
|
T20 |
1346 |
|
T111 |
847 |
|
T112 |
275 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
789 |
1 |
|
|
T20 |
24 |
|
T111 |
19 |
|
T112 |
7 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1728 |
1 |
|
|
T20 |
51 |
|
T111 |
30 |
|
T112 |
13 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
791 |
1 |
|
|
T20 |
20 |
|
T111 |
19 |
|
T112 |
6 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1734 |
1 |
|
|
T20 |
55 |
|
T111 |
31 |
|
T112 |
13 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
789 |
1 |
|
|
T20 |
24 |
|
T111 |
19 |
|
T112 |
7 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1697 |
1 |
|
|
T20 |
51 |
|
T111 |
30 |
|
T112 |
12 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
791 |
1 |
|
|
T20 |
20 |
|
T111 |
19 |
|
T112 |
6 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1700 |
1 |
|
|
T20 |
54 |
|
T111 |
31 |
|
T112 |
13 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
789 |
1 |
|
|
T20 |
24 |
|
T111 |
19 |
|
T112 |
7 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1666 |
1 |
|
|
T20 |
49 |
|
T111 |
30 |
|
T112 |
12 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
788 |
1 |
|
|
T20 |
20 |
|
T111 |
19 |
|
T112 |
6 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1667 |
1 |
|
|
T20 |
53 |
|
T111 |
31 |
|
T112 |
12 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
789 |
1 |
|
|
T20 |
24 |
|
T111 |
19 |
|
T112 |
7 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1629 |
1 |
|
|
T20 |
48 |
|
T111 |
29 |
|
T112 |
12 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
788 |
1 |
|
|
T20 |
20 |
|
T111 |
19 |
|
T112 |
6 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1629 |
1 |
|
|
T20 |
52 |
|
T111 |
30 |
|
T112 |
11 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
787 |
1 |
|
|
T20 |
24 |
|
T111 |
19 |
|
T112 |
7 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1605 |
1 |
|
|
T20 |
47 |
|
T111 |
29 |
|
T112 |
12 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
787 |
1 |
|
|
T20 |
20 |
|
T111 |
19 |
|
T112 |
6 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1594 |
1 |
|
|
T20 |
52 |
|
T111 |
29 |
|
T112 |
11 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
787 |
1 |
|
|
T20 |
24 |
|
T111 |
19 |
|
T112 |
7 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1581 |
1 |
|
|
T20 |
46 |
|
T111 |
28 |
|
T112 |
12 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
787 |
1 |
|
|
T20 |
20 |
|
T111 |
19 |
|
T112 |
6 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1554 |
1 |
|
|
T20 |
51 |
|
T111 |
27 |
|
T112 |
11 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
784 |
1 |
|
|
T20 |
24 |
|
T111 |
19 |
|
T112 |
7 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1556 |
1 |
|
|
T20 |
45 |
|
T111 |
28 |
|
T112 |
11 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
780 |
1 |
|
|
T20 |
20 |
|
T111 |
19 |
|
T112 |
6 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1526 |
1 |
|
|
T20 |
51 |
|
T111 |
27 |
|
T112 |
11 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
784 |
1 |
|
|
T20 |
24 |
|
T111 |
19 |
|
T112 |
7 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1522 |
1 |
|
|
T20 |
45 |
|
T111 |
27 |
|
T112 |
10 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
780 |
1 |
|
|
T20 |
20 |
|
T111 |
19 |
|
T112 |
6 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1487 |
1 |
|
|
T20 |
49 |
|
T111 |
26 |
|
T112 |
11 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
781 |
1 |
|
|
T20 |
24 |
|
T111 |
19 |
|
T112 |
7 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1494 |
1 |
|
|
T20 |
44 |
|
T111 |
26 |
|
T112 |
10 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
775 |
1 |
|
|
T20 |
19 |
|
T111 |
19 |
|
T112 |
6 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1448 |
1 |
|
|
T20 |
49 |
|
T111 |
25 |
|
T112 |
11 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
781 |
1 |
|
|
T20 |
24 |
|
T111 |
19 |
|
T112 |
7 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1461 |
1 |
|
|
T20 |
42 |
|
T111 |
26 |
|
T112 |
10 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
775 |
1 |
|
|
T20 |
19 |
|
T111 |
19 |
|
T112 |
6 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1414 |
1 |
|
|
T20 |
47 |
|
T111 |
24 |
|
T112 |
11 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
781 |
1 |
|
|
T20 |
24 |
|
T111 |
19 |
|
T112 |
7 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1425 |
1 |
|
|
T20 |
42 |
|
T111 |
26 |
|
T112 |
10 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
773 |
1 |
|
|
T20 |
19 |
|
T111 |
19 |
|
T112 |
6 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1381 |
1 |
|
|
T20 |
47 |
|
T111 |
24 |
|
T112 |
11 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
781 |
1 |
|
|
T20 |
24 |
|
T111 |
19 |
|
T112 |
7 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1395 |
1 |
|
|
T20 |
41 |
|
T111 |
26 |
|
T112 |
10 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
773 |
1 |
|
|
T20 |
19 |
|
T111 |
19 |
|
T112 |
6 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1347 |
1 |
|
|
T20 |
47 |
|
T111 |
23 |
|
T112 |
11 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
780 |
1 |
|
|
T20 |
24 |
|
T111 |
19 |
|
T112 |
7 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1360 |
1 |
|
|
T20 |
39 |
|
T111 |
26 |
|
T112 |
10 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
772 |
1 |
|
|
T20 |
19 |
|
T111 |
19 |
|
T112 |
6 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1309 |
1 |
|
|
T20 |
46 |
|
T111 |
23 |
|
T112 |
11 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
780 |
1 |
|
|
T20 |
24 |
|
T111 |
19 |
|
T112 |
7 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1322 |
1 |
|
|
T20 |
37 |
|
T111 |
25 |
|
T112 |
9 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
772 |
1 |
|
|
T20 |
19 |
|
T111 |
19 |
|
T112 |
6 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1281 |
1 |
|
|
T20 |
45 |
|
T111 |
23 |
|
T112 |
11 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
780 |
1 |
|
|
T20 |
24 |
|
T111 |
19 |
|
T112 |
7 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1304 |
1 |
|
|
T20 |
36 |
|
T111 |
25 |
|
T112 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
772 |
1 |
|
|
T20 |
19 |
|
T111 |
19 |
|
T112 |
6 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1250 |
1 |
|
|
T20 |
45 |
|
T111 |
23 |
|
T112 |
10 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[0] |
auto[0] |
61504 |
1 |
|
|
T20 |
1569 |
|
T111 |
1086 |
|
T112 |
389 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46946 |
1 |
|
|
T20 |
1542 |
|
T111 |
863 |
|
T112 |
443 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[1] |
auto[0] |
61607 |
1 |
|
|
T20 |
1774 |
|
T111 |
1057 |
|
T112 |
327 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45845 |
1 |
|
|
T20 |
932 |
|
T111 |
1883 |
|
T112 |
1254 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
788 |
1 |
|
|
T20 |
21 |
|
T111 |
15 |
|
T112 |
3 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1739 |
1 |
|
|
T20 |
46 |
|
T111 |
43 |
|
T112 |
21 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
804 |
1 |
|
|
T20 |
20 |
|
T111 |
16 |
|
T112 |
3 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1724 |
1 |
|
|
T20 |
47 |
|
T111 |
43 |
|
T112 |
21 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
788 |
1 |
|
|
T20 |
21 |
|
T111 |
15 |
|
T112 |
3 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1701 |
1 |
|
|
T20 |
46 |
|
T111 |
43 |
|
T112 |
21 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
804 |
1 |
|
|
T20 |
20 |
|
T111 |
16 |
|
T112 |
3 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1690 |
1 |
|
|
T20 |
46 |
|
T111 |
43 |
|
T112 |
21 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
788 |
1 |
|
|
T20 |
21 |
|
T111 |
15 |
|
T112 |
3 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1676 |
1 |
|
|
T20 |
45 |
|
T111 |
42 |
|
T112 |
21 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
803 |
1 |
|
|
T20 |
20 |
|
T111 |
16 |
|
T112 |
3 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1660 |
1 |
|
|
T20 |
46 |
|
T111 |
42 |
|
T112 |
21 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
788 |
1 |
|
|
T20 |
21 |
|
T111 |
15 |
|
T112 |
3 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1646 |
1 |
|
|
T20 |
45 |
|
T111 |
42 |
|
T112 |
21 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
803 |
1 |
|
|
T20 |
20 |
|
T111 |
16 |
|
T112 |
3 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1627 |
1 |
|
|
T20 |
46 |
|
T111 |
42 |
|
T112 |
21 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
784 |
1 |
|
|
T20 |
21 |
|
T111 |
15 |
|
T112 |
3 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1620 |
1 |
|
|
T20 |
44 |
|
T111 |
42 |
|
T112 |
20 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
800 |
1 |
|
|
T20 |
19 |
|
T111 |
16 |
|
T112 |
3 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1589 |
1 |
|
|
T20 |
46 |
|
T111 |
42 |
|
T112 |
20 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
784 |
1 |
|
|
T20 |
21 |
|
T111 |
15 |
|
T112 |
3 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1589 |
1 |
|
|
T20 |
43 |
|
T111 |
42 |
|
T112 |
20 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
800 |
1 |
|
|
T20 |
19 |
|
T111 |
16 |
|
T112 |
3 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1555 |
1 |
|
|
T20 |
46 |
|
T111 |
41 |
|
T112 |
19 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
781 |
1 |
|
|
T20 |
21 |
|
T111 |
15 |
|
T112 |
3 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1561 |
1 |
|
|
T20 |
43 |
|
T111 |
41 |
|
T112 |
20 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
795 |
1 |
|
|
T20 |
19 |
|
T111 |
16 |
|
T112 |
3 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1526 |
1 |
|
|
T20 |
43 |
|
T111 |
36 |
|
T112 |
19 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
781 |
1 |
|
|
T20 |
21 |
|
T111 |
15 |
|
T112 |
3 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1522 |
1 |
|
|
T20 |
41 |
|
T111 |
40 |
|
T112 |
19 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
795 |
1 |
|
|
T20 |
19 |
|
T111 |
16 |
|
T112 |
3 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1497 |
1 |
|
|
T20 |
43 |
|
T111 |
36 |
|
T112 |
19 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
778 |
1 |
|
|
T20 |
21 |
|
T111 |
15 |
|
T112 |
3 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1475 |
1 |
|
|
T20 |
41 |
|
T111 |
38 |
|
T112 |
19 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
795 |
1 |
|
|
T20 |
19 |
|
T111 |
16 |
|
T112 |
3 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1464 |
1 |
|
|
T20 |
41 |
|
T111 |
35 |
|
T112 |
19 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
778 |
1 |
|
|
T20 |
21 |
|
T111 |
15 |
|
T112 |
3 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1449 |
1 |
|
|
T20 |
41 |
|
T111 |
36 |
|
T112 |
18 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
795 |
1 |
|
|
T20 |
19 |
|
T111 |
16 |
|
T112 |
3 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1424 |
1 |
|
|
T20 |
37 |
|
T111 |
35 |
|
T112 |
19 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
776 |
1 |
|
|
T20 |
21 |
|
T111 |
15 |
|
T112 |
3 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1407 |
1 |
|
|
T20 |
40 |
|
T111 |
35 |
|
T112 |
16 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
794 |
1 |
|
|
T20 |
19 |
|
T111 |
16 |
|
T112 |
3 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1390 |
1 |
|
|
T20 |
37 |
|
T111 |
34 |
|
T112 |
19 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
776 |
1 |
|
|
T20 |
21 |
|
T111 |
15 |
|
T112 |
3 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1372 |
1 |
|
|
T20 |
39 |
|
T111 |
35 |
|
T112 |
16 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
794 |
1 |
|
|
T20 |
19 |
|
T111 |
16 |
|
T112 |
3 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1360 |
1 |
|
|
T20 |
36 |
|
T111 |
33 |
|
T112 |
19 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
775 |
1 |
|
|
T20 |
21 |
|
T111 |
15 |
|
T112 |
3 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1343 |
1 |
|
|
T20 |
39 |
|
T111 |
34 |
|
T112 |
16 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
793 |
1 |
|
|
T20 |
19 |
|
T111 |
16 |
|
T112 |
3 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1319 |
1 |
|
|
T20 |
35 |
|
T111 |
33 |
|
T112 |
17 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
775 |
1 |
|
|
T20 |
21 |
|
T111 |
15 |
|
T112 |
3 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1307 |
1 |
|
|
T20 |
38 |
|
T111 |
32 |
|
T112 |
16 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
793 |
1 |
|
|
T20 |
19 |
|
T111 |
16 |
|
T112 |
3 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1291 |
1 |
|
|
T20 |
34 |
|
T111 |
33 |
|
T112 |
17 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
775 |
1 |
|
|
T20 |
21 |
|
T111 |
15 |
|
T112 |
3 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1280 |
1 |
|
|
T20 |
37 |
|
T111 |
31 |
|
T112 |
16 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
793 |
1 |
|
|
T20 |
19 |
|
T111 |
16 |
|
T112 |
3 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1249 |
1 |
|
|
T20 |
32 |
|
T111 |
31 |
|
T112 |
16 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[0] |
auto[0] |
61696 |
1 |
|
|
T20 |
1518 |
|
T111 |
1042 |
|
T112 |
1374 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47299 |
1 |
|
|
T20 |
1821 |
|
T111 |
722 |
|
T112 |
164 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[1] |
auto[0] |
66065 |
1 |
|
|
T20 |
920 |
|
T111 |
1388 |
|
T112 |
451 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[1] |
auto[1] |
41411 |
1 |
|
|
T20 |
1310 |
|
T111 |
1778 |
|
T112 |
454 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
786 |
1 |
|
|
T20 |
20 |
|
T111 |
22 |
|
T112 |
9 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1726 |
1 |
|
|
T20 |
58 |
|
T111 |
35 |
|
T112 |
15 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
778 |
1 |
|
|
T20 |
19 |
|
T111 |
17 |
|
T112 |
6 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1737 |
1 |
|
|
T20 |
59 |
|
T111 |
41 |
|
T112 |
17 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
786 |
1 |
|
|
T20 |
20 |
|
T111 |
22 |
|
T112 |
9 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1694 |
1 |
|
|
T20 |
57 |
|
T111 |
33 |
|
T112 |
13 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
778 |
1 |
|
|
T20 |
19 |
|
T111 |
17 |
|
T112 |
6 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1704 |
1 |
|
|
T20 |
58 |
|
T111 |
41 |
|
T112 |
17 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
786 |
1 |
|
|
T20 |
20 |
|
T111 |
22 |
|
T112 |
9 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1667 |
1 |
|
|
T20 |
52 |
|
T111 |
32 |
|
T112 |
13 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
776 |
1 |
|
|
T20 |
19 |
|
T111 |
17 |
|
T112 |
6 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1658 |
1 |
|
|
T20 |
56 |
|
T111 |
39 |
|
T112 |
17 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
786 |
1 |
|
|
T20 |
20 |
|
T111 |
22 |
|
T112 |
9 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1633 |
1 |
|
|
T20 |
51 |
|
T111 |
32 |
|
T112 |
12 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
776 |
1 |
|
|
T20 |
19 |
|
T111 |
17 |
|
T112 |
6 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1633 |
1 |
|
|
T20 |
56 |
|
T111 |
39 |
|
T112 |
17 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
781 |
1 |
|
|
T20 |
20 |
|
T111 |
22 |
|
T112 |
9 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1604 |
1 |
|
|
T20 |
50 |
|
T111 |
32 |
|
T112 |
11 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
774 |
1 |
|
|
T20 |
19 |
|
T111 |
17 |
|
T112 |
6 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1596 |
1 |
|
|
T20 |
56 |
|
T111 |
39 |
|
T112 |
17 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
781 |
1 |
|
|
T20 |
20 |
|
T111 |
22 |
|
T112 |
9 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1576 |
1 |
|
|
T20 |
49 |
|
T111 |
31 |
|
T112 |
11 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
774 |
1 |
|
|
T20 |
19 |
|
T111 |
17 |
|
T112 |
6 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1558 |
1 |
|
|
T20 |
56 |
|
T111 |
39 |
|
T112 |
17 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
776 |
1 |
|
|
T20 |
20 |
|
T111 |
22 |
|
T112 |
8 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1542 |
1 |
|
|
T20 |
47 |
|
T111 |
29 |
|
T112 |
11 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T20 |
19 |
|
T111 |
16 |
|
T112 |
6 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1525 |
1 |
|
|
T20 |
56 |
|
T111 |
39 |
|
T112 |
17 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
776 |
1 |
|
|
T20 |
20 |
|
T111 |
22 |
|
T112 |
8 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1522 |
1 |
|
|
T20 |
47 |
|
T111 |
29 |
|
T112 |
11 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T20 |
19 |
|
T111 |
16 |
|
T112 |
6 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1492 |
1 |
|
|
T20 |
54 |
|
T111 |
39 |
|
T112 |
17 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
776 |
1 |
|
|
T20 |
20 |
|
T111 |
22 |
|
T112 |
8 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1481 |
1 |
|
|
T20 |
45 |
|
T111 |
28 |
|
T112 |
10 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T20 |
18 |
|
T111 |
16 |
|
T112 |
6 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1456 |
1 |
|
|
T20 |
52 |
|
T111 |
39 |
|
T112 |
17 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
776 |
1 |
|
|
T20 |
20 |
|
T111 |
22 |
|
T112 |
8 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1457 |
1 |
|
|
T20 |
45 |
|
T111 |
23 |
|
T112 |
10 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T20 |
18 |
|
T111 |
16 |
|
T112 |
6 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1418 |
1 |
|
|
T20 |
52 |
|
T111 |
38 |
|
T112 |
17 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
772 |
1 |
|
|
T20 |
20 |
|
T111 |
22 |
|
T112 |
8 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1425 |
1 |
|
|
T20 |
45 |
|
T111 |
22 |
|
T112 |
8 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T20 |
18 |
|
T111 |
16 |
|
T112 |
6 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1378 |
1 |
|
|
T20 |
51 |
|
T111 |
37 |
|
T112 |
17 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
772 |
1 |
|
|
T20 |
20 |
|
T111 |
22 |
|
T112 |
8 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1397 |
1 |
|
|
T20 |
44 |
|
T111 |
22 |
|
T112 |
8 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T20 |
18 |
|
T111 |
16 |
|
T112 |
6 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1345 |
1 |
|
|
T20 |
50 |
|
T111 |
36 |
|
T112 |
17 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T20 |
20 |
|
T111 |
22 |
|
T112 |
8 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1358 |
1 |
|
|
T20 |
43 |
|
T111 |
22 |
|
T112 |
8 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T20 |
18 |
|
T111 |
16 |
|
T112 |
6 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1303 |
1 |
|
|
T20 |
49 |
|
T111 |
36 |
|
T112 |
17 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T20 |
20 |
|
T111 |
22 |
|
T112 |
8 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1314 |
1 |
|
|
T20 |
42 |
|
T111 |
22 |
|
T112 |
8 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T20 |
18 |
|
T111 |
16 |
|
T112 |
6 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1263 |
1 |
|
|
T20 |
48 |
|
T111 |
34 |
|
T112 |
17 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T20 |
20 |
|
T111 |
22 |
|
T112 |
8 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1286 |
1 |
|
|
T20 |
42 |
|
T111 |
21 |
|
T112 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T20 |
18 |
|
T111 |
16 |
|
T112 |
6 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1235 |
1 |
|
|
T20 |
47 |
|
T111 |
34 |
|
T112 |
17 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[0] |
auto[0] |
60435 |
1 |
|
|
T20 |
1765 |
|
T111 |
984 |
|
T112 |
318 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[0] |
auto[1] |
49241 |
1 |
|
|
T20 |
1310 |
|
T111 |
1059 |
|
T112 |
302 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[1] |
auto[0] |
60529 |
1 |
|
|
T20 |
1577 |
|
T111 |
944 |
|
T112 |
526 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46361 |
1 |
|
|
T20 |
966 |
|
T111 |
1981 |
|
T112 |
1288 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
757 |
1 |
|
|
T20 |
22 |
|
T111 |
16 |
|
T112 |
6 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1763 |
1 |
|
|
T20 |
55 |
|
T111 |
41 |
|
T112 |
18 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
781 |
1 |
|
|
T20 |
22 |
|
T111 |
13 |
|
T112 |
9 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1740 |
1 |
|
|
T20 |
56 |
|
T111 |
45 |
|
T112 |
15 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
757 |
1 |
|
|
T20 |
22 |
|
T111 |
16 |
|
T112 |
6 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1732 |
1 |
|
|
T20 |
55 |
|
T111 |
40 |
|
T112 |
18 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
781 |
1 |
|
|
T20 |
22 |
|
T111 |
13 |
|
T112 |
9 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1692 |
1 |
|
|
T20 |
50 |
|
T111 |
45 |
|
T112 |
14 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
757 |
1 |
|
|
T20 |
22 |
|
T111 |
16 |
|
T112 |
6 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1687 |
1 |
|
|
T20 |
55 |
|
T111 |
39 |
|
T112 |
16 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
778 |
1 |
|
|
T20 |
22 |
|
T111 |
13 |
|
T112 |
9 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1654 |
1 |
|
|
T20 |
47 |
|
T111 |
42 |
|
T112 |
14 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
757 |
1 |
|
|
T20 |
22 |
|
T111 |
16 |
|
T112 |
6 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1665 |
1 |
|
|
T20 |
55 |
|
T111 |
36 |
|
T112 |
16 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
778 |
1 |
|
|
T20 |
22 |
|
T111 |
13 |
|
T112 |
9 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1616 |
1 |
|
|
T20 |
45 |
|
T111 |
40 |
|
T112 |
14 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T20 |
22 |
|
T111 |
16 |
|
T112 |
6 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1625 |
1 |
|
|
T20 |
55 |
|
T111 |
36 |
|
T112 |
16 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
775 |
1 |
|
|
T20 |
21 |
|
T111 |
13 |
|
T112 |
9 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1587 |
1 |
|
|
T20 |
45 |
|
T111 |
40 |
|
T112 |
14 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T20 |
22 |
|
T111 |
16 |
|
T112 |
6 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1605 |
1 |
|
|
T20 |
53 |
|
T111 |
35 |
|
T112 |
15 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
775 |
1 |
|
|
T20 |
21 |
|
T111 |
13 |
|
T112 |
9 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1542 |
1 |
|
|
T20 |
42 |
|
T111 |
38 |
|
T112 |
12 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T20 |
22 |
|
T111 |
16 |
|
T112 |
6 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1571 |
1 |
|
|
T20 |
51 |
|
T111 |
34 |
|
T112 |
15 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
767 |
1 |
|
|
T20 |
21 |
|
T111 |
12 |
|
T112 |
9 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1513 |
1 |
|
|
T20 |
42 |
|
T111 |
38 |
|
T112 |
12 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T20 |
22 |
|
T111 |
16 |
|
T112 |
6 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1537 |
1 |
|
|
T20 |
49 |
|
T111 |
34 |
|
T112 |
15 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
767 |
1 |
|
|
T20 |
21 |
|
T111 |
12 |
|
T112 |
9 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1475 |
1 |
|
|
T20 |
41 |
|
T111 |
37 |
|
T112 |
12 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T20 |
22 |
|
T111 |
16 |
|
T112 |
6 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1500 |
1 |
|
|
T20 |
49 |
|
T111 |
34 |
|
T112 |
14 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
764 |
1 |
|
|
T20 |
21 |
|
T111 |
12 |
|
T112 |
9 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1442 |
1 |
|
|
T20 |
41 |
|
T111 |
37 |
|
T112 |
12 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T20 |
22 |
|
T111 |
16 |
|
T112 |
6 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1469 |
1 |
|
|
T20 |
49 |
|
T111 |
34 |
|
T112 |
14 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
764 |
1 |
|
|
T20 |
21 |
|
T111 |
12 |
|
T112 |
9 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1416 |
1 |
|
|
T20 |
40 |
|
T111 |
36 |
|
T112 |
12 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T20 |
22 |
|
T111 |
16 |
|
T112 |
6 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1442 |
1 |
|
|
T20 |
48 |
|
T111 |
34 |
|
T112 |
14 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T20 |
21 |
|
T111 |
12 |
|
T112 |
9 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1382 |
1 |
|
|
T20 |
40 |
|
T111 |
35 |
|
T112 |
11 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T20 |
22 |
|
T111 |
16 |
|
T112 |
6 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1412 |
1 |
|
|
T20 |
46 |
|
T111 |
34 |
|
T112 |
14 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T20 |
21 |
|
T111 |
12 |
|
T112 |
9 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1347 |
1 |
|
|
T20 |
40 |
|
T111 |
33 |
|
T112 |
11 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T20 |
22 |
|
T111 |
16 |
|
T112 |
6 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1384 |
1 |
|
|
T20 |
46 |
|
T111 |
34 |
|
T112 |
14 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T20 |
21 |
|
T111 |
12 |
|
T112 |
9 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1318 |
1 |
|
|
T20 |
39 |
|
T111 |
33 |
|
T112 |
11 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T20 |
22 |
|
T111 |
16 |
|
T112 |
6 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1354 |
1 |
|
|
T20 |
44 |
|
T111 |
33 |
|
T112 |
13 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T20 |
21 |
|
T111 |
12 |
|
T112 |
9 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1284 |
1 |
|
|
T20 |
38 |
|
T111 |
33 |
|
T112 |
11 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T20 |
22 |
|
T111 |
16 |
|
T112 |
6 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1322 |
1 |
|
|
T20 |
43 |
|
T111 |
33 |
|
T112 |
13 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T20 |
21 |
|
T111 |
12 |
|
T112 |
9 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1253 |
1 |
|
|
T20 |
38 |
|
T111 |
32 |
|
T112 |
11 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[0] |
auto[0] |
66636 |
1 |
|
|
T20 |
1801 |
|
T111 |
1361 |
|
T112 |
1447 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45742 |
1 |
|
|
T20 |
1442 |
|
T111 |
1623 |
|
T112 |
359 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57462 |
1 |
|
|
T20 |
1812 |
|
T111 |
1146 |
|
T112 |
380 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46477 |
1 |
|
|
T20 |
676 |
|
T111 |
844 |
|
T112 |
296 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
794 |
1 |
|
|
T20 |
25 |
|
T111 |
18 |
|
T112 |
9 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1735 |
1 |
|
|
T20 |
46 |
|
T111 |
38 |
|
T112 |
13 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
791 |
1 |
|
|
T20 |
29 |
|
T111 |
19 |
|
T112 |
7 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1734 |
1 |
|
|
T20 |
42 |
|
T111 |
37 |
|
T112 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
794 |
1 |
|
|
T20 |
25 |
|
T111 |
18 |
|
T112 |
9 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1698 |
1 |
|
|
T20 |
46 |
|
T111 |
36 |
|
T112 |
13 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
791 |
1 |
|
|
T20 |
29 |
|
T111 |
19 |
|
T112 |
7 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1695 |
1 |
|
|
T20 |
42 |
|
T111 |
37 |
|
T112 |
13 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
794 |
1 |
|
|
T20 |
25 |
|
T111 |
18 |
|
T112 |
9 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1661 |
1 |
|
|
T20 |
44 |
|
T111 |
36 |
|
T112 |
13 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
789 |
1 |
|
|
T20 |
29 |
|
T111 |
19 |
|
T112 |
7 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1668 |
1 |
|
|
T20 |
42 |
|
T111 |
37 |
|
T112 |
13 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
794 |
1 |
|
|
T20 |
25 |
|
T111 |
18 |
|
T112 |
9 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1623 |
1 |
|
|
T20 |
44 |
|
T111 |
34 |
|
T112 |
13 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
789 |
1 |
|
|
T20 |
29 |
|
T111 |
19 |
|
T112 |
7 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1641 |
1 |
|
|
T20 |
42 |
|
T111 |
37 |
|
T112 |
13 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
790 |
1 |
|
|
T20 |
25 |
|
T111 |
18 |
|
T112 |
9 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1589 |
1 |
|
|
T20 |
43 |
|
T111 |
34 |
|
T112 |
13 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
788 |
1 |
|
|
T20 |
28 |
|
T111 |
19 |
|
T112 |
7 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1613 |
1 |
|
|
T20 |
41 |
|
T111 |
36 |
|
T112 |
13 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
790 |
1 |
|
|
T20 |
25 |
|
T111 |
18 |
|
T112 |
9 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1558 |
1 |
|
|
T20 |
41 |
|
T111 |
31 |
|
T112 |
13 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
788 |
1 |
|
|
T20 |
28 |
|
T111 |
19 |
|
T112 |
7 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1587 |
1 |
|
|
T20 |
41 |
|
T111 |
36 |
|
T112 |
13 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
786 |
1 |
|
|
T20 |
25 |
|
T111 |
18 |
|
T112 |
8 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1517 |
1 |
|
|
T20 |
39 |
|
T111 |
31 |
|
T112 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
783 |
1 |
|
|
T20 |
28 |
|
T111 |
19 |
|
T112 |
7 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1543 |
1 |
|
|
T20 |
39 |
|
T111 |
35 |
|
T112 |
11 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
786 |
1 |
|
|
T20 |
25 |
|
T111 |
18 |
|
T112 |
8 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1483 |
1 |
|
|
T20 |
38 |
|
T111 |
29 |
|
T112 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
783 |
1 |
|
|
T20 |
28 |
|
T111 |
19 |
|
T112 |
7 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1514 |
1 |
|
|
T20 |
37 |
|
T111 |
35 |
|
T112 |
11 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
784 |
1 |
|
|
T20 |
25 |
|
T111 |
18 |
|
T112 |
8 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1446 |
1 |
|
|
T20 |
37 |
|
T111 |
28 |
|
T112 |
13 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
778 |
1 |
|
|
T20 |
28 |
|
T111 |
19 |
|
T112 |
7 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1477 |
1 |
|
|
T20 |
34 |
|
T111 |
35 |
|
T112 |
10 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
784 |
1 |
|
|
T20 |
25 |
|
T111 |
18 |
|
T112 |
8 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1412 |
1 |
|
|
T20 |
36 |
|
T111 |
28 |
|
T112 |
13 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
778 |
1 |
|
|
T20 |
28 |
|
T111 |
19 |
|
T112 |
7 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1441 |
1 |
|
|
T20 |
34 |
|
T111 |
32 |
|
T112 |
10 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
782 |
1 |
|
|
T20 |
25 |
|
T111 |
18 |
|
T112 |
8 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1379 |
1 |
|
|
T20 |
36 |
|
T111 |
28 |
|
T112 |
12 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
777 |
1 |
|
|
T20 |
28 |
|
T111 |
19 |
|
T112 |
7 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1403 |
1 |
|
|
T20 |
33 |
|
T111 |
32 |
|
T112 |
10 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
782 |
1 |
|
|
T20 |
25 |
|
T111 |
18 |
|
T112 |
8 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1329 |
1 |
|
|
T20 |
34 |
|
T111 |
26 |
|
T112 |
12 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
777 |
1 |
|
|
T20 |
28 |
|
T111 |
19 |
|
T112 |
7 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1358 |
1 |
|
|
T20 |
33 |
|
T111 |
30 |
|
T112 |
10 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
781 |
1 |
|
|
T20 |
25 |
|
T111 |
18 |
|
T112 |
8 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1292 |
1 |
|
|
T20 |
33 |
|
T111 |
26 |
|
T112 |
12 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
777 |
1 |
|
|
T20 |
28 |
|
T111 |
19 |
|
T112 |
7 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1324 |
1 |
|
|
T20 |
33 |
|
T111 |
30 |
|
T112 |
8 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
781 |
1 |
|
|
T20 |
25 |
|
T111 |
18 |
|
T112 |
8 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1265 |
1 |
|
|
T20 |
32 |
|
T111 |
25 |
|
T112 |
12 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
777 |
1 |
|
|
T20 |
28 |
|
T111 |
19 |
|
T112 |
7 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1297 |
1 |
|
|
T20 |
33 |
|
T111 |
29 |
|
T112 |
8 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
781 |
1 |
|
|
T20 |
25 |
|
T111 |
18 |
|
T112 |
8 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1224 |
1 |
|
|
T20 |
29 |
|
T111 |
25 |
|
T112 |
12 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
777 |
1 |
|
|
T20 |
28 |
|
T111 |
19 |
|
T112 |
7 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1261 |
1 |
|
|
T20 |
30 |
|
T111 |
27 |
|
T112 |
8 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58754 |
1 |
|
|
T20 |
1517 |
|
T111 |
1016 |
|
T112 |
375 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45496 |
1 |
|
|
T20 |
1020 |
|
T111 |
828 |
|
T112 |
321 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[1] |
auto[0] |
63989 |
1 |
|
|
T20 |
2154 |
|
T111 |
1773 |
|
T112 |
489 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47938 |
1 |
|
|
T20 |
1032 |
|
T111 |
1152 |
|
T112 |
1259 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
773 |
1 |
|
|
T20 |
25 |
|
T111 |
16 |
|
T112 |
6 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1750 |
1 |
|
|
T20 |
45 |
|
T111 |
47 |
|
T112 |
17 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
802 |
1 |
|
|
T20 |
28 |
|
T111 |
16 |
|
T112 |
7 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1728 |
1 |
|
|
T20 |
43 |
|
T111 |
48 |
|
T112 |
16 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
773 |
1 |
|
|
T20 |
25 |
|
T111 |
16 |
|
T112 |
6 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1715 |
1 |
|
|
T20 |
45 |
|
T111 |
45 |
|
T112 |
16 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
802 |
1 |
|
|
T20 |
28 |
|
T111 |
16 |
|
T112 |
7 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1698 |
1 |
|
|
T20 |
43 |
|
T111 |
47 |
|
T112 |
16 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
773 |
1 |
|
|
T20 |
25 |
|
T111 |
16 |
|
T112 |
6 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1677 |
1 |
|
|
T20 |
44 |
|
T111 |
45 |
|
T112 |
16 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
801 |
1 |
|
|
T20 |
28 |
|
T111 |
16 |
|
T112 |
7 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1669 |
1 |
|
|
T20 |
43 |
|
T111 |
47 |
|
T112 |
16 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
773 |
1 |
|
|
T20 |
25 |
|
T111 |
16 |
|
T112 |
6 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1637 |
1 |
|
|
T20 |
43 |
|
T111 |
45 |
|
T112 |
16 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
801 |
1 |
|
|
T20 |
28 |
|
T111 |
16 |
|
T112 |
7 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1631 |
1 |
|
|
T20 |
43 |
|
T111 |
47 |
|
T112 |
16 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T20 |
25 |
|
T111 |
16 |
|
T112 |
6 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1599 |
1 |
|
|
T20 |
41 |
|
T111 |
45 |
|
T112 |
16 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
799 |
1 |
|
|
T20 |
28 |
|
T111 |
16 |
|
T112 |
7 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1596 |
1 |
|
|
T20 |
41 |
|
T111 |
45 |
|
T112 |
16 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T20 |
25 |
|
T111 |
16 |
|
T112 |
6 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1574 |
1 |
|
|
T20 |
40 |
|
T111 |
44 |
|
T112 |
16 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
799 |
1 |
|
|
T20 |
28 |
|
T111 |
16 |
|
T112 |
7 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1557 |
1 |
|
|
T20 |
38 |
|
T111 |
43 |
|
T112 |
15 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
764 |
1 |
|
|
T20 |
25 |
|
T111 |
16 |
|
T112 |
5 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1539 |
1 |
|
|
T20 |
39 |
|
T111 |
43 |
|
T112 |
15 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
793 |
1 |
|
|
T20 |
28 |
|
T111 |
16 |
|
T112 |
7 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1525 |
1 |
|
|
T20 |
37 |
|
T111 |
43 |
|
T112 |
15 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
764 |
1 |
|
|
T20 |
25 |
|
T111 |
16 |
|
T112 |
5 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1511 |
1 |
|
|
T20 |
39 |
|
T111 |
41 |
|
T112 |
15 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
793 |
1 |
|
|
T20 |
28 |
|
T111 |
16 |
|
T112 |
7 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1485 |
1 |
|
|
T20 |
35 |
|
T111 |
43 |
|
T112 |
15 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
762 |
1 |
|
|
T20 |
25 |
|
T111 |
16 |
|
T112 |
5 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1479 |
1 |
|
|
T20 |
39 |
|
T111 |
40 |
|
T112 |
15 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
790 |
1 |
|
|
T20 |
28 |
|
T111 |
16 |
|
T112 |
7 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1460 |
1 |
|
|
T20 |
34 |
|
T111 |
42 |
|
T112 |
15 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
762 |
1 |
|
|
T20 |
25 |
|
T111 |
16 |
|
T112 |
5 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1454 |
1 |
|
|
T20 |
38 |
|
T111 |
39 |
|
T112 |
15 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
790 |
1 |
|
|
T20 |
28 |
|
T111 |
16 |
|
T112 |
7 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1426 |
1 |
|
|
T20 |
33 |
|
T111 |
41 |
|
T112 |
15 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T20 |
25 |
|
T111 |
16 |
|
T112 |
5 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1420 |
1 |
|
|
T20 |
38 |
|
T111 |
36 |
|
T112 |
13 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
786 |
1 |
|
|
T20 |
28 |
|
T111 |
16 |
|
T112 |
7 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1394 |
1 |
|
|
T20 |
33 |
|
T111 |
41 |
|
T112 |
15 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T20 |
25 |
|
T111 |
16 |
|
T112 |
5 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1383 |
1 |
|
|
T20 |
38 |
|
T111 |
35 |
|
T112 |
12 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
786 |
1 |
|
|
T20 |
28 |
|
T111 |
16 |
|
T112 |
7 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1360 |
1 |
|
|
T20 |
32 |
|
T111 |
40 |
|
T112 |
15 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T20 |
25 |
|
T111 |
16 |
|
T112 |
5 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1344 |
1 |
|
|
T20 |
38 |
|
T111 |
34 |
|
T112 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
786 |
1 |
|
|
T20 |
28 |
|
T111 |
16 |
|
T112 |
7 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1323 |
1 |
|
|
T20 |
30 |
|
T111 |
38 |
|
T112 |
14 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T20 |
25 |
|
T111 |
16 |
|
T112 |
5 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1310 |
1 |
|
|
T20 |
37 |
|
T111 |
33 |
|
T112 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
786 |
1 |
|
|
T20 |
28 |
|
T111 |
16 |
|
T112 |
7 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1296 |
1 |
|
|
T20 |
30 |
|
T111 |
36 |
|
T112 |
14 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T20 |
25 |
|
T111 |
16 |
|
T112 |
5 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1276 |
1 |
|
|
T20 |
37 |
|
T111 |
31 |
|
T112 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
786 |
1 |
|
|
T20 |
28 |
|
T111 |
16 |
|
T112 |
7 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1261 |
1 |
|
|
T20 |
30 |
|
T111 |
36 |
|
T112 |
12 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[0] |
auto[0] |
61536 |
1 |
|
|
T20 |
2013 |
|
T111 |
979 |
|
T112 |
387 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[0] |
auto[1] |
51854 |
1 |
|
|
T20 |
1235 |
|
T111 |
1784 |
|
T112 |
232 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[1] |
auto[0] |
60015 |
1 |
|
|
T20 |
1349 |
|
T111 |
919 |
|
T112 |
1509 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[1] |
auto[1] |
43682 |
1 |
|
|
T20 |
1121 |
|
T111 |
1071 |
|
T112 |
384 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
774 |
1 |
|
|
T20 |
18 |
|
T111 |
16 |
|
T112 |
7 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1719 |
1 |
|
|
T20 |
54 |
|
T111 |
49 |
|
T112 |
13 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
787 |
1 |
|
|
T20 |
21 |
|
T111 |
15 |
|
T112 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1702 |
1 |
|
|
T20 |
51 |
|
T111 |
50 |
|
T112 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
774 |
1 |
|
|
T20 |
18 |
|
T111 |
16 |
|
T112 |
7 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1691 |
1 |
|
|
T20 |
53 |
|
T111 |
49 |
|
T112 |
12 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
787 |
1 |
|
|
T20 |
21 |
|
T111 |
15 |
|
T112 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1665 |
1 |
|
|
T20 |
51 |
|
T111 |
47 |
|
T112 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
774 |
1 |
|
|
T20 |
18 |
|
T111 |
16 |
|
T112 |
7 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1656 |
1 |
|
|
T20 |
53 |
|
T111 |
49 |
|
T112 |
12 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
785 |
1 |
|
|
T20 |
21 |
|
T111 |
15 |
|
T112 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1635 |
1 |
|
|
T20 |
50 |
|
T111 |
47 |
|
T112 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
774 |
1 |
|
|
T20 |
18 |
|
T111 |
16 |
|
T112 |
7 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1628 |
1 |
|
|
T20 |
52 |
|
T111 |
48 |
|
T112 |
12 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
785 |
1 |
|
|
T20 |
21 |
|
T111 |
15 |
|
T112 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1599 |
1 |
|
|
T20 |
50 |
|
T111 |
46 |
|
T112 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
773 |
1 |
|
|
T20 |
18 |
|
T111 |
16 |
|
T112 |
7 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1586 |
1 |
|
|
T20 |
51 |
|
T111 |
47 |
|
T112 |
12 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
783 |
1 |
|
|
T20 |
20 |
|
T111 |
15 |
|
T112 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1573 |
1 |
|
|
T20 |
51 |
|
T111 |
44 |
|
T112 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
773 |
1 |
|
|
T20 |
18 |
|
T111 |
16 |
|
T112 |
7 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1546 |
1 |
|
|
T20 |
47 |
|
T111 |
46 |
|
T112 |
12 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
783 |
1 |
|
|
T20 |
20 |
|
T111 |
15 |
|
T112 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1545 |
1 |
|
|
T20 |
48 |
|
T111 |
44 |
|
T112 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
768 |
1 |
|
|
T20 |
18 |
|
T111 |
16 |
|
T112 |
7 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1512 |
1 |
|
|
T20 |
47 |
|
T111 |
44 |
|
T112 |
11 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
776 |
1 |
|
|
T20 |
20 |
|
T111 |
15 |
|
T112 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1507 |
1 |
|
|
T20 |
47 |
|
T111 |
43 |
|
T112 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
768 |
1 |
|
|
T20 |
18 |
|
T111 |
16 |
|
T112 |
7 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1486 |
1 |
|
|
T20 |
47 |
|
T111 |
43 |
|
T112 |
11 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
776 |
1 |
|
|
T20 |
20 |
|
T111 |
15 |
|
T112 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1467 |
1 |
|
|
T20 |
45 |
|
T111 |
41 |
|
T112 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
766 |
1 |
|
|
T20 |
18 |
|
T111 |
16 |
|
T112 |
7 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1454 |
1 |
|
|
T20 |
46 |
|
T111 |
43 |
|
T112 |
11 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
773 |
1 |
|
|
T20 |
20 |
|
T111 |
15 |
|
T112 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1440 |
1 |
|
|
T20 |
44 |
|
T111 |
41 |
|
T112 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
766 |
1 |
|
|
T20 |
18 |
|
T111 |
16 |
|
T112 |
7 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1428 |
1 |
|
|
T20 |
46 |
|
T111 |
41 |
|
T112 |
11 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
773 |
1 |
|
|
T20 |
20 |
|
T111 |
15 |
|
T112 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1399 |
1 |
|
|
T20 |
41 |
|
T111 |
41 |
|
T112 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
762 |
1 |
|
|
T20 |
18 |
|
T111 |
16 |
|
T112 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1401 |
1 |
|
|
T20 |
45 |
|
T111 |
38 |
|
T112 |
11 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
771 |
1 |
|
|
T20 |
20 |
|
T111 |
15 |
|
T112 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1367 |
1 |
|
|
T20 |
41 |
|
T111 |
41 |
|
T112 |
13 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
762 |
1 |
|
|
T20 |
18 |
|
T111 |
16 |
|
T112 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1368 |
1 |
|
|
T20 |
44 |
|
T111 |
37 |
|
T112 |
10 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
771 |
1 |
|
|
T20 |
20 |
|
T111 |
15 |
|
T112 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1329 |
1 |
|
|
T20 |
38 |
|
T111 |
39 |
|
T112 |
13 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T20 |
18 |
|
T111 |
16 |
|
T112 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1323 |
1 |
|
|
T20 |
42 |
|
T111 |
35 |
|
T112 |
9 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
771 |
1 |
|
|
T20 |
20 |
|
T111 |
15 |
|
T112 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1297 |
1 |
|
|
T20 |
37 |
|
T111 |
39 |
|
T112 |
13 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T20 |
18 |
|
T111 |
16 |
|
T112 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1287 |
1 |
|
|
T20 |
39 |
|
T111 |
34 |
|
T112 |
8 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
771 |
1 |
|
|
T20 |
20 |
|
T111 |
15 |
|
T112 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1264 |
1 |
|
|
T20 |
37 |
|
T111 |
37 |
|
T112 |
13 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T20 |
18 |
|
T111 |
16 |
|
T112 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1257 |
1 |
|
|
T20 |
38 |
|
T111 |
32 |
|
T112 |
8 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
771 |
1 |
|
|
T20 |
20 |
|
T111 |
15 |
|
T112 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1232 |
1 |
|
|
T20 |
37 |
|
T111 |
36 |
|
T112 |
13 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[0] |
auto[0] |
59545 |
1 |
|
|
T20 |
1787 |
|
T111 |
1126 |
|
T112 |
1440 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[0] |
auto[1] |
49977 |
1 |
|
|
T20 |
1017 |
|
T111 |
704 |
|
T112 |
242 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[1] |
auto[0] |
61954 |
1 |
|
|
T20 |
1212 |
|
T111 |
2639 |
|
T112 |
569 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45362 |
1 |
|
|
T20 |
1677 |
|
T111 |
533 |
|
T112 |
165 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
760 |
1 |
|
|
T20 |
22 |
|
T111 |
18 |
|
T112 |
8 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1739 |
1 |
|
|
T20 |
50 |
|
T111 |
35 |
|
T112 |
17 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
771 |
1 |
|
|
T20 |
22 |
|
T111 |
24 |
|
T112 |
11 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1728 |
1 |
|
|
T20 |
51 |
|
T111 |
30 |
|
T112 |
13 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
760 |
1 |
|
|
T20 |
22 |
|
T111 |
18 |
|
T112 |
8 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1701 |
1 |
|
|
T20 |
50 |
|
T111 |
35 |
|
T112 |
17 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
771 |
1 |
|
|
T20 |
22 |
|
T111 |
24 |
|
T112 |
11 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1690 |
1 |
|
|
T20 |
51 |
|
T111 |
30 |
|
T112 |
13 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
760 |
1 |
|
|
T20 |
22 |
|
T111 |
18 |
|
T112 |
8 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1665 |
1 |
|
|
T20 |
49 |
|
T111 |
35 |
|
T112 |
17 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
769 |
1 |
|
|
T20 |
22 |
|
T111 |
24 |
|
T112 |
11 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1664 |
1 |
|
|
T20 |
49 |
|
T111 |
29 |
|
T112 |
13 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
760 |
1 |
|
|
T20 |
22 |
|
T111 |
18 |
|
T112 |
8 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1633 |
1 |
|
|
T20 |
46 |
|
T111 |
34 |
|
T112 |
17 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
769 |
1 |
|
|
T20 |
22 |
|
T111 |
24 |
|
T112 |
11 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1637 |
1 |
|
|
T20 |
48 |
|
T111 |
29 |
|
T112 |
11 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T20 |
22 |
|
T111 |
18 |
|
T112 |
8 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1595 |
1 |
|
|
T20 |
44 |
|
T111 |
33 |
|
T112 |
17 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
768 |
1 |
|
|
T20 |
21 |
|
T111 |
24 |
|
T112 |
11 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1602 |
1 |
|
|
T20 |
46 |
|
T111 |
29 |
|
T112 |
11 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T20 |
22 |
|
T111 |
18 |
|
T112 |
8 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1566 |
1 |
|
|
T20 |
44 |
|
T111 |
32 |
|
T112 |
16 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
768 |
1 |
|
|
T20 |
21 |
|
T111 |
24 |
|
T112 |
11 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1570 |
1 |
|
|
T20 |
46 |
|
T111 |
29 |
|
T112 |
10 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T20 |
22 |
|
T111 |
18 |
|
T112 |
8 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1543 |
1 |
|
|
T20 |
43 |
|
T111 |
32 |
|
T112 |
16 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T20 |
21 |
|
T111 |
23 |
|
T112 |
11 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1529 |
1 |
|
|
T20 |
44 |
|
T111 |
29 |
|
T112 |
10 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T20 |
22 |
|
T111 |
18 |
|
T112 |
8 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1513 |
1 |
|
|
T20 |
43 |
|
T111 |
32 |
|
T112 |
16 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T20 |
21 |
|
T111 |
23 |
|
T112 |
11 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1501 |
1 |
|
|
T20 |
44 |
|
T111 |
29 |
|
T112 |
10 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T20 |
22 |
|
T111 |
18 |
|
T112 |
8 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1482 |
1 |
|
|
T20 |
43 |
|
T111 |
31 |
|
T112 |
14 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
759 |
1 |
|
|
T20 |
21 |
|
T111 |
23 |
|
T112 |
11 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1463 |
1 |
|
|
T20 |
44 |
|
T111 |
27 |
|
T112 |
10 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T20 |
22 |
|
T111 |
18 |
|
T112 |
8 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1448 |
1 |
|
|
T20 |
43 |
|
T111 |
30 |
|
T112 |
13 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
759 |
1 |
|
|
T20 |
21 |
|
T111 |
23 |
|
T112 |
11 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1430 |
1 |
|
|
T20 |
44 |
|
T111 |
25 |
|
T112 |
10 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T20 |
22 |
|
T111 |
18 |
|
T112 |
8 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1413 |
1 |
|
|
T20 |
40 |
|
T111 |
29 |
|
T112 |
13 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T20 |
21 |
|
T111 |
23 |
|
T112 |
11 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1396 |
1 |
|
|
T20 |
43 |
|
T111 |
25 |
|
T112 |
10 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T20 |
22 |
|
T111 |
18 |
|
T112 |
8 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1384 |
1 |
|
|
T20 |
39 |
|
T111 |
28 |
|
T112 |
12 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T20 |
21 |
|
T111 |
23 |
|
T112 |
11 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1362 |
1 |
|
|
T20 |
43 |
|
T111 |
25 |
|
T112 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T20 |
22 |
|
T111 |
18 |
|
T112 |
8 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1348 |
1 |
|
|
T20 |
39 |
|
T111 |
28 |
|
T112 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T20 |
21 |
|
T111 |
23 |
|
T112 |
11 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1327 |
1 |
|
|
T20 |
42 |
|
T111 |
22 |
|
T112 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T20 |
22 |
|
T111 |
18 |
|
T112 |
8 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1313 |
1 |
|
|
T20 |
38 |
|
T111 |
27 |
|
T112 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T20 |
21 |
|
T111 |
23 |
|
T112 |
11 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1294 |
1 |
|
|
T20 |
41 |
|
T111 |
21 |
|
T112 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T20 |
22 |
|
T111 |
18 |
|
T112 |
8 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1271 |
1 |
|
|
T20 |
35 |
|
T111 |
27 |
|
T112 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T20 |
21 |
|
T111 |
23 |
|
T112 |
11 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1242 |
1 |
|
|
T20 |
40 |
|
T111 |
19 |
|
T112 |
9 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58627 |
1 |
|
|
T20 |
1714 |
|
T111 |
2530 |
|
T112 |
653 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[0] |
auto[1] |
49042 |
1 |
|
|
T20 |
698 |
|
T111 |
885 |
|
T112 |
1179 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[1] |
auto[0] |
61989 |
1 |
|
|
T20 |
2020 |
|
T111 |
935 |
|
T112 |
366 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46800 |
1 |
|
|
T20 |
1120 |
|
T111 |
718 |
|
T112 |
290 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
803 |
1 |
|
|
T20 |
27 |
|
T111 |
20 |
|
T112 |
10 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1708 |
1 |
|
|
T20 |
50 |
|
T111 |
31 |
|
T112 |
11 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
813 |
1 |
|
|
T20 |
23 |
|
T111 |
22 |
|
T112 |
8 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1701 |
1 |
|
|
T20 |
55 |
|
T111 |
29 |
|
T112 |
12 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
803 |
1 |
|
|
T20 |
27 |
|
T111 |
20 |
|
T112 |
10 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1665 |
1 |
|
|
T20 |
50 |
|
T111 |
30 |
|
T112 |
11 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
813 |
1 |
|
|
T20 |
23 |
|
T111 |
22 |
|
T112 |
8 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1675 |
1 |
|
|
T20 |
55 |
|
T111 |
29 |
|
T112 |
12 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
803 |
1 |
|
|
T20 |
27 |
|
T111 |
20 |
|
T112 |
10 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1626 |
1 |
|
|
T20 |
50 |
|
T111 |
30 |
|
T112 |
11 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
812 |
1 |
|
|
T20 |
23 |
|
T111 |
22 |
|
T112 |
8 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1640 |
1 |
|
|
T20 |
55 |
|
T111 |
29 |
|
T112 |
11 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
803 |
1 |
|
|
T20 |
27 |
|
T111 |
20 |
|
T112 |
10 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1593 |
1 |
|
|
T20 |
48 |
|
T111 |
29 |
|
T112 |
11 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
812 |
1 |
|
|
T20 |
23 |
|
T111 |
22 |
|
T112 |
8 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1601 |
1 |
|
|
T20 |
55 |
|
T111 |
29 |
|
T112 |
11 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
799 |
1 |
|
|
T20 |
27 |
|
T111 |
20 |
|
T112 |
10 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1553 |
1 |
|
|
T20 |
48 |
|
T111 |
27 |
|
T112 |
11 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
809 |
1 |
|
|
T20 |
22 |
|
T111 |
22 |
|
T112 |
8 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1577 |
1 |
|
|
T20 |
56 |
|
T111 |
29 |
|
T112 |
11 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
799 |
1 |
|
|
T20 |
27 |
|
T111 |
20 |
|
T112 |
10 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1515 |
1 |
|
|
T20 |
46 |
|
T111 |
26 |
|
T112 |
11 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
809 |
1 |
|
|
T20 |
22 |
|
T111 |
22 |
|
T112 |
8 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1545 |
1 |
|
|
T20 |
54 |
|
T111 |
29 |
|
T112 |
10 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
793 |
1 |
|
|
T20 |
27 |
|
T111 |
20 |
|
T112 |
9 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1489 |
1 |
|
|
T20 |
45 |
|
T111 |
26 |
|
T112 |
12 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
801 |
1 |
|
|
T20 |
22 |
|
T111 |
22 |
|
T112 |
8 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1515 |
1 |
|
|
T20 |
53 |
|
T111 |
29 |
|
T112 |
10 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
793 |
1 |
|
|
T20 |
27 |
|
T111 |
20 |
|
T112 |
9 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1464 |
1 |
|
|
T20 |
44 |
|
T111 |
26 |
|
T112 |
12 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
801 |
1 |
|
|
T20 |
22 |
|
T111 |
22 |
|
T112 |
8 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1482 |
1 |
|
|
T20 |
53 |
|
T111 |
28 |
|
T112 |
10 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
791 |
1 |
|
|
T20 |
27 |
|
T111 |
20 |
|
T112 |
9 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1431 |
1 |
|
|
T20 |
39 |
|
T111 |
26 |
|
T112 |
12 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
798 |
1 |
|
|
T20 |
22 |
|
T111 |
22 |
|
T112 |
8 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1450 |
1 |
|
|
T20 |
49 |
|
T111 |
27 |
|
T112 |
10 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
791 |
1 |
|
|
T20 |
27 |
|
T111 |
20 |
|
T112 |
9 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1393 |
1 |
|
|
T20 |
36 |
|
T111 |
26 |
|
T112 |
12 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
798 |
1 |
|
|
T20 |
22 |
|
T111 |
22 |
|
T112 |
8 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1430 |
1 |
|
|
T20 |
49 |
|
T111 |
27 |
|
T112 |
10 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
790 |
1 |
|
|
T20 |
27 |
|
T111 |
20 |
|
T112 |
9 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1364 |
1 |
|
|
T20 |
34 |
|
T111 |
24 |
|
T112 |
11 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
796 |
1 |
|
|
T20 |
22 |
|
T111 |
22 |
|
T112 |
8 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1393 |
1 |
|
|
T20 |
46 |
|
T111 |
25 |
|
T112 |
9 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
790 |
1 |
|
|
T20 |
27 |
|
T111 |
20 |
|
T112 |
9 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1328 |
1 |
|
|
T20 |
33 |
|
T111 |
23 |
|
T112 |
11 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
796 |
1 |
|
|
T20 |
22 |
|
T111 |
22 |
|
T112 |
8 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1361 |
1 |
|
|
T20 |
46 |
|
T111 |
24 |
|
T112 |
9 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
789 |
1 |
|
|
T20 |
27 |
|
T111 |
20 |
|
T112 |
9 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1302 |
1 |
|
|
T20 |
32 |
|
T111 |
21 |
|
T112 |
11 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
796 |
1 |
|
|
T20 |
22 |
|
T111 |
22 |
|
T112 |
8 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1331 |
1 |
|
|
T20 |
44 |
|
T111 |
24 |
|
T112 |
9 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
789 |
1 |
|
|
T20 |
27 |
|
T111 |
20 |
|
T112 |
9 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1258 |
1 |
|
|
T20 |
30 |
|
T111 |
21 |
|
T112 |
11 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
796 |
1 |
|
|
T20 |
22 |
|
T111 |
22 |
|
T112 |
8 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1303 |
1 |
|
|
T20 |
44 |
|
T111 |
23 |
|
T112 |
9 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
789 |
1 |
|
|
T20 |
27 |
|
T111 |
20 |
|
T112 |
9 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1234 |
1 |
|
|
T20 |
30 |
|
T111 |
21 |
|
T112 |
11 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
796 |
1 |
|
|
T20 |
22 |
|
T111 |
22 |
|
T112 |
8 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1274 |
1 |
|
|
T20 |
44 |
|
T111 |
23 |
|
T112 |
9 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57405 |
1 |
|
|
T20 |
1537 |
|
T111 |
1063 |
|
T112 |
1376 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[0] |
auto[1] |
49503 |
1 |
|
|
T20 |
1534 |
|
T111 |
698 |
|
T112 |
173 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59246 |
1 |
|
|
T20 |
1563 |
|
T111 |
2321 |
|
T112 |
604 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[1] |
auto[1] |
50126 |
1 |
|
|
T20 |
959 |
|
T111 |
848 |
|
T112 |
323 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T20 |
27 |
|
T111 |
20 |
|
T112 |
10 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1746 |
1 |
|
|
T20 |
48 |
|
T111 |
35 |
|
T112 |
11 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
794 |
1 |
|
|
T20 |
24 |
|
T111 |
23 |
|
T112 |
9 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1721 |
1 |
|
|
T20 |
51 |
|
T111 |
33 |
|
T112 |
11 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T20 |
27 |
|
T111 |
20 |
|
T112 |
10 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1712 |
1 |
|
|
T20 |
47 |
|
T111 |
35 |
|
T112 |
11 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
794 |
1 |
|
|
T20 |
24 |
|
T111 |
23 |
|
T112 |
9 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1685 |
1 |
|
|
T20 |
50 |
|
T111 |
33 |
|
T112 |
11 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T20 |
27 |
|
T111 |
20 |
|
T112 |
10 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1679 |
1 |
|
|
T20 |
46 |
|
T111 |
35 |
|
T112 |
11 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
792 |
1 |
|
|
T20 |
24 |
|
T111 |
23 |
|
T112 |
9 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1657 |
1 |
|
|
T20 |
50 |
|
T111 |
33 |
|
T112 |
11 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T20 |
27 |
|
T111 |
20 |
|
T112 |
10 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1635 |
1 |
|
|
T20 |
45 |
|
T111 |
35 |
|
T112 |
11 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
792 |
1 |
|
|
T20 |
24 |
|
T111 |
23 |
|
T112 |
9 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1626 |
1 |
|
|
T20 |
50 |
|
T111 |
33 |
|
T112 |
11 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
766 |
1 |
|
|
T20 |
27 |
|
T111 |
20 |
|
T112 |
10 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1609 |
1 |
|
|
T20 |
44 |
|
T111 |
34 |
|
T112 |
11 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
789 |
1 |
|
|
T20 |
23 |
|
T111 |
23 |
|
T112 |
9 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1597 |
1 |
|
|
T20 |
49 |
|
T111 |
33 |
|
T112 |
11 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
766 |
1 |
|
|
T20 |
27 |
|
T111 |
20 |
|
T112 |
10 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1582 |
1 |
|
|
T20 |
44 |
|
T111 |
33 |
|
T112 |
11 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
789 |
1 |
|
|
T20 |
23 |
|
T111 |
23 |
|
T112 |
9 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1563 |
1 |
|
|
T20 |
47 |
|
T111 |
33 |
|
T112 |
11 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T20 |
27 |
|
T111 |
20 |
|
T112 |
9 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1552 |
1 |
|
|
T20 |
43 |
|
T111 |
33 |
|
T112 |
12 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
787 |
1 |
|
|
T20 |
23 |
|
T111 |
23 |
|
T112 |
9 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1531 |
1 |
|
|
T20 |
47 |
|
T111 |
31 |
|
T112 |
11 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T20 |
27 |
|
T111 |
20 |
|
T112 |
9 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1512 |
1 |
|
|
T20 |
43 |
|
T111 |
32 |
|
T112 |
11 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
787 |
1 |
|
|
T20 |
23 |
|
T111 |
23 |
|
T112 |
9 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1511 |
1 |
|
|
T20 |
47 |
|
T111 |
30 |
|
T112 |
10 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T20 |
27 |
|
T111 |
20 |
|
T112 |
9 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1479 |
1 |
|
|
T20 |
42 |
|
T111 |
31 |
|
T112 |
11 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
785 |
1 |
|
|
T20 |
23 |
|
T111 |
23 |
|
T112 |
9 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1476 |
1 |
|
|
T20 |
46 |
|
T111 |
28 |
|
T112 |
10 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T20 |
27 |
|
T111 |
20 |
|
T112 |
9 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1443 |
1 |
|
|
T20 |
41 |
|
T111 |
30 |
|
T112 |
11 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
785 |
1 |
|
|
T20 |
23 |
|
T111 |
23 |
|
T112 |
9 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1443 |
1 |
|
|
T20 |
45 |
|
T111 |
27 |
|
T112 |
10 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T20 |
27 |
|
T111 |
20 |
|
T112 |
9 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1404 |
1 |
|
|
T20 |
40 |
|
T111 |
29 |
|
T112 |
11 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
783 |
1 |
|
|
T20 |
23 |
|
T111 |
23 |
|
T112 |
9 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1407 |
1 |
|
|
T20 |
44 |
|
T111 |
27 |
|
T112 |
10 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T20 |
27 |
|
T111 |
20 |
|
T112 |
9 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1364 |
1 |
|
|
T20 |
39 |
|
T111 |
28 |
|
T112 |
11 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
783 |
1 |
|
|
T20 |
23 |
|
T111 |
23 |
|
T112 |
9 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1377 |
1 |
|
|
T20 |
42 |
|
T111 |
26 |
|
T112 |
10 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T20 |
27 |
|
T111 |
20 |
|
T112 |
9 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1328 |
1 |
|
|
T20 |
38 |
|
T111 |
27 |
|
T112 |
11 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
783 |
1 |
|
|
T20 |
23 |
|
T111 |
23 |
|
T112 |
9 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1339 |
1 |
|
|
T20 |
40 |
|
T111 |
26 |
|
T112 |
10 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T20 |
27 |
|
T111 |
20 |
|
T112 |
9 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1291 |
1 |
|
|
T20 |
37 |
|
T111 |
27 |
|
T112 |
9 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
783 |
1 |
|
|
T20 |
23 |
|
T111 |
23 |
|
T112 |
9 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1313 |
1 |
|
|
T20 |
39 |
|
T111 |
26 |
|
T112 |
10 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T20 |
27 |
|
T111 |
20 |
|
T112 |
9 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1264 |
1 |
|
|
T20 |
36 |
|
T111 |
26 |
|
T112 |
8 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
783 |
1 |
|
|
T20 |
23 |
|
T111 |
23 |
|
T112 |
9 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1278 |
1 |
|
|
T20 |
37 |
|
T111 |
25 |
|
T112 |
10 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[0] |
auto[0] |
59419 |
1 |
|
|
T20 |
1659 |
|
T111 |
2018 |
|
T112 |
604 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48794 |
1 |
|
|
T20 |
1639 |
|
T111 |
1048 |
|
T112 |
1278 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[1] |
auto[0] |
60583 |
1 |
|
|
T20 |
1234 |
|
T111 |
875 |
|
T112 |
363 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47917 |
1 |
|
|
T20 |
1038 |
|
T111 |
836 |
|
T112 |
203 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
766 |
1 |
|
|
T20 |
25 |
|
T111 |
15 |
|
T112 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1758 |
1 |
|
|
T20 |
54 |
|
T111 |
49 |
|
T112 |
14 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T20 |
21 |
|
T111 |
14 |
|
T112 |
6 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1776 |
1 |
|
|
T20 |
58 |
|
T111 |
50 |
|
T112 |
17 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
766 |
1 |
|
|
T20 |
25 |
|
T111 |
15 |
|
T112 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1720 |
1 |
|
|
T20 |
53 |
|
T111 |
49 |
|
T112 |
14 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T20 |
21 |
|
T111 |
14 |
|
T112 |
6 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1751 |
1 |
|
|
T20 |
54 |
|
T111 |
49 |
|
T112 |
16 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
766 |
1 |
|
|
T20 |
25 |
|
T111 |
15 |
|
T112 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1669 |
1 |
|
|
T20 |
52 |
|
T111 |
48 |
|
T112 |
13 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T20 |
21 |
|
T111 |
14 |
|
T112 |
6 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1711 |
1 |
|
|
T20 |
53 |
|
T111 |
47 |
|
T112 |
15 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
766 |
1 |
|
|
T20 |
25 |
|
T111 |
15 |
|
T112 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1634 |
1 |
|
|
T20 |
50 |
|
T111 |
48 |
|
T112 |
13 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T20 |
21 |
|
T111 |
14 |
|
T112 |
6 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1677 |
1 |
|
|
T20 |
52 |
|
T111 |
46 |
|
T112 |
15 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
764 |
1 |
|
|
T20 |
25 |
|
T111 |
15 |
|
T112 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1593 |
1 |
|
|
T20 |
47 |
|
T111 |
46 |
|
T112 |
12 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T20 |
20 |
|
T111 |
14 |
|
T112 |
6 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1639 |
1 |
|
|
T20 |
53 |
|
T111 |
44 |
|
T112 |
15 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
764 |
1 |
|
|
T20 |
25 |
|
T111 |
15 |
|
T112 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1562 |
1 |
|
|
T20 |
47 |
|
T111 |
45 |
|
T112 |
12 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T20 |
20 |
|
T111 |
14 |
|
T112 |
6 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1608 |
1 |
|
|
T20 |
51 |
|
T111 |
43 |
|
T112 |
15 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
757 |
1 |
|
|
T20 |
25 |
|
T111 |
15 |
|
T112 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1540 |
1 |
|
|
T20 |
46 |
|
T111 |
45 |
|
T112 |
12 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T20 |
20 |
|
T111 |
13 |
|
T112 |
6 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1576 |
1 |
|
|
T20 |
51 |
|
T111 |
43 |
|
T112 |
14 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
757 |
1 |
|
|
T20 |
25 |
|
T111 |
15 |
|
T112 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1497 |
1 |
|
|
T20 |
46 |
|
T111 |
44 |
|
T112 |
12 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T20 |
20 |
|
T111 |
13 |
|
T112 |
6 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1536 |
1 |
|
|
T20 |
50 |
|
T111 |
42 |
|
T112 |
13 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T20 |
25 |
|
T111 |
15 |
|
T112 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1457 |
1 |
|
|
T20 |
45 |
|
T111 |
44 |
|
T112 |
12 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T20 |
20 |
|
T111 |
13 |
|
T112 |
6 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1489 |
1 |
|
|
T20 |
48 |
|
T111 |
41 |
|
T112 |
13 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T20 |
25 |
|
T111 |
15 |
|
T112 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1424 |
1 |
|
|
T20 |
44 |
|
T111 |
44 |
|
T112 |
12 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T20 |
20 |
|
T111 |
13 |
|
T112 |
6 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1452 |
1 |
|
|
T20 |
46 |
|
T111 |
39 |
|
T112 |
13 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T20 |
25 |
|
T111 |
15 |
|
T112 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1388 |
1 |
|
|
T20 |
43 |
|
T111 |
42 |
|
T112 |
12 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T20 |
20 |
|
T111 |
13 |
|
T112 |
6 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1406 |
1 |
|
|
T20 |
45 |
|
T111 |
39 |
|
T112 |
13 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T20 |
25 |
|
T111 |
15 |
|
T112 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1364 |
1 |
|
|
T20 |
43 |
|
T111 |
42 |
|
T112 |
12 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T20 |
20 |
|
T111 |
13 |
|
T112 |
6 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1376 |
1 |
|
|
T20 |
44 |
|
T111 |
36 |
|
T112 |
11 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T20 |
25 |
|
T111 |
15 |
|
T112 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1333 |
1 |
|
|
T20 |
42 |
|
T111 |
41 |
|
T112 |
12 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T20 |
20 |
|
T111 |
13 |
|
T112 |
6 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1336 |
1 |
|
|
T20 |
41 |
|
T111 |
36 |
|
T112 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T20 |
25 |
|
T111 |
15 |
|
T112 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1299 |
1 |
|
|
T20 |
41 |
|
T111 |
39 |
|
T112 |
12 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T20 |
20 |
|
T111 |
13 |
|
T112 |
6 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1304 |
1 |
|
|
T20 |
38 |
|
T111 |
34 |
|
T112 |
8 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T20 |
25 |
|
T111 |
15 |
|
T112 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1268 |
1 |
|
|
T20 |
40 |
|
T111 |
38 |
|
T112 |
12 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T20 |
20 |
|
T111 |
13 |
|
T112 |
6 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1270 |
1 |
|
|
T20 |
38 |
|
T111 |
33 |
|
T112 |
8 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[0] |
auto[0] |
63649 |
1 |
|
|
T20 |
2129 |
|
T111 |
2143 |
|
T112 |
1402 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[0] |
auto[1] |
41219 |
1 |
|
|
T20 |
1068 |
|
T111 |
736 |
|
T112 |
295 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56247 |
1 |
|
|
T20 |
1697 |
|
T111 |
1366 |
|
T112 |
512 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[1] |
auto[1] |
53741 |
1 |
|
|
T20 |
936 |
|
T111 |
660 |
|
T112 |
300 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T20 |
17 |
|
T111 |
24 |
|
T112 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1834 |
1 |
|
|
T20 |
52 |
|
T111 |
33 |
|
T112 |
14 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
774 |
1 |
|
|
T20 |
24 |
|
T111 |
25 |
|
T112 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1821 |
1 |
|
|
T20 |
45 |
|
T111 |
32 |
|
T112 |
13 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T20 |
17 |
|
T111 |
24 |
|
T112 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1795 |
1 |
|
|
T20 |
52 |
|
T111 |
32 |
|
T112 |
14 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
774 |
1 |
|
|
T20 |
24 |
|
T111 |
25 |
|
T112 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1771 |
1 |
|
|
T20 |
42 |
|
T111 |
32 |
|
T112 |
13 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T20 |
17 |
|
T111 |
24 |
|
T112 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1763 |
1 |
|
|
T20 |
51 |
|
T111 |
31 |
|
T112 |
14 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
772 |
1 |
|
|
T20 |
24 |
|
T111 |
25 |
|
T112 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1744 |
1 |
|
|
T20 |
41 |
|
T111 |
31 |
|
T112 |
13 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T20 |
17 |
|
T111 |
24 |
|
T112 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1724 |
1 |
|
|
T20 |
51 |
|
T111 |
31 |
|
T112 |
14 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
772 |
1 |
|
|
T20 |
24 |
|
T111 |
25 |
|
T112 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1714 |
1 |
|
|
T20 |
40 |
|
T111 |
31 |
|
T112 |
13 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T20 |
17 |
|
T111 |
24 |
|
T112 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1699 |
1 |
|
|
T20 |
51 |
|
T111 |
31 |
|
T112 |
14 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
768 |
1 |
|
|
T20 |
23 |
|
T111 |
25 |
|
T112 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1672 |
1 |
|
|
T20 |
41 |
|
T111 |
30 |
|
T112 |
13 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T20 |
17 |
|
T111 |
24 |
|
T112 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1666 |
1 |
|
|
T20 |
49 |
|
T111 |
31 |
|
T112 |
14 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
768 |
1 |
|
|
T20 |
23 |
|
T111 |
25 |
|
T112 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1627 |
1 |
|
|
T20 |
40 |
|
T111 |
30 |
|
T112 |
11 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T20 |
17 |
|
T111 |
24 |
|
T112 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1633 |
1 |
|
|
T20 |
46 |
|
T111 |
31 |
|
T112 |
14 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T20 |
23 |
|
T111 |
24 |
|
T112 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1597 |
1 |
|
|
T20 |
39 |
|
T111 |
29 |
|
T112 |
11 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T20 |
17 |
|
T111 |
24 |
|
T112 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1595 |
1 |
|
|
T20 |
45 |
|
T111 |
30 |
|
T112 |
13 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T20 |
23 |
|
T111 |
24 |
|
T112 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1567 |
1 |
|
|
T20 |
36 |
|
T111 |
27 |
|
T112 |
11 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T20 |
17 |
|
T111 |
24 |
|
T112 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1552 |
1 |
|
|
T20 |
43 |
|
T111 |
30 |
|
T112 |
12 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T20 |
23 |
|
T111 |
24 |
|
T112 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1524 |
1 |
|
|
T20 |
35 |
|
T111 |
26 |
|
T112 |
10 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T20 |
17 |
|
T111 |
24 |
|
T112 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1507 |
1 |
|
|
T20 |
42 |
|
T111 |
30 |
|
T112 |
12 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T20 |
23 |
|
T111 |
24 |
|
T112 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1487 |
1 |
|
|
T20 |
34 |
|
T111 |
26 |
|
T112 |
8 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T20 |
17 |
|
T111 |
24 |
|
T112 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1470 |
1 |
|
|
T20 |
42 |
|
T111 |
29 |
|
T112 |
12 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T20 |
23 |
|
T111 |
24 |
|
T112 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1444 |
1 |
|
|
T20 |
34 |
|
T111 |
24 |
|
T112 |
8 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T20 |
17 |
|
T111 |
24 |
|
T112 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1433 |
1 |
|
|
T20 |
41 |
|
T111 |
29 |
|
T112 |
12 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T20 |
23 |
|
T111 |
24 |
|
T112 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1404 |
1 |
|
|
T20 |
32 |
|
T111 |
22 |
|
T112 |
8 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T20 |
17 |
|
T111 |
24 |
|
T112 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1388 |
1 |
|
|
T20 |
40 |
|
T111 |
29 |
|
T112 |
12 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T20 |
23 |
|
T111 |
24 |
|
T112 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1370 |
1 |
|
|
T20 |
30 |
|
T111 |
21 |
|
T112 |
8 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T20 |
17 |
|
T111 |
24 |
|
T112 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1350 |
1 |
|
|
T20 |
38 |
|
T111 |
29 |
|
T112 |
12 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T20 |
23 |
|
T111 |
24 |
|
T112 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1339 |
1 |
|
|
T20 |
30 |
|
T111 |
21 |
|
T112 |
8 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T20 |
17 |
|
T111 |
24 |
|
T112 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1315 |
1 |
|
|
T20 |
38 |
|
T111 |
29 |
|
T112 |
12 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T20 |
23 |
|
T111 |
24 |
|
T112 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1300 |
1 |
|
|
T20 |
30 |
|
T111 |
21 |
|
T112 |
8 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[0] |
auto[0] |
62696 |
1 |
|
|
T20 |
1722 |
|
T111 |
1099 |
|
T112 |
666 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[0] |
auto[1] |
51237 |
1 |
|
|
T20 |
938 |
|
T111 |
1962 |
|
T112 |
312 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[1] |
auto[0] |
55840 |
1 |
|
|
T20 |
1484 |
|
T111 |
962 |
|
T112 |
372 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46511 |
1 |
|
|
T20 |
1560 |
|
T111 |
937 |
|
T112 |
1182 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
827 |
1 |
|
|
T20 |
20 |
|
T111 |
15 |
|
T112 |
6 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1701 |
1 |
|
|
T20 |
52 |
|
T111 |
40 |
|
T112 |
14 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
792 |
1 |
|
|
T20 |
22 |
|
T111 |
13 |
|
T112 |
7 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1728 |
1 |
|
|
T20 |
51 |
|
T111 |
42 |
|
T112 |
13 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
827 |
1 |
|
|
T20 |
20 |
|
T111 |
15 |
|
T112 |
6 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1661 |
1 |
|
|
T20 |
50 |
|
T111 |
40 |
|
T112 |
13 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
792 |
1 |
|
|
T20 |
22 |
|
T111 |
13 |
|
T112 |
7 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1692 |
1 |
|
|
T20 |
50 |
|
T111 |
41 |
|
T112 |
13 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
827 |
1 |
|
|
T20 |
20 |
|
T111 |
15 |
|
T112 |
6 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1626 |
1 |
|
|
T20 |
50 |
|
T111 |
39 |
|
T112 |
12 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
790 |
1 |
|
|
T20 |
22 |
|
T111 |
13 |
|
T112 |
7 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1664 |
1 |
|
|
T20 |
49 |
|
T111 |
41 |
|
T112 |
13 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
827 |
1 |
|
|
T20 |
20 |
|
T111 |
15 |
|
T112 |
6 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1583 |
1 |
|
|
T20 |
50 |
|
T111 |
39 |
|
T112 |
12 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
790 |
1 |
|
|
T20 |
22 |
|
T111 |
13 |
|
T112 |
7 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1632 |
1 |
|
|
T20 |
48 |
|
T111 |
41 |
|
T112 |
13 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
824 |
1 |
|
|
T20 |
20 |
|
T111 |
15 |
|
T112 |
6 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1551 |
1 |
|
|
T20 |
49 |
|
T111 |
38 |
|
T112 |
12 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
788 |
1 |
|
|
T20 |
22 |
|
T111 |
13 |
|
T112 |
7 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1613 |
1 |
|
|
T20 |
47 |
|
T111 |
41 |
|
T112 |
13 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
824 |
1 |
|
|
T20 |
20 |
|
T111 |
15 |
|
T112 |
6 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1513 |
1 |
|
|
T20 |
48 |
|
T111 |
38 |
|
T112 |
12 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
788 |
1 |
|
|
T20 |
22 |
|
T111 |
13 |
|
T112 |
7 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1573 |
1 |
|
|
T20 |
47 |
|
T111 |
41 |
|
T112 |
13 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
821 |
1 |
|
|
T20 |
20 |
|
T111 |
15 |
|
T112 |
6 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1476 |
1 |
|
|
T20 |
47 |
|
T111 |
36 |
|
T112 |
12 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
784 |
1 |
|
|
T20 |
22 |
|
T111 |
13 |
|
T112 |
7 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1535 |
1 |
|
|
T20 |
44 |
|
T111 |
41 |
|
T112 |
12 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
821 |
1 |
|
|
T20 |
20 |
|
T111 |
15 |
|
T112 |
6 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1446 |
1 |
|
|
T20 |
46 |
|
T111 |
36 |
|
T112 |
12 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
784 |
1 |
|
|
T20 |
22 |
|
T111 |
13 |
|
T112 |
7 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1499 |
1 |
|
|
T20 |
44 |
|
T111 |
41 |
|
T112 |
12 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
818 |
1 |
|
|
T20 |
20 |
|
T111 |
15 |
|
T112 |
6 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1407 |
1 |
|
|
T20 |
44 |
|
T111 |
36 |
|
T112 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
783 |
1 |
|
|
T20 |
22 |
|
T111 |
13 |
|
T112 |
7 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1461 |
1 |
|
|
T20 |
43 |
|
T111 |
36 |
|
T112 |
12 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
818 |
1 |
|
|
T20 |
20 |
|
T111 |
15 |
|
T112 |
6 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1377 |
1 |
|
|
T20 |
43 |
|
T111 |
36 |
|
T112 |
10 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
783 |
1 |
|
|
T20 |
22 |
|
T111 |
13 |
|
T112 |
7 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1428 |
1 |
|
|
T20 |
42 |
|
T111 |
35 |
|
T112 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
815 |
1 |
|
|
T20 |
20 |
|
T111 |
15 |
|
T112 |
5 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1349 |
1 |
|
|
T20 |
42 |
|
T111 |
35 |
|
T112 |
10 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
780 |
1 |
|
|
T20 |
22 |
|
T111 |
13 |
|
T112 |
7 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1394 |
1 |
|
|
T20 |
41 |
|
T111 |
35 |
|
T112 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
815 |
1 |
|
|
T20 |
20 |
|
T111 |
15 |
|
T112 |
5 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1323 |
1 |
|
|
T20 |
40 |
|
T111 |
35 |
|
T112 |
10 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
780 |
1 |
|
|
T20 |
22 |
|
T111 |
13 |
|
T112 |
7 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1368 |
1 |
|
|
T20 |
41 |
|
T111 |
34 |
|
T112 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
814 |
1 |
|
|
T20 |
20 |
|
T111 |
15 |
|
T112 |
5 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1283 |
1 |
|
|
T20 |
37 |
|
T111 |
33 |
|
T112 |
10 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
779 |
1 |
|
|
T20 |
22 |
|
T111 |
13 |
|
T112 |
7 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1337 |
1 |
|
|
T20 |
40 |
|
T111 |
33 |
|
T112 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
814 |
1 |
|
|
T20 |
20 |
|
T111 |
15 |
|
T112 |
5 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1253 |
1 |
|
|
T20 |
36 |
|
T111 |
33 |
|
T112 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
779 |
1 |
|
|
T20 |
22 |
|
T111 |
13 |
|
T112 |
7 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1302 |
1 |
|
|
T20 |
37 |
|
T111 |
30 |
|
T112 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
814 |
1 |
|
|
T20 |
20 |
|
T111 |
15 |
|
T112 |
5 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1227 |
1 |
|
|
T20 |
35 |
|
T111 |
33 |
|
T112 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
779 |
1 |
|
|
T20 |
22 |
|
T111 |
13 |
|
T112 |
7 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1267 |
1 |
|
|
T20 |
37 |
|
T111 |
30 |
|
T112 |
11 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58269 |
1 |
|
|
T20 |
1188 |
|
T111 |
1008 |
|
T112 |
568 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45289 |
1 |
|
|
T20 |
1037 |
|
T111 |
1887 |
|
T112 |
294 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[1] |
auto[0] |
64235 |
1 |
|
|
T20 |
1993 |
|
T111 |
758 |
|
T112 |
441 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[1] |
auto[1] |
49171 |
1 |
|
|
T20 |
1313 |
|
T111 |
1159 |
|
T112 |
1115 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
785 |
1 |
|
|
T20 |
18 |
|
T111 |
16 |
|
T112 |
7 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1704 |
1 |
|
|
T20 |
61 |
|
T111 |
47 |
|
T112 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
774 |
1 |
|
|
T20 |
19 |
|
T111 |
12 |
|
T112 |
8 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1721 |
1 |
|
|
T20 |
61 |
|
T111 |
51 |
|
T112 |
17 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
785 |
1 |
|
|
T20 |
18 |
|
T111 |
16 |
|
T112 |
7 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1667 |
1 |
|
|
T20 |
60 |
|
T111 |
45 |
|
T112 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
774 |
1 |
|
|
T20 |
19 |
|
T111 |
12 |
|
T112 |
8 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1683 |
1 |
|
|
T20 |
60 |
|
T111 |
50 |
|
T112 |
16 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
785 |
1 |
|
|
T20 |
18 |
|
T111 |
16 |
|
T112 |
7 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1633 |
1 |
|
|
T20 |
59 |
|
T111 |
45 |
|
T112 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
771 |
1 |
|
|
T20 |
19 |
|
T111 |
12 |
|
T112 |
8 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1656 |
1 |
|
|
T20 |
60 |
|
T111 |
49 |
|
T112 |
16 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
785 |
1 |
|
|
T20 |
18 |
|
T111 |
16 |
|
T112 |
7 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1601 |
1 |
|
|
T20 |
59 |
|
T111 |
42 |
|
T112 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
771 |
1 |
|
|
T20 |
19 |
|
T111 |
12 |
|
T112 |
8 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1621 |
1 |
|
|
T20 |
58 |
|
T111 |
49 |
|
T112 |
16 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
782 |
1 |
|
|
T20 |
18 |
|
T111 |
16 |
|
T112 |
7 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1564 |
1 |
|
|
T20 |
56 |
|
T111 |
40 |
|
T112 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
770 |
1 |
|
|
T20 |
19 |
|
T111 |
12 |
|
T112 |
8 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1596 |
1 |
|
|
T20 |
56 |
|
T111 |
49 |
|
T112 |
16 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
782 |
1 |
|
|
T20 |
18 |
|
T111 |
16 |
|
T112 |
7 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1535 |
1 |
|
|
T20 |
56 |
|
T111 |
39 |
|
T112 |
17 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
770 |
1 |
|
|
T20 |
19 |
|
T111 |
12 |
|
T112 |
8 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1565 |
1 |
|
|
T20 |
55 |
|
T111 |
48 |
|
T112 |
14 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
777 |
1 |
|
|
T20 |
18 |
|
T111 |
16 |
|
T112 |
7 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1516 |
1 |
|
|
T20 |
55 |
|
T111 |
38 |
|
T112 |
17 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T20 |
19 |
|
T111 |
12 |
|
T112 |
8 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1536 |
1 |
|
|
T20 |
53 |
|
T111 |
47 |
|
T112 |
13 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
777 |
1 |
|
|
T20 |
18 |
|
T111 |
16 |
|
T112 |
7 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1478 |
1 |
|
|
T20 |
54 |
|
T111 |
38 |
|
T112 |
17 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T20 |
19 |
|
T111 |
12 |
|
T112 |
8 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1504 |
1 |
|
|
T20 |
52 |
|
T111 |
45 |
|
T112 |
12 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
772 |
1 |
|
|
T20 |
18 |
|
T111 |
16 |
|
T112 |
7 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1443 |
1 |
|
|
T20 |
50 |
|
T111 |
36 |
|
T112 |
17 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T20 |
19 |
|
T111 |
12 |
|
T112 |
8 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1467 |
1 |
|
|
T20 |
51 |
|
T111 |
43 |
|
T112 |
11 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
772 |
1 |
|
|
T20 |
18 |
|
T111 |
16 |
|
T112 |
7 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1406 |
1 |
|
|
T20 |
50 |
|
T111 |
35 |
|
T112 |
17 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T20 |
19 |
|
T111 |
12 |
|
T112 |
8 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1438 |
1 |
|
|
T20 |
50 |
|
T111 |
43 |
|
T112 |
11 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
771 |
1 |
|
|
T20 |
18 |
|
T111 |
16 |
|
T112 |
6 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1374 |
1 |
|
|
T20 |
49 |
|
T111 |
35 |
|
T112 |
17 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T20 |
19 |
|
T111 |
12 |
|
T112 |
8 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1403 |
1 |
|
|
T20 |
50 |
|
T111 |
43 |
|
T112 |
10 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
771 |
1 |
|
|
T20 |
18 |
|
T111 |
16 |
|
T112 |
6 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1341 |
1 |
|
|
T20 |
46 |
|
T111 |
35 |
|
T112 |
17 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T20 |
19 |
|
T111 |
12 |
|
T112 |
8 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1361 |
1 |
|
|
T20 |
48 |
|
T111 |
41 |
|
T112 |
8 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T20 |
18 |
|
T111 |
16 |
|
T112 |
6 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1312 |
1 |
|
|
T20 |
45 |
|
T111 |
35 |
|
T112 |
16 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T20 |
19 |
|
T111 |
12 |
|
T112 |
8 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1322 |
1 |
|
|
T20 |
47 |
|
T111 |
41 |
|
T112 |
5 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T20 |
18 |
|
T111 |
16 |
|
T112 |
6 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1278 |
1 |
|
|
T20 |
44 |
|
T111 |
35 |
|
T112 |
16 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T20 |
19 |
|
T111 |
12 |
|
T112 |
8 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1291 |
1 |
|
|
T20 |
45 |
|
T111 |
40 |
|
T112 |
5 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T20 |
18 |
|
T111 |
16 |
|
T112 |
6 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1248 |
1 |
|
|
T20 |
43 |
|
T111 |
34 |
|
T112 |
16 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T20 |
19 |
|
T111 |
12 |
|
T112 |
8 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1255 |
1 |
|
|
T20 |
45 |
|
T111 |
39 |
|
T112 |
5 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[0] |
auto[0] |
60919 |
1 |
|
|
T20 |
2325 |
|
T111 |
1211 |
|
T112 |
674 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[0] |
auto[1] |
43838 |
1 |
|
|
T20 |
876 |
|
T111 |
980 |
|
T112 |
268 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[1] |
auto[0] |
61341 |
1 |
|
|
T20 |
1587 |
|
T111 |
904 |
|
T112 |
325 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[1] |
auto[1] |
49927 |
1 |
|
|
T20 |
847 |
|
T111 |
1913 |
|
T112 |
1173 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
787 |
1 |
|
|
T20 |
32 |
|
T111 |
11 |
|
T112 |
9 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1738 |
1 |
|
|
T20 |
42 |
|
T111 |
43 |
|
T112 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
816 |
1 |
|
|
T20 |
29 |
|
T111 |
18 |
|
T112 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1712 |
1 |
|
|
T20 |
45 |
|
T111 |
37 |
|
T112 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
787 |
1 |
|
|
T20 |
32 |
|
T111 |
11 |
|
T112 |
9 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1695 |
1 |
|
|
T20 |
40 |
|
T111 |
42 |
|
T112 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
816 |
1 |
|
|
T20 |
29 |
|
T111 |
18 |
|
T112 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1684 |
1 |
|
|
T20 |
45 |
|
T111 |
37 |
|
T112 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
787 |
1 |
|
|
T20 |
32 |
|
T111 |
11 |
|
T112 |
9 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1662 |
1 |
|
|
T20 |
39 |
|
T111 |
42 |
|
T112 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
814 |
1 |
|
|
T20 |
29 |
|
T111 |
18 |
|
T112 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1653 |
1 |
|
|
T20 |
44 |
|
T111 |
36 |
|
T112 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
787 |
1 |
|
|
T20 |
32 |
|
T111 |
11 |
|
T112 |
9 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1628 |
1 |
|
|
T20 |
38 |
|
T111 |
41 |
|
T112 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
814 |
1 |
|
|
T20 |
29 |
|
T111 |
18 |
|
T112 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1619 |
1 |
|
|
T20 |
43 |
|
T111 |
36 |
|
T112 |
12 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
783 |
1 |
|
|
T20 |
32 |
|
T111 |
11 |
|
T112 |
9 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1594 |
1 |
|
|
T20 |
38 |
|
T111 |
38 |
|
T112 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
812 |
1 |
|
|
T20 |
28 |
|
T111 |
18 |
|
T112 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1590 |
1 |
|
|
T20 |
41 |
|
T111 |
36 |
|
T112 |
12 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
783 |
1 |
|
|
T20 |
32 |
|
T111 |
11 |
|
T112 |
9 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1564 |
1 |
|
|
T20 |
38 |
|
T111 |
38 |
|
T112 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
812 |
1 |
|
|
T20 |
28 |
|
T111 |
18 |
|
T112 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1567 |
1 |
|
|
T20 |
40 |
|
T111 |
36 |
|
T112 |
11 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
779 |
1 |
|
|
T20 |
32 |
|
T111 |
11 |
|
T112 |
9 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1525 |
1 |
|
|
T20 |
38 |
|
T111 |
37 |
|
T112 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
807 |
1 |
|
|
T20 |
28 |
|
T111 |
18 |
|
T112 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1534 |
1 |
|
|
T20 |
40 |
|
T111 |
34 |
|
T112 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
779 |
1 |
|
|
T20 |
32 |
|
T111 |
11 |
|
T112 |
9 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1500 |
1 |
|
|
T20 |
38 |
|
T111 |
36 |
|
T112 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
807 |
1 |
|
|
T20 |
28 |
|
T111 |
18 |
|
T112 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1501 |
1 |
|
|
T20 |
40 |
|
T111 |
32 |
|
T112 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
777 |
1 |
|
|
T20 |
32 |
|
T111 |
11 |
|
T112 |
9 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1453 |
1 |
|
|
T20 |
37 |
|
T111 |
34 |
|
T112 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
803 |
1 |
|
|
T20 |
28 |
|
T111 |
18 |
|
T112 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1475 |
1 |
|
|
T20 |
38 |
|
T111 |
31 |
|
T112 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
777 |
1 |
|
|
T20 |
32 |
|
T111 |
11 |
|
T112 |
9 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1415 |
1 |
|
|
T20 |
35 |
|
T111 |
34 |
|
T112 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
803 |
1 |
|
|
T20 |
28 |
|
T111 |
18 |
|
T112 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1441 |
1 |
|
|
T20 |
35 |
|
T111 |
31 |
|
T112 |
9 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
775 |
1 |
|
|
T20 |
32 |
|
T111 |
11 |
|
T112 |
9 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1381 |
1 |
|
|
T20 |
35 |
|
T111 |
34 |
|
T112 |
12 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
799 |
1 |
|
|
T20 |
28 |
|
T111 |
18 |
|
T112 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1412 |
1 |
|
|
T20 |
34 |
|
T111 |
31 |
|
T112 |
9 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
775 |
1 |
|
|
T20 |
32 |
|
T111 |
11 |
|
T112 |
9 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1348 |
1 |
|
|
T20 |
34 |
|
T111 |
34 |
|
T112 |
12 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
799 |
1 |
|
|
T20 |
28 |
|
T111 |
18 |
|
T112 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1384 |
1 |
|
|
T20 |
34 |
|
T111 |
30 |
|
T112 |
8 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
775 |
1 |
|
|
T20 |
32 |
|
T111 |
11 |
|
T112 |
9 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1305 |
1 |
|
|
T20 |
34 |
|
T111 |
34 |
|
T112 |
12 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
799 |
1 |
|
|
T20 |
28 |
|
T111 |
18 |
|
T112 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1354 |
1 |
|
|
T20 |
33 |
|
T111 |
30 |
|
T112 |
8 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
775 |
1 |
|
|
T20 |
32 |
|
T111 |
11 |
|
T112 |
9 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1262 |
1 |
|
|
T20 |
33 |
|
T111 |
33 |
|
T112 |
12 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
799 |
1 |
|
|
T20 |
28 |
|
T111 |
18 |
|
T112 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1313 |
1 |
|
|
T20 |
31 |
|
T111 |
29 |
|
T112 |
8 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
775 |
1 |
|
|
T20 |
32 |
|
T111 |
11 |
|
T112 |
9 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1223 |
1 |
|
|
T20 |
33 |
|
T111 |
31 |
|
T112 |
12 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
799 |
1 |
|
|
T20 |
28 |
|
T111 |
18 |
|
T112 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1273 |
1 |
|
|
T20 |
30 |
|
T111 |
29 |
|
T112 |
8 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[0] |
auto[0] |
62360 |
1 |
|
|
T20 |
1338 |
|
T111 |
2020 |
|
T112 |
661 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45828 |
1 |
|
|
T20 |
1122 |
|
T111 |
780 |
|
T112 |
1228 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[1] |
auto[0] |
58441 |
1 |
|
|
T20 |
1974 |
|
T111 |
1049 |
|
T112 |
325 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48647 |
1 |
|
|
T20 |
1146 |
|
T111 |
1005 |
|
T112 |
285 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
808 |
1 |
|
|
T20 |
19 |
|
T111 |
17 |
|
T112 |
6 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1760 |
1 |
|
|
T20 |
57 |
|
T111 |
43 |
|
T112 |
16 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
789 |
1 |
|
|
T20 |
23 |
|
T111 |
23 |
|
T112 |
5 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1779 |
1 |
|
|
T20 |
54 |
|
T111 |
37 |
|
T112 |
16 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
808 |
1 |
|
|
T20 |
19 |
|
T111 |
17 |
|
T112 |
6 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1725 |
1 |
|
|
T20 |
55 |
|
T111 |
41 |
|
T112 |
16 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
789 |
1 |
|
|
T20 |
23 |
|
T111 |
23 |
|
T112 |
5 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1740 |
1 |
|
|
T20 |
51 |
|
T111 |
36 |
|
T112 |
16 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
808 |
1 |
|
|
T20 |
19 |
|
T111 |
17 |
|
T112 |
6 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1692 |
1 |
|
|
T20 |
55 |
|
T111 |
41 |
|
T112 |
16 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
787 |
1 |
|
|
T20 |
23 |
|
T111 |
23 |
|
T112 |
5 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1714 |
1 |
|
|
T20 |
50 |
|
T111 |
35 |
|
T112 |
16 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
808 |
1 |
|
|
T20 |
19 |
|
T111 |
17 |
|
T112 |
6 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1653 |
1 |
|
|
T20 |
54 |
|
T111 |
40 |
|
T112 |
16 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
787 |
1 |
|
|
T20 |
23 |
|
T111 |
23 |
|
T112 |
5 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1673 |
1 |
|
|
T20 |
49 |
|
T111 |
35 |
|
T112 |
16 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
805 |
1 |
|
|
T20 |
19 |
|
T111 |
17 |
|
T112 |
6 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1627 |
1 |
|
|
T20 |
54 |
|
T111 |
39 |
|
T112 |
15 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
784 |
1 |
|
|
T20 |
23 |
|
T111 |
23 |
|
T112 |
5 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1638 |
1 |
|
|
T20 |
47 |
|
T111 |
35 |
|
T112 |
14 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
805 |
1 |
|
|
T20 |
19 |
|
T111 |
17 |
|
T112 |
6 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1578 |
1 |
|
|
T20 |
53 |
|
T111 |
35 |
|
T112 |
15 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
784 |
1 |
|
|
T20 |
23 |
|
T111 |
23 |
|
T112 |
5 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1596 |
1 |
|
|
T20 |
47 |
|
T111 |
34 |
|
T112 |
12 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
802 |
1 |
|
|
T20 |
19 |
|
T111 |
17 |
|
T112 |
5 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1544 |
1 |
|
|
T20 |
52 |
|
T111 |
35 |
|
T112 |
14 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
779 |
1 |
|
|
T20 |
23 |
|
T111 |
23 |
|
T112 |
5 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1567 |
1 |
|
|
T20 |
47 |
|
T111 |
34 |
|
T112 |
12 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
802 |
1 |
|
|
T20 |
19 |
|
T111 |
17 |
|
T112 |
5 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1502 |
1 |
|
|
T20 |
52 |
|
T111 |
35 |
|
T112 |
14 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
779 |
1 |
|
|
T20 |
23 |
|
T111 |
23 |
|
T112 |
5 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1542 |
1 |
|
|
T20 |
47 |
|
T111 |
34 |
|
T112 |
12 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
800 |
1 |
|
|
T20 |
19 |
|
T111 |
17 |
|
T112 |
5 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1470 |
1 |
|
|
T20 |
52 |
|
T111 |
35 |
|
T112 |
14 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
775 |
1 |
|
|
T20 |
22 |
|
T111 |
23 |
|
T112 |
5 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1514 |
1 |
|
|
T20 |
45 |
|
T111 |
33 |
|
T112 |
12 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
800 |
1 |
|
|
T20 |
19 |
|
T111 |
17 |
|
T112 |
5 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1425 |
1 |
|
|
T20 |
51 |
|
T111 |
35 |
|
T112 |
14 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
775 |
1 |
|
|
T20 |
22 |
|
T111 |
23 |
|
T112 |
5 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1475 |
1 |
|
|
T20 |
45 |
|
T111 |
32 |
|
T112 |
12 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
796 |
1 |
|
|
T20 |
19 |
|
T111 |
17 |
|
T112 |
5 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1384 |
1 |
|
|
T20 |
50 |
|
T111 |
32 |
|
T112 |
14 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
771 |
1 |
|
|
T20 |
22 |
|
T111 |
23 |
|
T112 |
5 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1432 |
1 |
|
|
T20 |
45 |
|
T111 |
32 |
|
T112 |
12 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
796 |
1 |
|
|
T20 |
19 |
|
T111 |
17 |
|
T112 |
5 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1352 |
1 |
|
|
T20 |
50 |
|
T111 |
32 |
|
T112 |
14 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
771 |
1 |
|
|
T20 |
22 |
|
T111 |
23 |
|
T112 |
5 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1402 |
1 |
|
|
T20 |
42 |
|
T111 |
32 |
|
T112 |
12 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
796 |
1 |
|
|
T20 |
19 |
|
T111 |
17 |
|
T112 |
5 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1316 |
1 |
|
|
T20 |
48 |
|
T111 |
32 |
|
T112 |
14 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
771 |
1 |
|
|
T20 |
22 |
|
T111 |
23 |
|
T112 |
5 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1372 |
1 |
|
|
T20 |
41 |
|
T111 |
31 |
|
T112 |
11 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
796 |
1 |
|
|
T20 |
19 |
|
T111 |
17 |
|
T112 |
5 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1273 |
1 |
|
|
T20 |
46 |
|
T111 |
31 |
|
T112 |
14 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
771 |
1 |
|
|
T20 |
22 |
|
T111 |
23 |
|
T112 |
5 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1352 |
1 |
|
|
T20 |
39 |
|
T111 |
31 |
|
T112 |
11 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
796 |
1 |
|
|
T20 |
19 |
|
T111 |
17 |
|
T112 |
5 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1231 |
1 |
|
|
T20 |
45 |
|
T111 |
30 |
|
T112 |
14 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
771 |
1 |
|
|
T20 |
22 |
|
T111 |
23 |
|
T112 |
5 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1317 |
1 |
|
|
T20 |
38 |
|
T111 |
28 |
|
T112 |
11 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[0] |
auto[0] |
64496 |
1 |
|
|
T20 |
1498 |
|
T111 |
1861 |
|
T112 |
235 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46599 |
1 |
|
|
T20 |
1291 |
|
T111 |
1054 |
|
T112 |
349 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[1] |
auto[0] |
64563 |
1 |
|
|
T20 |
1661 |
|
T111 |
1211 |
|
T112 |
1529 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[1] |
auto[1] |
42052 |
1 |
|
|
T20 |
1044 |
|
T111 |
821 |
|
T112 |
328 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
757 |
1 |
|
|
T20 |
23 |
|
T111 |
17 |
|
T112 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1709 |
1 |
|
|
T20 |
55 |
|
T111 |
43 |
|
T112 |
16 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
770 |
1 |
|
|
T20 |
20 |
|
T111 |
14 |
|
T112 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1696 |
1 |
|
|
T20 |
59 |
|
T111 |
46 |
|
T112 |
17 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
757 |
1 |
|
|
T20 |
23 |
|
T111 |
17 |
|
T112 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1679 |
1 |
|
|
T20 |
55 |
|
T111 |
39 |
|
T112 |
16 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
770 |
1 |
|
|
T20 |
20 |
|
T111 |
14 |
|
T112 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1674 |
1 |
|
|
T20 |
57 |
|
T111 |
45 |
|
T112 |
17 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
757 |
1 |
|
|
T20 |
23 |
|
T111 |
17 |
|
T112 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1642 |
1 |
|
|
T20 |
54 |
|
T111 |
37 |
|
T112 |
16 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
769 |
1 |
|
|
T20 |
20 |
|
T111 |
14 |
|
T112 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1636 |
1 |
|
|
T20 |
57 |
|
T111 |
44 |
|
T112 |
16 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
757 |
1 |
|
|
T20 |
23 |
|
T111 |
17 |
|
T112 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1612 |
1 |
|
|
T20 |
53 |
|
T111 |
36 |
|
T112 |
16 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
769 |
1 |
|
|
T20 |
20 |
|
T111 |
14 |
|
T112 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1605 |
1 |
|
|
T20 |
57 |
|
T111 |
40 |
|
T112 |
16 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T20 |
23 |
|
T111 |
17 |
|
T112 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1577 |
1 |
|
|
T20 |
53 |
|
T111 |
36 |
|
T112 |
16 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
768 |
1 |
|
|
T20 |
20 |
|
T111 |
14 |
|
T112 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1575 |
1 |
|
|
T20 |
57 |
|
T111 |
39 |
|
T112 |
16 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T20 |
23 |
|
T111 |
17 |
|
T112 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1541 |
1 |
|
|
T20 |
53 |
|
T111 |
34 |
|
T112 |
15 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
768 |
1 |
|
|
T20 |
20 |
|
T111 |
14 |
|
T112 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1545 |
1 |
|
|
T20 |
56 |
|
T111 |
38 |
|
T112 |
16 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T20 |
23 |
|
T111 |
17 |
|
T112 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1505 |
1 |
|
|
T20 |
51 |
|
T111 |
34 |
|
T112 |
16 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T20 |
20 |
|
T111 |
13 |
|
T112 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1510 |
1 |
|
|
T20 |
54 |
|
T111 |
38 |
|
T112 |
15 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T20 |
23 |
|
T111 |
17 |
|
T112 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1472 |
1 |
|
|
T20 |
50 |
|
T111 |
34 |
|
T112 |
16 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T20 |
20 |
|
T111 |
13 |
|
T112 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1473 |
1 |
|
|
T20 |
51 |
|
T111 |
37 |
|
T112 |
15 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T20 |
23 |
|
T111 |
17 |
|
T112 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1442 |
1 |
|
|
T20 |
49 |
|
T111 |
34 |
|
T112 |
16 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T20 |
20 |
|
T111 |
13 |
|
T112 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1438 |
1 |
|
|
T20 |
51 |
|
T111 |
36 |
|
T112 |
15 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T20 |
23 |
|
T111 |
17 |
|
T112 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1411 |
1 |
|
|
T20 |
49 |
|
T111 |
33 |
|
T112 |
15 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T20 |
20 |
|
T111 |
13 |
|
T112 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1407 |
1 |
|
|
T20 |
50 |
|
T111 |
36 |
|
T112 |
15 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T20 |
23 |
|
T111 |
17 |
|
T112 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1374 |
1 |
|
|
T20 |
49 |
|
T111 |
33 |
|
T112 |
14 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T20 |
20 |
|
T111 |
13 |
|
T112 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1373 |
1 |
|
|
T20 |
48 |
|
T111 |
36 |
|
T112 |
13 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T20 |
23 |
|
T111 |
17 |
|
T112 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1347 |
1 |
|
|
T20 |
49 |
|
T111 |
33 |
|
T112 |
14 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T20 |
20 |
|
T111 |
13 |
|
T112 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1348 |
1 |
|
|
T20 |
47 |
|
T111 |
34 |
|
T112 |
12 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T20 |
23 |
|
T111 |
17 |
|
T112 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1309 |
1 |
|
|
T20 |
45 |
|
T111 |
32 |
|
T112 |
14 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T20 |
20 |
|
T111 |
13 |
|
T112 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1319 |
1 |
|
|
T20 |
44 |
|
T111 |
34 |
|
T112 |
12 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T20 |
23 |
|
T111 |
17 |
|
T112 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1270 |
1 |
|
|
T20 |
43 |
|
T111 |
30 |
|
T112 |
13 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T20 |
20 |
|
T111 |
13 |
|
T112 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1292 |
1 |
|
|
T20 |
44 |
|
T111 |
33 |
|
T112 |
12 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T20 |
23 |
|
T111 |
17 |
|
T112 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1230 |
1 |
|
|
T20 |
42 |
|
T111 |
29 |
|
T112 |
11 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T20 |
20 |
|
T111 |
13 |
|
T112 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1261 |
1 |
|
|
T20 |
43 |
|
T111 |
33 |
|
T112 |
12 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[0] |
auto[0] |
60046 |
1 |
|
|
T20 |
1508 |
|
T111 |
1799 |
|
T112 |
1420 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[0] |
auto[1] |
51412 |
1 |
|
|
T20 |
1738 |
|
T111 |
736 |
|
T112 |
358 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57631 |
1 |
|
|
T20 |
1289 |
|
T111 |
1222 |
|
T112 |
436 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46283 |
1 |
|
|
T20 |
1137 |
|
T111 |
947 |
|
T112 |
313 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T20 |
23 |
|
T111 |
25 |
|
T112 |
6 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1824 |
1 |
|
|
T20 |
50 |
|
T111 |
41 |
|
T112 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T20 |
26 |
|
T111 |
22 |
|
T112 |
6 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1814 |
1 |
|
|
T20 |
47 |
|
T111 |
44 |
|
T112 |
14 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T20 |
23 |
|
T111 |
25 |
|
T112 |
6 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1793 |
1 |
|
|
T20 |
49 |
|
T111 |
40 |
|
T112 |
14 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T20 |
26 |
|
T111 |
22 |
|
T112 |
6 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1784 |
1 |
|
|
T20 |
46 |
|
T111 |
43 |
|
T112 |
14 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T20 |
23 |
|
T111 |
25 |
|
T112 |
6 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1755 |
1 |
|
|
T20 |
49 |
|
T111 |
37 |
|
T112 |
14 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T20 |
26 |
|
T111 |
22 |
|
T112 |
6 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1759 |
1 |
|
|
T20 |
45 |
|
T111 |
43 |
|
T112 |
13 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T20 |
23 |
|
T111 |
25 |
|
T112 |
6 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1716 |
1 |
|
|
T20 |
49 |
|
T111 |
36 |
|
T112 |
14 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T20 |
26 |
|
T111 |
22 |
|
T112 |
6 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1709 |
1 |
|
|
T20 |
45 |
|
T111 |
43 |
|
T112 |
13 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T20 |
23 |
|
T111 |
25 |
|
T112 |
6 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1685 |
1 |
|
|
T20 |
48 |
|
T111 |
36 |
|
T112 |
14 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T20 |
26 |
|
T111 |
22 |
|
T112 |
6 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1669 |
1 |
|
|
T20 |
44 |
|
T111 |
42 |
|
T112 |
12 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T20 |
23 |
|
T111 |
25 |
|
T112 |
6 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1652 |
1 |
|
|
T20 |
47 |
|
T111 |
35 |
|
T112 |
14 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T20 |
26 |
|
T111 |
22 |
|
T112 |
6 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1641 |
1 |
|
|
T20 |
43 |
|
T111 |
42 |
|
T112 |
12 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T20 |
23 |
|
T111 |
25 |
|
T112 |
6 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1614 |
1 |
|
|
T20 |
45 |
|
T111 |
34 |
|
T112 |
13 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T20 |
26 |
|
T111 |
21 |
|
T112 |
6 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1592 |
1 |
|
|
T20 |
42 |
|
T111 |
41 |
|
T112 |
11 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T20 |
23 |
|
T111 |
25 |
|
T112 |
6 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1572 |
1 |
|
|
T20 |
44 |
|
T111 |
33 |
|
T112 |
13 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T20 |
26 |
|
T111 |
21 |
|
T112 |
6 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1559 |
1 |
|
|
T20 |
42 |
|
T111 |
40 |
|
T112 |
11 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T20 |
23 |
|
T111 |
25 |
|
T112 |
6 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1534 |
1 |
|
|
T20 |
43 |
|
T111 |
33 |
|
T112 |
12 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T20 |
25 |
|
T111 |
21 |
|
T112 |
6 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1521 |
1 |
|
|
T20 |
39 |
|
T111 |
39 |
|
T112 |
11 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T20 |
23 |
|
T111 |
25 |
|
T112 |
6 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1498 |
1 |
|
|
T20 |
43 |
|
T111 |
30 |
|
T112 |
12 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T20 |
25 |
|
T111 |
21 |
|
T112 |
6 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1483 |
1 |
|
|
T20 |
39 |
|
T111 |
38 |
|
T112 |
11 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T20 |
23 |
|
T111 |
25 |
|
T112 |
5 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1462 |
1 |
|
|
T20 |
42 |
|
T111 |
29 |
|
T112 |
12 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T20 |
25 |
|
T111 |
21 |
|
T112 |
6 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1434 |
1 |
|
|
T20 |
37 |
|
T111 |
37 |
|
T112 |
11 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T20 |
23 |
|
T111 |
25 |
|
T112 |
5 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1430 |
1 |
|
|
T20 |
39 |
|
T111 |
29 |
|
T112 |
11 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T20 |
25 |
|
T111 |
21 |
|
T112 |
6 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1399 |
1 |
|
|
T20 |
35 |
|
T111 |
36 |
|
T112 |
11 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T20 |
23 |
|
T111 |
25 |
|
T112 |
5 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1407 |
1 |
|
|
T20 |
38 |
|
T111 |
29 |
|
T112 |
11 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T20 |
25 |
|
T111 |
21 |
|
T112 |
6 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1356 |
1 |
|
|
T20 |
34 |
|
T111 |
36 |
|
T112 |
11 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T20 |
23 |
|
T111 |
25 |
|
T112 |
5 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1372 |
1 |
|
|
T20 |
36 |
|
T111 |
26 |
|
T112 |
11 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T20 |
25 |
|
T111 |
21 |
|
T112 |
6 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1323 |
1 |
|
|
T20 |
34 |
|
T111 |
36 |
|
T112 |
11 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T20 |
23 |
|
T111 |
25 |
|
T112 |
5 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1337 |
1 |
|
|
T20 |
36 |
|
T111 |
25 |
|
T112 |
11 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T20 |
25 |
|
T111 |
21 |
|
T112 |
6 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1298 |
1 |
|
|
T20 |
34 |
|
T111 |
36 |
|
T112 |
11 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58701 |
1 |
|
|
T20 |
1970 |
|
T111 |
813 |
|
T112 |
1254 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[0] |
auto[1] |
51806 |
1 |
|
|
T20 |
1669 |
|
T111 |
955 |
|
T112 |
275 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57648 |
1 |
|
|
T20 |
1043 |
|
T111 |
1946 |
|
T112 |
423 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48248 |
1 |
|
|
T20 |
1032 |
|
T111 |
1100 |
|
T112 |
566 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
765 |
1 |
|
|
T20 |
22 |
|
T111 |
14 |
|
T112 |
6 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1761 |
1 |
|
|
T20 |
49 |
|
T111 |
48 |
|
T112 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
765 |
1 |
|
|
T20 |
24 |
|
T111 |
15 |
|
T112 |
2 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1760 |
1 |
|
|
T20 |
47 |
|
T111 |
48 |
|
T112 |
18 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
765 |
1 |
|
|
T20 |
22 |
|
T111 |
14 |
|
T112 |
6 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1734 |
1 |
|
|
T20 |
48 |
|
T111 |
48 |
|
T112 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
765 |
1 |
|
|
T20 |
24 |
|
T111 |
15 |
|
T112 |
2 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1726 |
1 |
|
|
T20 |
46 |
|
T111 |
48 |
|
T112 |
18 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
765 |
1 |
|
|
T20 |
22 |
|
T111 |
14 |
|
T112 |
6 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1684 |
1 |
|
|
T20 |
47 |
|
T111 |
46 |
|
T112 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T20 |
24 |
|
T111 |
15 |
|
T112 |
2 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1697 |
1 |
|
|
T20 |
46 |
|
T111 |
47 |
|
T112 |
18 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
765 |
1 |
|
|
T20 |
22 |
|
T111 |
14 |
|
T112 |
6 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1651 |
1 |
|
|
T20 |
47 |
|
T111 |
45 |
|
T112 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T20 |
24 |
|
T111 |
15 |
|
T112 |
2 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1663 |
1 |
|
|
T20 |
45 |
|
T111 |
46 |
|
T112 |
17 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T20 |
22 |
|
T111 |
14 |
|
T112 |
6 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1618 |
1 |
|
|
T20 |
45 |
|
T111 |
45 |
|
T112 |
14 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T20 |
23 |
|
T111 |
15 |
|
T112 |
2 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1633 |
1 |
|
|
T20 |
46 |
|
T111 |
44 |
|
T112 |
17 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T20 |
22 |
|
T111 |
14 |
|
T112 |
6 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1583 |
1 |
|
|
T20 |
45 |
|
T111 |
44 |
|
T112 |
12 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T20 |
23 |
|
T111 |
15 |
|
T112 |
2 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1597 |
1 |
|
|
T20 |
45 |
|
T111 |
43 |
|
T112 |
17 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T20 |
22 |
|
T111 |
14 |
|
T112 |
5 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1557 |
1 |
|
|
T20 |
44 |
|
T111 |
42 |
|
T112 |
13 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T20 |
23 |
|
T111 |
15 |
|
T112 |
2 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1555 |
1 |
|
|
T20 |
44 |
|
T111 |
42 |
|
T112 |
17 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T20 |
22 |
|
T111 |
14 |
|
T112 |
5 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1521 |
1 |
|
|
T20 |
42 |
|
T111 |
40 |
|
T112 |
13 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T20 |
23 |
|
T111 |
15 |
|
T112 |
2 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1520 |
1 |
|
|
T20 |
44 |
|
T111 |
40 |
|
T112 |
17 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T20 |
22 |
|
T111 |
14 |
|
T112 |
5 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1502 |
1 |
|
|
T20 |
42 |
|
T111 |
40 |
|
T112 |
13 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T20 |
23 |
|
T111 |
15 |
|
T112 |
2 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1481 |
1 |
|
|
T20 |
42 |
|
T111 |
39 |
|
T112 |
17 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T20 |
22 |
|
T111 |
14 |
|
T112 |
5 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1470 |
1 |
|
|
T20 |
41 |
|
T111 |
39 |
|
T112 |
13 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T20 |
23 |
|
T111 |
15 |
|
T112 |
2 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1439 |
1 |
|
|
T20 |
41 |
|
T111 |
37 |
|
T112 |
16 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T20 |
22 |
|
T111 |
14 |
|
T112 |
5 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1418 |
1 |
|
|
T20 |
40 |
|
T111 |
39 |
|
T112 |
12 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T20 |
23 |
|
T111 |
15 |
|
T112 |
2 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1396 |
1 |
|
|
T20 |
39 |
|
T111 |
37 |
|
T112 |
16 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T20 |
22 |
|
T111 |
14 |
|
T112 |
5 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1386 |
1 |
|
|
T20 |
39 |
|
T111 |
38 |
|
T112 |
11 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T20 |
23 |
|
T111 |
15 |
|
T112 |
2 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1356 |
1 |
|
|
T20 |
38 |
|
T111 |
37 |
|
T112 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T20 |
22 |
|
T111 |
14 |
|
T112 |
5 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1355 |
1 |
|
|
T20 |
38 |
|
T111 |
37 |
|
T112 |
11 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T20 |
23 |
|
T111 |
15 |
|
T112 |
2 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1325 |
1 |
|
|
T20 |
37 |
|
T111 |
37 |
|
T112 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T20 |
22 |
|
T111 |
14 |
|
T112 |
5 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1328 |
1 |
|
|
T20 |
38 |
|
T111 |
37 |
|
T112 |
11 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T20 |
23 |
|
T111 |
15 |
|
T112 |
2 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1296 |
1 |
|
|
T20 |
35 |
|
T111 |
36 |
|
T112 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T20 |
22 |
|
T111 |
14 |
|
T112 |
5 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1288 |
1 |
|
|
T20 |
38 |
|
T111 |
35 |
|
T112 |
10 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T20 |
23 |
|
T111 |
15 |
|
T112 |
2 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1265 |
1 |
|
|
T20 |
33 |
|
T111 |
36 |
|
T112 |
15 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[0] |
auto[0] |
63954 |
1 |
|
|
T20 |
1857 |
|
T111 |
647 |
|
T112 |
1568 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45628 |
1 |
|
|
T20 |
1453 |
|
T111 |
872 |
|
T112 |
187 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[1] |
auto[0] |
63182 |
1 |
|
|
T20 |
998 |
|
T111 |
870 |
|
T112 |
462 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[1] |
auto[1] |
43702 |
1 |
|
|
T20 |
1206 |
|
T111 |
2605 |
|
T112 |
278 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T20 |
20 |
|
T111 |
10 |
|
T112 |
12 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1765 |
1 |
|
|
T20 |
60 |
|
T111 |
48 |
|
T112 |
9 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
764 |
1 |
|
|
T20 |
21 |
|
T111 |
7 |
|
T112 |
7 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1761 |
1 |
|
|
T20 |
59 |
|
T111 |
52 |
|
T112 |
13 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T20 |
20 |
|
T111 |
10 |
|
T112 |
12 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1730 |
1 |
|
|
T20 |
60 |
|
T111 |
46 |
|
T112 |
9 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
764 |
1 |
|
|
T20 |
21 |
|
T111 |
7 |
|
T112 |
7 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1725 |
1 |
|
|
T20 |
57 |
|
T111 |
52 |
|
T112 |
13 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T20 |
20 |
|
T111 |
10 |
|
T112 |
12 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1698 |
1 |
|
|
T20 |
59 |
|
T111 |
43 |
|
T112 |
9 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T20 |
21 |
|
T111 |
7 |
|
T112 |
7 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1699 |
1 |
|
|
T20 |
57 |
|
T111 |
52 |
|
T112 |
13 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T20 |
20 |
|
T111 |
10 |
|
T112 |
12 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1665 |
1 |
|
|
T20 |
58 |
|
T111 |
40 |
|
T112 |
9 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T20 |
21 |
|
T111 |
7 |
|
T112 |
7 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1650 |
1 |
|
|
T20 |
57 |
|
T111 |
51 |
|
T112 |
13 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
754 |
1 |
|
|
T20 |
20 |
|
T111 |
10 |
|
T112 |
12 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1635 |
1 |
|
|
T20 |
57 |
|
T111 |
38 |
|
T112 |
9 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T20 |
21 |
|
T111 |
7 |
|
T112 |
7 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1607 |
1 |
|
|
T20 |
55 |
|
T111 |
51 |
|
T112 |
12 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
754 |
1 |
|
|
T20 |
20 |
|
T111 |
10 |
|
T112 |
12 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1596 |
1 |
|
|
T20 |
55 |
|
T111 |
35 |
|
T112 |
8 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T20 |
21 |
|
T111 |
7 |
|
T112 |
7 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1571 |
1 |
|
|
T20 |
52 |
|
T111 |
49 |
|
T112 |
12 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T20 |
20 |
|
T111 |
10 |
|
T112 |
12 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1566 |
1 |
|
|
T20 |
52 |
|
T111 |
33 |
|
T112 |
8 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T20 |
21 |
|
T111 |
7 |
|
T112 |
7 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1533 |
1 |
|
|
T20 |
52 |
|
T111 |
49 |
|
T112 |
12 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T20 |
20 |
|
T111 |
10 |
|
T112 |
12 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1538 |
1 |
|
|
T20 |
49 |
|
T111 |
32 |
|
T112 |
8 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T20 |
21 |
|
T111 |
7 |
|
T112 |
7 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1501 |
1 |
|
|
T20 |
49 |
|
T111 |
49 |
|
T112 |
12 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T20 |
20 |
|
T111 |
10 |
|
T112 |
12 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1496 |
1 |
|
|
T20 |
49 |
|
T111 |
31 |
|
T112 |
7 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T20 |
20 |
|
T111 |
7 |
|
T112 |
7 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1458 |
1 |
|
|
T20 |
47 |
|
T111 |
49 |
|
T112 |
12 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T20 |
20 |
|
T111 |
10 |
|
T112 |
12 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1460 |
1 |
|
|
T20 |
49 |
|
T111 |
31 |
|
T112 |
7 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T20 |
20 |
|
T111 |
7 |
|
T112 |
7 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1432 |
1 |
|
|
T20 |
47 |
|
T111 |
49 |
|
T112 |
12 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T20 |
20 |
|
T111 |
10 |
|
T112 |
12 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1429 |
1 |
|
|
T20 |
49 |
|
T111 |
30 |
|
T112 |
7 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T20 |
20 |
|
T111 |
7 |
|
T112 |
7 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1394 |
1 |
|
|
T20 |
47 |
|
T111 |
47 |
|
T112 |
11 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T20 |
20 |
|
T111 |
10 |
|
T112 |
12 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1399 |
1 |
|
|
T20 |
49 |
|
T111 |
26 |
|
T112 |
7 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T20 |
20 |
|
T111 |
7 |
|
T112 |
7 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1359 |
1 |
|
|
T20 |
44 |
|
T111 |
46 |
|
T112 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T20 |
20 |
|
T111 |
10 |
|
T112 |
12 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1365 |
1 |
|
|
T20 |
49 |
|
T111 |
25 |
|
T112 |
6 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T20 |
20 |
|
T111 |
7 |
|
T112 |
7 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1337 |
1 |
|
|
T20 |
44 |
|
T111 |
46 |
|
T112 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T20 |
20 |
|
T111 |
10 |
|
T112 |
12 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1325 |
1 |
|
|
T20 |
49 |
|
T111 |
25 |
|
T112 |
6 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T20 |
20 |
|
T111 |
7 |
|
T112 |
7 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1302 |
1 |
|
|
T20 |
42 |
|
T111 |
46 |
|
T112 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T20 |
20 |
|
T111 |
10 |
|
T112 |
12 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1290 |
1 |
|
|
T20 |
48 |
|
T111 |
25 |
|
T112 |
6 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T20 |
20 |
|
T111 |
7 |
|
T112 |
7 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1264 |
1 |
|
|
T20 |
41 |
|
T111 |
44 |
|
T112 |
10 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[0] |
auto[0] |
62015 |
1 |
|
|
T20 |
1480 |
|
T111 |
985 |
|
T112 |
392 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46187 |
1 |
|
|
T20 |
1405 |
|
T111 |
916 |
|
T112 |
253 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[1] |
auto[0] |
54239 |
1 |
|
|
T20 |
1170 |
|
T111 |
1112 |
|
T112 |
674 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[1] |
auto[1] |
52826 |
1 |
|
|
T20 |
1771 |
|
T111 |
1912 |
|
T112 |
1181 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T20 |
19 |
|
T111 |
16 |
|
T112 |
8 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1819 |
1 |
|
|
T20 |
51 |
|
T111 |
41 |
|
T112 |
12 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T20 |
15 |
|
T111 |
23 |
|
T112 |
7 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1822 |
1 |
|
|
T20 |
56 |
|
T111 |
35 |
|
T112 |
13 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T20 |
19 |
|
T111 |
16 |
|
T112 |
8 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1781 |
1 |
|
|
T20 |
48 |
|
T111 |
41 |
|
T112 |
12 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T20 |
15 |
|
T111 |
23 |
|
T112 |
7 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1788 |
1 |
|
|
T20 |
56 |
|
T111 |
35 |
|
T112 |
13 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T20 |
19 |
|
T111 |
16 |
|
T112 |
8 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1742 |
1 |
|
|
T20 |
47 |
|
T111 |
40 |
|
T112 |
12 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T20 |
15 |
|
T111 |
23 |
|
T112 |
7 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1756 |
1 |
|
|
T20 |
55 |
|
T111 |
35 |
|
T112 |
13 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T20 |
19 |
|
T111 |
16 |
|
T112 |
8 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1693 |
1 |
|
|
T20 |
44 |
|
T111 |
39 |
|
T112 |
12 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T20 |
15 |
|
T111 |
23 |
|
T112 |
7 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1725 |
1 |
|
|
T20 |
54 |
|
T111 |
34 |
|
T112 |
13 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T20 |
19 |
|
T111 |
16 |
|
T112 |
8 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1666 |
1 |
|
|
T20 |
44 |
|
T111 |
39 |
|
T112 |
12 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T20 |
15 |
|
T111 |
23 |
|
T112 |
7 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1691 |
1 |
|
|
T20 |
51 |
|
T111 |
34 |
|
T112 |
13 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T20 |
19 |
|
T111 |
16 |
|
T112 |
8 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1627 |
1 |
|
|
T20 |
43 |
|
T111 |
36 |
|
T112 |
12 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T20 |
15 |
|
T111 |
23 |
|
T112 |
7 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1652 |
1 |
|
|
T20 |
49 |
|
T111 |
32 |
|
T112 |
13 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T20 |
19 |
|
T111 |
16 |
|
T112 |
7 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1602 |
1 |
|
|
T20 |
43 |
|
T111 |
34 |
|
T112 |
13 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T20 |
15 |
|
T111 |
22 |
|
T112 |
7 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1623 |
1 |
|
|
T20 |
49 |
|
T111 |
30 |
|
T112 |
13 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T20 |
19 |
|
T111 |
16 |
|
T112 |
7 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1562 |
1 |
|
|
T20 |
41 |
|
T111 |
34 |
|
T112 |
13 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T20 |
15 |
|
T111 |
22 |
|
T112 |
7 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1591 |
1 |
|
|
T20 |
46 |
|
T111 |
30 |
|
T112 |
13 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T20 |
19 |
|
T111 |
16 |
|
T112 |
7 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1523 |
1 |
|
|
T20 |
40 |
|
T111 |
33 |
|
T112 |
12 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T20 |
14 |
|
T111 |
22 |
|
T112 |
7 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1560 |
1 |
|
|
T20 |
46 |
|
T111 |
29 |
|
T112 |
13 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T20 |
19 |
|
T111 |
16 |
|
T112 |
7 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1486 |
1 |
|
|
T20 |
39 |
|
T111 |
33 |
|
T112 |
12 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T20 |
14 |
|
T111 |
22 |
|
T112 |
7 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1529 |
1 |
|
|
T20 |
43 |
|
T111 |
29 |
|
T112 |
13 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T20 |
19 |
|
T111 |
16 |
|
T112 |
7 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1447 |
1 |
|
|
T20 |
38 |
|
T111 |
33 |
|
T112 |
11 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T20 |
14 |
|
T111 |
22 |
|
T112 |
7 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1502 |
1 |
|
|
T20 |
43 |
|
T111 |
28 |
|
T112 |
12 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T20 |
19 |
|
T111 |
16 |
|
T112 |
7 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1413 |
1 |
|
|
T20 |
38 |
|
T111 |
32 |
|
T112 |
11 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T20 |
14 |
|
T111 |
22 |
|
T112 |
7 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1460 |
1 |
|
|
T20 |
42 |
|
T111 |
28 |
|
T112 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T20 |
19 |
|
T111 |
16 |
|
T112 |
7 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1368 |
1 |
|
|
T20 |
37 |
|
T111 |
31 |
|
T112 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T20 |
14 |
|
T111 |
22 |
|
T112 |
7 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1426 |
1 |
|
|
T20 |
41 |
|
T111 |
27 |
|
T112 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T20 |
19 |
|
T111 |
16 |
|
T112 |
7 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1324 |
1 |
|
|
T20 |
35 |
|
T111 |
31 |
|
T112 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T20 |
14 |
|
T111 |
22 |
|
T112 |
7 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1390 |
1 |
|
|
T20 |
41 |
|
T111 |
27 |
|
T112 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T20 |
19 |
|
T111 |
16 |
|
T112 |
7 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1293 |
1 |
|
|
T20 |
34 |
|
T111 |
31 |
|
T112 |
8 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T20 |
14 |
|
T111 |
22 |
|
T112 |
7 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1359 |
1 |
|
|
T20 |
41 |
|
T111 |
27 |
|
T112 |
10 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57695 |
1 |
|
|
T20 |
1356 |
|
T111 |
1016 |
|
T112 |
222 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45827 |
1 |
|
|
T20 |
926 |
|
T111 |
874 |
|
T112 |
1411 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[1] |
auto[0] |
61282 |
1 |
|
|
T20 |
1541 |
|
T111 |
1061 |
|
T112 |
473 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[1] |
auto[1] |
51735 |
1 |
|
|
T20 |
1821 |
|
T111 |
1833 |
|
T112 |
322 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
765 |
1 |
|
|
T20 |
24 |
|
T111 |
16 |
|
T112 |
5 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1737 |
1 |
|
|
T20 |
49 |
|
T111 |
46 |
|
T112 |
19 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T20 |
21 |
|
T111 |
16 |
|
T112 |
4 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1750 |
1 |
|
|
T20 |
53 |
|
T111 |
47 |
|
T112 |
19 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
765 |
1 |
|
|
T20 |
24 |
|
T111 |
16 |
|
T112 |
5 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1710 |
1 |
|
|
T20 |
49 |
|
T111 |
45 |
|
T112 |
19 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T20 |
21 |
|
T111 |
16 |
|
T112 |
4 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1717 |
1 |
|
|
T20 |
52 |
|
T111 |
47 |
|
T112 |
19 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
765 |
1 |
|
|
T20 |
24 |
|
T111 |
16 |
|
T112 |
5 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1681 |
1 |
|
|
T20 |
49 |
|
T111 |
45 |
|
T112 |
19 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T20 |
21 |
|
T111 |
16 |
|
T112 |
4 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1686 |
1 |
|
|
T20 |
52 |
|
T111 |
47 |
|
T112 |
18 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
765 |
1 |
|
|
T20 |
24 |
|
T111 |
16 |
|
T112 |
5 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1662 |
1 |
|
|
T20 |
49 |
|
T111 |
44 |
|
T112 |
19 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T20 |
21 |
|
T111 |
16 |
|
T112 |
4 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1653 |
1 |
|
|
T20 |
51 |
|
T111 |
46 |
|
T112 |
18 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
763 |
1 |
|
|
T20 |
24 |
|
T111 |
16 |
|
T112 |
5 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1622 |
1 |
|
|
T20 |
47 |
|
T111 |
43 |
|
T112 |
19 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T20 |
21 |
|
T111 |
16 |
|
T112 |
4 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1617 |
1 |
|
|
T20 |
50 |
|
T111 |
45 |
|
T112 |
17 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
763 |
1 |
|
|
T20 |
24 |
|
T111 |
16 |
|
T112 |
5 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1587 |
1 |
|
|
T20 |
45 |
|
T111 |
42 |
|
T112 |
18 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T20 |
21 |
|
T111 |
16 |
|
T112 |
4 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1587 |
1 |
|
|
T20 |
49 |
|
T111 |
44 |
|
T112 |
17 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
757 |
1 |
|
|
T20 |
24 |
|
T111 |
16 |
|
T112 |
5 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1550 |
1 |
|
|
T20 |
45 |
|
T111 |
41 |
|
T112 |
18 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T20 |
21 |
|
T111 |
16 |
|
T112 |
4 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1551 |
1 |
|
|
T20 |
48 |
|
T111 |
43 |
|
T112 |
17 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
757 |
1 |
|
|
T20 |
24 |
|
T111 |
16 |
|
T112 |
5 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1511 |
1 |
|
|
T20 |
42 |
|
T111 |
39 |
|
T112 |
18 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T20 |
21 |
|
T111 |
16 |
|
T112 |
4 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1516 |
1 |
|
|
T20 |
45 |
|
T111 |
41 |
|
T112 |
17 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T20 |
24 |
|
T111 |
16 |
|
T112 |
5 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1485 |
1 |
|
|
T20 |
42 |
|
T111 |
39 |
|
T112 |
17 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T20 |
20 |
|
T111 |
16 |
|
T112 |
4 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1485 |
1 |
|
|
T20 |
45 |
|
T111 |
41 |
|
T112 |
17 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T20 |
24 |
|
T111 |
16 |
|
T112 |
5 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1450 |
1 |
|
|
T20 |
41 |
|
T111 |
39 |
|
T112 |
16 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T20 |
20 |
|
T111 |
16 |
|
T112 |
4 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1456 |
1 |
|
|
T20 |
45 |
|
T111 |
41 |
|
T112 |
17 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T20 |
24 |
|
T111 |
16 |
|
T112 |
5 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1410 |
1 |
|
|
T20 |
41 |
|
T111 |
36 |
|
T112 |
15 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T20 |
20 |
|
T111 |
16 |
|
T112 |
4 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1422 |
1 |
|
|
T20 |
45 |
|
T111 |
41 |
|
T112 |
17 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T20 |
24 |
|
T111 |
16 |
|
T112 |
5 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1376 |
1 |
|
|
T20 |
39 |
|
T111 |
34 |
|
T112 |
14 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T20 |
20 |
|
T111 |
16 |
|
T112 |
4 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1388 |
1 |
|
|
T20 |
44 |
|
T111 |
40 |
|
T112 |
16 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T20 |
24 |
|
T111 |
16 |
|
T112 |
5 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1345 |
1 |
|
|
T20 |
39 |
|
T111 |
33 |
|
T112 |
14 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T20 |
20 |
|
T111 |
16 |
|
T112 |
4 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1362 |
1 |
|
|
T20 |
43 |
|
T111 |
40 |
|
T112 |
16 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T20 |
24 |
|
T111 |
16 |
|
T112 |
5 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1308 |
1 |
|
|
T20 |
36 |
|
T111 |
33 |
|
T112 |
14 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T20 |
20 |
|
T111 |
16 |
|
T112 |
4 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1330 |
1 |
|
|
T20 |
43 |
|
T111 |
39 |
|
T112 |
15 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T20 |
24 |
|
T111 |
16 |
|
T112 |
5 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1259 |
1 |
|
|
T20 |
31 |
|
T111 |
26 |
|
T112 |
13 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T20 |
20 |
|
T111 |
16 |
|
T112 |
4 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1288 |
1 |
|
|
T20 |
43 |
|
T111 |
38 |
|
T112 |
15 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[0] |
auto[0] |
68125 |
1 |
|
|
T20 |
1416 |
|
T111 |
1352 |
|
T112 |
569 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45098 |
1 |
|
|
T20 |
1559 |
|
T111 |
626 |
|
T112 |
214 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[1] |
auto[0] |
61675 |
1 |
|
|
T20 |
1525 |
|
T111 |
2228 |
|
T112 |
1353 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[1] |
auto[1] |
42129 |
1 |
|
|
T20 |
1101 |
|
T111 |
770 |
|
T112 |
322 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
806 |
1 |
|
|
T20 |
25 |
|
T111 |
16 |
|
T112 |
9 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1695 |
1 |
|
|
T20 |
51 |
|
T111 |
38 |
|
T112 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
805 |
1 |
|
|
T20 |
21 |
|
T111 |
23 |
|
T112 |
9 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1692 |
1 |
|
|
T20 |
55 |
|
T111 |
32 |
|
T112 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
806 |
1 |
|
|
T20 |
25 |
|
T111 |
16 |
|
T112 |
9 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1663 |
1 |
|
|
T20 |
51 |
|
T111 |
38 |
|
T112 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
805 |
1 |
|
|
T20 |
21 |
|
T111 |
23 |
|
T112 |
9 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1660 |
1 |
|
|
T20 |
54 |
|
T111 |
32 |
|
T112 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
806 |
1 |
|
|
T20 |
25 |
|
T111 |
16 |
|
T112 |
9 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1625 |
1 |
|
|
T20 |
51 |
|
T111 |
36 |
|
T112 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
805 |
1 |
|
|
T20 |
21 |
|
T111 |
23 |
|
T112 |
9 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1622 |
1 |
|
|
T20 |
54 |
|
T111 |
31 |
|
T112 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
806 |
1 |
|
|
T20 |
25 |
|
T111 |
16 |
|
T112 |
9 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1594 |
1 |
|
|
T20 |
50 |
|
T111 |
35 |
|
T112 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
805 |
1 |
|
|
T20 |
21 |
|
T111 |
23 |
|
T112 |
9 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1590 |
1 |
|
|
T20 |
51 |
|
T111 |
31 |
|
T112 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
803 |
1 |
|
|
T20 |
25 |
|
T111 |
16 |
|
T112 |
9 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1563 |
1 |
|
|
T20 |
48 |
|
T111 |
35 |
|
T112 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
803 |
1 |
|
|
T20 |
21 |
|
T111 |
23 |
|
T112 |
9 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1555 |
1 |
|
|
T20 |
50 |
|
T111 |
30 |
|
T112 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
803 |
1 |
|
|
T20 |
25 |
|
T111 |
16 |
|
T112 |
9 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1526 |
1 |
|
|
T20 |
47 |
|
T111 |
35 |
|
T112 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
803 |
1 |
|
|
T20 |
21 |
|
T111 |
23 |
|
T112 |
9 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1519 |
1 |
|
|
T20 |
48 |
|
T111 |
30 |
|
T112 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
798 |
1 |
|
|
T20 |
25 |
|
T111 |
16 |
|
T112 |
9 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1488 |
1 |
|
|
T20 |
46 |
|
T111 |
34 |
|
T112 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
798 |
1 |
|
|
T20 |
21 |
|
T111 |
23 |
|
T112 |
9 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1488 |
1 |
|
|
T20 |
48 |
|
T111 |
30 |
|
T112 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
798 |
1 |
|
|
T20 |
25 |
|
T111 |
16 |
|
T112 |
9 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1451 |
1 |
|
|
T20 |
46 |
|
T111 |
33 |
|
T112 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
798 |
1 |
|
|
T20 |
21 |
|
T111 |
23 |
|
T112 |
9 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1444 |
1 |
|
|
T20 |
48 |
|
T111 |
28 |
|
T112 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
797 |
1 |
|
|
T20 |
25 |
|
T111 |
16 |
|
T112 |
9 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1432 |
1 |
|
|
T20 |
46 |
|
T111 |
33 |
|
T112 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
791 |
1 |
|
|
T20 |
20 |
|
T111 |
23 |
|
T112 |
9 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1408 |
1 |
|
|
T20 |
48 |
|
T111 |
26 |
|
T112 |
11 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
797 |
1 |
|
|
T20 |
25 |
|
T111 |
16 |
|
T112 |
9 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1408 |
1 |
|
|
T20 |
43 |
|
T111 |
33 |
|
T112 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
791 |
1 |
|
|
T20 |
20 |
|
T111 |
23 |
|
T112 |
9 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1370 |
1 |
|
|
T20 |
47 |
|
T111 |
26 |
|
T112 |
11 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
794 |
1 |
|
|
T20 |
25 |
|
T111 |
16 |
|
T112 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1374 |
1 |
|
|
T20 |
39 |
|
T111 |
32 |
|
T112 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
788 |
1 |
|
|
T20 |
20 |
|
T111 |
23 |
|
T112 |
9 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1336 |
1 |
|
|
T20 |
45 |
|
T111 |
26 |
|
T112 |
11 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
794 |
1 |
|
|
T20 |
25 |
|
T111 |
16 |
|
T112 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1341 |
1 |
|
|
T20 |
37 |
|
T111 |
32 |
|
T112 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
788 |
1 |
|
|
T20 |
20 |
|
T111 |
23 |
|
T112 |
9 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1310 |
1 |
|
|
T20 |
45 |
|
T111 |
26 |
|
T112 |
11 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
794 |
1 |
|
|
T20 |
25 |
|
T111 |
16 |
|
T112 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1310 |
1 |
|
|
T20 |
37 |
|
T111 |
32 |
|
T112 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
788 |
1 |
|
|
T20 |
20 |
|
T111 |
23 |
|
T112 |
9 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1270 |
1 |
|
|
T20 |
44 |
|
T111 |
26 |
|
T112 |
10 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
794 |
1 |
|
|
T20 |
25 |
|
T111 |
16 |
|
T112 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1272 |
1 |
|
|
T20 |
34 |
|
T111 |
31 |
|
T112 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
788 |
1 |
|
|
T20 |
20 |
|
T111 |
23 |
|
T112 |
9 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1227 |
1 |
|
|
T20 |
43 |
|
T111 |
24 |
|
T112 |
9 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
794 |
1 |
|
|
T20 |
25 |
|
T111 |
16 |
|
T112 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1237 |
1 |
|
|
T20 |
32 |
|
T111 |
30 |
|
T112 |
11 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
788 |
1 |
|
|
T20 |
20 |
|
T111 |
23 |
|
T112 |
9 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1199 |
1 |
|
|
T20 |
42 |
|
T111 |
23 |
|
T112 |
9 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[0] |
auto[0] |
62218 |
1 |
|
|
T20 |
1217 |
|
T111 |
1076 |
|
T112 |
1305 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44855 |
1 |
|
|
T20 |
1575 |
|
T111 |
863 |
|
T112 |
401 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59249 |
1 |
|
|
T20 |
1552 |
|
T111 |
1402 |
|
T112 |
312 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[1] |
auto[1] |
49542 |
1 |
|
|
T20 |
1326 |
|
T111 |
1551 |
|
T112 |
412 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
787 |
1 |
|
|
T20 |
23 |
|
T111 |
19 |
|
T112 |
6 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1762 |
1 |
|
|
T20 |
51 |
|
T111 |
39 |
|
T112 |
19 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T20 |
18 |
|
T111 |
19 |
|
T112 |
3 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1782 |
1 |
|
|
T20 |
56 |
|
T111 |
40 |
|
T112 |
21 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
787 |
1 |
|
|
T20 |
23 |
|
T111 |
19 |
|
T112 |
6 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1725 |
1 |
|
|
T20 |
50 |
|
T111 |
39 |
|
T112 |
19 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T20 |
18 |
|
T111 |
19 |
|
T112 |
3 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1749 |
1 |
|
|
T20 |
55 |
|
T111 |
39 |
|
T112 |
21 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
787 |
1 |
|
|
T20 |
23 |
|
T111 |
19 |
|
T112 |
6 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1675 |
1 |
|
|
T20 |
48 |
|
T111 |
37 |
|
T112 |
18 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
764 |
1 |
|
|
T20 |
18 |
|
T111 |
19 |
|
T112 |
3 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1717 |
1 |
|
|
T20 |
54 |
|
T111 |
39 |
|
T112 |
20 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
787 |
1 |
|
|
T20 |
23 |
|
T111 |
19 |
|
T112 |
6 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1636 |
1 |
|
|
T20 |
47 |
|
T111 |
37 |
|
T112 |
18 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
764 |
1 |
|
|
T20 |
18 |
|
T111 |
19 |
|
T112 |
3 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1686 |
1 |
|
|
T20 |
52 |
|
T111 |
38 |
|
T112 |
20 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
782 |
1 |
|
|
T20 |
23 |
|
T111 |
19 |
|
T112 |
6 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1609 |
1 |
|
|
T20 |
46 |
|
T111 |
36 |
|
T112 |
18 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T20 |
18 |
|
T111 |
19 |
|
T112 |
3 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1654 |
1 |
|
|
T20 |
52 |
|
T111 |
37 |
|
T112 |
19 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
782 |
1 |
|
|
T20 |
23 |
|
T111 |
19 |
|
T112 |
6 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1581 |
1 |
|
|
T20 |
46 |
|
T111 |
36 |
|
T112 |
16 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T20 |
18 |
|
T111 |
19 |
|
T112 |
3 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1626 |
1 |
|
|
T20 |
51 |
|
T111 |
37 |
|
T112 |
19 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
774 |
1 |
|
|
T20 |
23 |
|
T111 |
19 |
|
T112 |
6 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1540 |
1 |
|
|
T20 |
44 |
|
T111 |
36 |
|
T112 |
15 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T20 |
18 |
|
T111 |
19 |
|
T112 |
3 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1594 |
1 |
|
|
T20 |
50 |
|
T111 |
36 |
|
T112 |
19 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
774 |
1 |
|
|
T20 |
23 |
|
T111 |
19 |
|
T112 |
6 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1506 |
1 |
|
|
T20 |
43 |
|
T111 |
35 |
|
T112 |
14 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T20 |
18 |
|
T111 |
19 |
|
T112 |
3 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1559 |
1 |
|
|
T20 |
50 |
|
T111 |
36 |
|
T112 |
19 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T20 |
23 |
|
T111 |
19 |
|
T112 |
6 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1471 |
1 |
|
|
T20 |
43 |
|
T111 |
32 |
|
T112 |
14 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T20 |
18 |
|
T111 |
19 |
|
T112 |
3 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1528 |
1 |
|
|
T20 |
49 |
|
T111 |
36 |
|
T112 |
18 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T20 |
23 |
|
T111 |
19 |
|
T112 |
6 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1431 |
1 |
|
|
T20 |
42 |
|
T111 |
32 |
|
T112 |
14 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T20 |
18 |
|
T111 |
19 |
|
T112 |
3 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1481 |
1 |
|
|
T20 |
47 |
|
T111 |
35 |
|
T112 |
18 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T20 |
23 |
|
T111 |
19 |
|
T112 |
6 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1381 |
1 |
|
|
T20 |
39 |
|
T111 |
32 |
|
T112 |
13 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T20 |
18 |
|
T111 |
19 |
|
T112 |
3 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1448 |
1 |
|
|
T20 |
47 |
|
T111 |
33 |
|
T112 |
18 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T20 |
23 |
|
T111 |
19 |
|
T112 |
6 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1335 |
1 |
|
|
T20 |
35 |
|
T111 |
31 |
|
T112 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T20 |
18 |
|
T111 |
19 |
|
T112 |
3 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1417 |
1 |
|
|
T20 |
47 |
|
T111 |
32 |
|
T112 |
18 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T20 |
23 |
|
T111 |
19 |
|
T112 |
6 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1295 |
1 |
|
|
T20 |
34 |
|
T111 |
29 |
|
T112 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T20 |
18 |
|
T111 |
19 |
|
T112 |
3 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1389 |
1 |
|
|
T20 |
46 |
|
T111 |
29 |
|
T112 |
18 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T20 |
23 |
|
T111 |
19 |
|
T112 |
6 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1254 |
1 |
|
|
T20 |
34 |
|
T111 |
28 |
|
T112 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T20 |
18 |
|
T111 |
19 |
|
T112 |
3 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1363 |
1 |
|
|
T20 |
45 |
|
T111 |
27 |
|
T112 |
18 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T20 |
23 |
|
T111 |
19 |
|
T112 |
6 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1219 |
1 |
|
|
T20 |
32 |
|
T111 |
27 |
|
T112 |
10 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T20 |
18 |
|
T111 |
19 |
|
T112 |
3 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1331 |
1 |
|
|
T20 |
44 |
|
T111 |
27 |
|
T112 |
18 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[0] |
auto[0] |
65175 |
1 |
|
|
T20 |
1498 |
|
T111 |
1157 |
|
T112 |
1339 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46873 |
1 |
|
|
T20 |
1232 |
|
T111 |
962 |
|
T112 |
385 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[1] |
auto[0] |
58767 |
1 |
|
|
T20 |
1916 |
|
T111 |
842 |
|
T112 |
418 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45987 |
1 |
|
|
T20 |
1111 |
|
T111 |
1838 |
|
T112 |
365 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
765 |
1 |
|
|
T20 |
20 |
|
T111 |
16 |
|
T112 |
4 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1742 |
1 |
|
|
T20 |
50 |
|
T111 |
46 |
|
T112 |
17 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T20 |
19 |
|
T111 |
15 |
|
T112 |
5 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1758 |
1 |
|
|
T20 |
52 |
|
T111 |
48 |
|
T112 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
765 |
1 |
|
|
T20 |
20 |
|
T111 |
16 |
|
T112 |
4 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1702 |
1 |
|
|
T20 |
50 |
|
T111 |
43 |
|
T112 |
16 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T20 |
19 |
|
T111 |
15 |
|
T112 |
5 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1720 |
1 |
|
|
T20 |
50 |
|
T111 |
48 |
|
T112 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
765 |
1 |
|
|
T20 |
20 |
|
T111 |
16 |
|
T112 |
4 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1674 |
1 |
|
|
T20 |
50 |
|
T111 |
43 |
|
T112 |
16 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T20 |
19 |
|
T111 |
15 |
|
T112 |
5 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1688 |
1 |
|
|
T20 |
49 |
|
T111 |
46 |
|
T112 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
765 |
1 |
|
|
T20 |
20 |
|
T111 |
16 |
|
T112 |
4 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1647 |
1 |
|
|
T20 |
50 |
|
T111 |
43 |
|
T112 |
16 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T20 |
19 |
|
T111 |
15 |
|
T112 |
5 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1647 |
1 |
|
|
T20 |
46 |
|
T111 |
46 |
|
T112 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
762 |
1 |
|
|
T20 |
20 |
|
T111 |
16 |
|
T112 |
4 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1608 |
1 |
|
|
T20 |
49 |
|
T111 |
43 |
|
T112 |
16 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T20 |
19 |
|
T111 |
15 |
|
T112 |
5 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1614 |
1 |
|
|
T20 |
45 |
|
T111 |
45 |
|
T112 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
762 |
1 |
|
|
T20 |
20 |
|
T111 |
16 |
|
T112 |
4 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1584 |
1 |
|
|
T20 |
48 |
|
T111 |
41 |
|
T112 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T20 |
19 |
|
T111 |
15 |
|
T112 |
5 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1574 |
1 |
|
|
T20 |
44 |
|
T111 |
45 |
|
T112 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T20 |
20 |
|
T111 |
16 |
|
T112 |
3 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1550 |
1 |
|
|
T20 |
48 |
|
T111 |
40 |
|
T112 |
16 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T20 |
19 |
|
T111 |
14 |
|
T112 |
5 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1540 |
1 |
|
|
T20 |
43 |
|
T111 |
44 |
|
T112 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T20 |
20 |
|
T111 |
16 |
|
T112 |
3 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1520 |
1 |
|
|
T20 |
46 |
|
T111 |
39 |
|
T112 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T20 |
19 |
|
T111 |
14 |
|
T112 |
5 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1509 |
1 |
|
|
T20 |
42 |
|
T111 |
44 |
|
T112 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T20 |
20 |
|
T111 |
16 |
|
T112 |
3 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1483 |
1 |
|
|
T20 |
45 |
|
T111 |
39 |
|
T112 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T20 |
19 |
|
T111 |
14 |
|
T112 |
5 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1466 |
1 |
|
|
T20 |
40 |
|
T111 |
44 |
|
T112 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T20 |
20 |
|
T111 |
16 |
|
T112 |
3 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1451 |
1 |
|
|
T20 |
43 |
|
T111 |
36 |
|
T112 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T20 |
19 |
|
T111 |
14 |
|
T112 |
5 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1432 |
1 |
|
|
T20 |
40 |
|
T111 |
43 |
|
T112 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T20 |
20 |
|
T111 |
16 |
|
T112 |
3 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1432 |
1 |
|
|
T20 |
42 |
|
T111 |
36 |
|
T112 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T20 |
19 |
|
T111 |
14 |
|
T112 |
5 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1402 |
1 |
|
|
T20 |
40 |
|
T111 |
42 |
|
T112 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T20 |
20 |
|
T111 |
16 |
|
T112 |
3 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1394 |
1 |
|
|
T20 |
41 |
|
T111 |
36 |
|
T112 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T20 |
19 |
|
T111 |
14 |
|
T112 |
5 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1371 |
1 |
|
|
T20 |
39 |
|
T111 |
40 |
|
T112 |
13 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T20 |
20 |
|
T111 |
16 |
|
T112 |
3 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1366 |
1 |
|
|
T20 |
39 |
|
T111 |
35 |
|
T112 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T20 |
19 |
|
T111 |
14 |
|
T112 |
5 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1323 |
1 |
|
|
T20 |
39 |
|
T111 |
39 |
|
T112 |
13 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T20 |
20 |
|
T111 |
16 |
|
T112 |
3 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1316 |
1 |
|
|
T20 |
39 |
|
T111 |
34 |
|
T112 |
13 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T20 |
19 |
|
T111 |
14 |
|
T112 |
5 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1288 |
1 |
|
|
T20 |
38 |
|
T111 |
38 |
|
T112 |
13 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T20 |
20 |
|
T111 |
16 |
|
T112 |
3 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1275 |
1 |
|
|
T20 |
37 |
|
T111 |
32 |
|
T112 |
13 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T20 |
19 |
|
T111 |
14 |
|
T112 |
5 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1252 |
1 |
|
|
T20 |
38 |
|
T111 |
36 |
|
T112 |
12 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58415 |
1 |
|
|
T20 |
1685 |
|
T111 |
1025 |
|
T112 |
554 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47068 |
1 |
|
|
T20 |
568 |
|
T111 |
633 |
|
T112 |
364 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[1] |
auto[0] |
65496 |
1 |
|
|
T20 |
2843 |
|
T111 |
1714 |
|
T112 |
431 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45730 |
1 |
|
|
T20 |
868 |
|
T111 |
1851 |
|
T112 |
1195 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
801 |
1 |
|
|
T20 |
29 |
|
T111 |
18 |
|
T112 |
9 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1705 |
1 |
|
|
T20 |
34 |
|
T111 |
29 |
|
T112 |
10 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
771 |
1 |
|
|
T20 |
27 |
|
T111 |
15 |
|
T112 |
7 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1738 |
1 |
|
|
T20 |
37 |
|
T111 |
33 |
|
T112 |
12 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
801 |
1 |
|
|
T20 |
29 |
|
T111 |
18 |
|
T112 |
9 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1659 |
1 |
|
|
T20 |
33 |
|
T111 |
26 |
|
T112 |
9 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
771 |
1 |
|
|
T20 |
27 |
|
T111 |
15 |
|
T112 |
7 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1707 |
1 |
|
|
T20 |
36 |
|
T111 |
32 |
|
T112 |
12 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
801 |
1 |
|
|
T20 |
29 |
|
T111 |
18 |
|
T112 |
9 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1619 |
1 |
|
|
T20 |
32 |
|
T111 |
25 |
|
T112 |
9 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
769 |
1 |
|
|
T20 |
27 |
|
T111 |
15 |
|
T112 |
7 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1680 |
1 |
|
|
T20 |
36 |
|
T111 |
31 |
|
T112 |
12 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
801 |
1 |
|
|
T20 |
29 |
|
T111 |
18 |
|
T112 |
9 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1589 |
1 |
|
|
T20 |
30 |
|
T111 |
25 |
|
T112 |
9 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
769 |
1 |
|
|
T20 |
27 |
|
T111 |
15 |
|
T112 |
7 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1655 |
1 |
|
|
T20 |
34 |
|
T111 |
31 |
|
T112 |
12 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
796 |
1 |
|
|
T20 |
29 |
|
T111 |
18 |
|
T112 |
9 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1558 |
1 |
|
|
T20 |
29 |
|
T111 |
25 |
|
T112 |
9 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T20 |
26 |
|
T111 |
15 |
|
T112 |
7 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1627 |
1 |
|
|
T20 |
33 |
|
T111 |
31 |
|
T112 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
796 |
1 |
|
|
T20 |
29 |
|
T111 |
18 |
|
T112 |
9 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1511 |
1 |
|
|
T20 |
29 |
|
T111 |
25 |
|
T112 |
9 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T20 |
26 |
|
T111 |
15 |
|
T112 |
7 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1588 |
1 |
|
|
T20 |
32 |
|
T111 |
31 |
|
T112 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
790 |
1 |
|
|
T20 |
29 |
|
T111 |
18 |
|
T112 |
9 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1486 |
1 |
|
|
T20 |
29 |
|
T111 |
25 |
|
T112 |
9 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T20 |
26 |
|
T111 |
14 |
|
T112 |
7 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1561 |
1 |
|
|
T20 |
32 |
|
T111 |
31 |
|
T112 |
10 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
790 |
1 |
|
|
T20 |
29 |
|
T111 |
18 |
|
T112 |
9 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1457 |
1 |
|
|
T20 |
28 |
|
T111 |
24 |
|
T112 |
9 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T20 |
26 |
|
T111 |
14 |
|
T112 |
7 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1527 |
1 |
|
|
T20 |
30 |
|
T111 |
30 |
|
T112 |
10 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
788 |
1 |
|
|
T20 |
29 |
|
T111 |
18 |
|
T112 |
9 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1413 |
1 |
|
|
T20 |
28 |
|
T111 |
22 |
|
T112 |
9 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T20 |
26 |
|
T111 |
14 |
|
T112 |
7 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1501 |
1 |
|
|
T20 |
29 |
|
T111 |
30 |
|
T112 |
10 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
788 |
1 |
|
|
T20 |
29 |
|
T111 |
18 |
|
T112 |
9 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1370 |
1 |
|
|
T20 |
24 |
|
T111 |
20 |
|
T112 |
9 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T20 |
26 |
|
T111 |
14 |
|
T112 |
7 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1460 |
1 |
|
|
T20 |
28 |
|
T111 |
29 |
|
T112 |
10 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
786 |
1 |
|
|
T20 |
29 |
|
T111 |
18 |
|
T112 |
8 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1340 |
1 |
|
|
T20 |
24 |
|
T111 |
18 |
|
T112 |
8 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T20 |
26 |
|
T111 |
14 |
|
T112 |
7 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1429 |
1 |
|
|
T20 |
28 |
|
T111 |
29 |
|
T112 |
10 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
786 |
1 |
|
|
T20 |
29 |
|
T111 |
18 |
|
T112 |
8 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1307 |
1 |
|
|
T20 |
24 |
|
T111 |
17 |
|
T112 |
8 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T20 |
26 |
|
T111 |
14 |
|
T112 |
7 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1393 |
1 |
|
|
T20 |
26 |
|
T111 |
29 |
|
T112 |
10 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
786 |
1 |
|
|
T20 |
29 |
|
T111 |
18 |
|
T112 |
8 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1279 |
1 |
|
|
T20 |
24 |
|
T111 |
16 |
|
T112 |
8 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T20 |
26 |
|
T111 |
14 |
|
T112 |
7 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1371 |
1 |
|
|
T20 |
26 |
|
T111 |
29 |
|
T112 |
10 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
786 |
1 |
|
|
T20 |
29 |
|
T111 |
18 |
|
T112 |
8 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1246 |
1 |
|
|
T20 |
23 |
|
T111 |
16 |
|
T112 |
8 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T20 |
26 |
|
T111 |
14 |
|
T112 |
7 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1337 |
1 |
|
|
T20 |
26 |
|
T111 |
28 |
|
T112 |
10 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
786 |
1 |
|
|
T20 |
29 |
|
T111 |
18 |
|
T112 |
8 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1211 |
1 |
|
|
T20 |
22 |
|
T111 |
15 |
|
T112 |
8 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T20 |
26 |
|
T111 |
14 |
|
T112 |
7 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1303 |
1 |
|
|
T20 |
25 |
|
T111 |
28 |
|
T112 |
10 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[0] |
auto[0] |
64268 |
1 |
|
|
T20 |
1798 |
|
T111 |
900 |
|
T112 |
1466 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[0] |
auto[1] |
50781 |
1 |
|
|
T20 |
1312 |
|
T111 |
1703 |
|
T112 |
328 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[1] |
auto[0] |
52385 |
1 |
|
|
T20 |
1603 |
|
T111 |
1076 |
|
T112 |
418 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[1] |
auto[1] |
49251 |
1 |
|
|
T20 |
1019 |
|
T111 |
1230 |
|
T112 |
278 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
754 |
1 |
|
|
T20 |
32 |
|
T111 |
16 |
|
T112 |
7 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1760 |
1 |
|
|
T20 |
38 |
|
T111 |
41 |
|
T112 |
15 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T20 |
29 |
|
T111 |
16 |
|
T112 |
7 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1782 |
1 |
|
|
T20 |
41 |
|
T111 |
41 |
|
T112 |
14 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
754 |
1 |
|
|
T20 |
32 |
|
T111 |
16 |
|
T112 |
7 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1726 |
1 |
|
|
T20 |
36 |
|
T111 |
40 |
|
T112 |
14 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T20 |
29 |
|
T111 |
16 |
|
T112 |
7 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1750 |
1 |
|
|
T20 |
41 |
|
T111 |
40 |
|
T112 |
14 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
754 |
1 |
|
|
T20 |
32 |
|
T111 |
16 |
|
T112 |
7 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1689 |
1 |
|
|
T20 |
35 |
|
T111 |
39 |
|
T112 |
14 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T20 |
29 |
|
T111 |
16 |
|
T112 |
7 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1713 |
1 |
|
|
T20 |
40 |
|
T111 |
40 |
|
T112 |
13 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
754 |
1 |
|
|
T20 |
32 |
|
T111 |
16 |
|
T112 |
7 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1652 |
1 |
|
|
T20 |
33 |
|
T111 |
39 |
|
T112 |
14 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T20 |
29 |
|
T111 |
16 |
|
T112 |
7 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1684 |
1 |
|
|
T20 |
40 |
|
T111 |
39 |
|
T112 |
13 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T20 |
32 |
|
T111 |
16 |
|
T112 |
7 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1619 |
1 |
|
|
T20 |
33 |
|
T111 |
39 |
|
T112 |
13 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T20 |
28 |
|
T111 |
16 |
|
T112 |
7 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1655 |
1 |
|
|
T20 |
40 |
|
T111 |
39 |
|
T112 |
13 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T20 |
32 |
|
T111 |
16 |
|
T112 |
7 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1578 |
1 |
|
|
T20 |
33 |
|
T111 |
38 |
|
T112 |
13 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T20 |
28 |
|
T111 |
16 |
|
T112 |
7 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1623 |
1 |
|
|
T20 |
39 |
|
T111 |
38 |
|
T112 |
13 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T20 |
32 |
|
T111 |
16 |
|
T112 |
6 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1542 |
1 |
|
|
T20 |
32 |
|
T111 |
35 |
|
T112 |
14 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T20 |
28 |
|
T111 |
16 |
|
T112 |
7 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1581 |
1 |
|
|
T20 |
38 |
|
T111 |
38 |
|
T112 |
13 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T20 |
32 |
|
T111 |
16 |
|
T112 |
6 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1512 |
1 |
|
|
T20 |
30 |
|
T111 |
35 |
|
T112 |
14 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T20 |
28 |
|
T111 |
16 |
|
T112 |
7 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1542 |
1 |
|
|
T20 |
38 |
|
T111 |
38 |
|
T112 |
13 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T20 |
32 |
|
T111 |
16 |
|
T112 |
6 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1484 |
1 |
|
|
T20 |
30 |
|
T111 |
34 |
|
T112 |
14 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T20 |
28 |
|
T111 |
16 |
|
T112 |
7 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1508 |
1 |
|
|
T20 |
37 |
|
T111 |
38 |
|
T112 |
12 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T20 |
32 |
|
T111 |
16 |
|
T112 |
6 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1447 |
1 |
|
|
T20 |
29 |
|
T111 |
34 |
|
T112 |
14 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T20 |
28 |
|
T111 |
16 |
|
T112 |
7 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1483 |
1 |
|
|
T20 |
37 |
|
T111 |
38 |
|
T112 |
12 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T20 |
32 |
|
T111 |
16 |
|
T112 |
6 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1412 |
1 |
|
|
T20 |
28 |
|
T111 |
33 |
|
T112 |
12 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T20 |
28 |
|
T111 |
16 |
|
T112 |
7 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1450 |
1 |
|
|
T20 |
36 |
|
T111 |
38 |
|
T112 |
12 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T20 |
32 |
|
T111 |
16 |
|
T112 |
6 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1374 |
1 |
|
|
T20 |
28 |
|
T111 |
32 |
|
T112 |
11 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T20 |
28 |
|
T111 |
16 |
|
T112 |
7 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1407 |
1 |
|
|
T20 |
36 |
|
T111 |
38 |
|
T112 |
11 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T20 |
32 |
|
T111 |
16 |
|
T112 |
6 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1347 |
1 |
|
|
T20 |
27 |
|
T111 |
32 |
|
T112 |
11 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T20 |
28 |
|
T111 |
16 |
|
T112 |
7 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1372 |
1 |
|
|
T20 |
35 |
|
T111 |
36 |
|
T112 |
11 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T20 |
32 |
|
T111 |
16 |
|
T112 |
6 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1317 |
1 |
|
|
T20 |
25 |
|
T111 |
29 |
|
T112 |
11 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T20 |
28 |
|
T111 |
16 |
|
T112 |
7 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1351 |
1 |
|
|
T20 |
35 |
|
T111 |
35 |
|
T112 |
10 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T20 |
32 |
|
T111 |
16 |
|
T112 |
6 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1283 |
1 |
|
|
T20 |
23 |
|
T111 |
29 |
|
T112 |
11 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T20 |
28 |
|
T111 |
16 |
|
T112 |
7 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1321 |
1 |
|
|
T20 |
35 |
|
T111 |
35 |
|
T112 |
10 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[0] |
auto[0] |
64442 |
1 |
|
|
T20 |
2050 |
|
T111 |
1915 |
|
T112 |
340 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48012 |
1 |
|
|
T20 |
1487 |
|
T111 |
683 |
|
T112 |
260 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[1] |
auto[0] |
61004 |
1 |
|
|
T20 |
1409 |
|
T111 |
2004 |
|
T112 |
344 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[1] |
auto[1] |
42980 |
1 |
|
|
T20 |
957 |
|
T111 |
570 |
|
T112 |
1505 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
779 |
1 |
|
|
T20 |
25 |
|
T111 |
21 |
|
T112 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1743 |
1 |
|
|
T20 |
40 |
|
T111 |
28 |
|
T112 |
15 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
784 |
1 |
|
|
T20 |
22 |
|
T111 |
23 |
|
T112 |
5 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1733 |
1 |
|
|
T20 |
43 |
|
T111 |
27 |
|
T112 |
18 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
779 |
1 |
|
|
T20 |
25 |
|
T111 |
21 |
|
T112 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1707 |
1 |
|
|
T20 |
38 |
|
T111 |
27 |
|
T112 |
15 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
784 |
1 |
|
|
T20 |
22 |
|
T111 |
23 |
|
T112 |
5 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1700 |
1 |
|
|
T20 |
43 |
|
T111 |
25 |
|
T112 |
18 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
779 |
1 |
|
|
T20 |
25 |
|
T111 |
21 |
|
T112 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1675 |
1 |
|
|
T20 |
37 |
|
T111 |
25 |
|
T112 |
13 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
781 |
1 |
|
|
T20 |
22 |
|
T111 |
23 |
|
T112 |
5 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1670 |
1 |
|
|
T20 |
43 |
|
T111 |
24 |
|
T112 |
18 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
779 |
1 |
|
|
T20 |
25 |
|
T111 |
21 |
|
T112 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1644 |
1 |
|
|
T20 |
36 |
|
T111 |
24 |
|
T112 |
12 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
781 |
1 |
|
|
T20 |
22 |
|
T111 |
23 |
|
T112 |
5 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1635 |
1 |
|
|
T20 |
41 |
|
T111 |
23 |
|
T112 |
18 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
775 |
1 |
|
|
T20 |
25 |
|
T111 |
21 |
|
T112 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1596 |
1 |
|
|
T20 |
36 |
|
T111 |
22 |
|
T112 |
11 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
781 |
1 |
|
|
T20 |
22 |
|
T111 |
23 |
|
T112 |
5 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1592 |
1 |
|
|
T20 |
40 |
|
T111 |
22 |
|
T112 |
18 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
775 |
1 |
|
|
T20 |
25 |
|
T111 |
21 |
|
T112 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1554 |
1 |
|
|
T20 |
35 |
|
T111 |
22 |
|
T112 |
11 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
781 |
1 |
|
|
T20 |
22 |
|
T111 |
23 |
|
T112 |
5 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1556 |
1 |
|
|
T20 |
39 |
|
T111 |
22 |
|
T112 |
18 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T20 |
25 |
|
T111 |
21 |
|
T112 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1522 |
1 |
|
|
T20 |
32 |
|
T111 |
21 |
|
T112 |
11 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
777 |
1 |
|
|
T20 |
22 |
|
T111 |
23 |
|
T112 |
5 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1528 |
1 |
|
|
T20 |
39 |
|
T111 |
22 |
|
T112 |
18 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T20 |
25 |
|
T111 |
21 |
|
T112 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1483 |
1 |
|
|
T20 |
31 |
|
T111 |
21 |
|
T112 |
11 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
777 |
1 |
|
|
T20 |
22 |
|
T111 |
23 |
|
T112 |
5 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1503 |
1 |
|
|
T20 |
38 |
|
T111 |
22 |
|
T112 |
18 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
767 |
1 |
|
|
T20 |
25 |
|
T111 |
21 |
|
T112 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1450 |
1 |
|
|
T20 |
29 |
|
T111 |
21 |
|
T112 |
11 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
772 |
1 |
|
|
T20 |
21 |
|
T111 |
23 |
|
T112 |
5 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1480 |
1 |
|
|
T20 |
38 |
|
T111 |
21 |
|
T112 |
18 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
767 |
1 |
|
|
T20 |
25 |
|
T111 |
21 |
|
T112 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1425 |
1 |
|
|
T20 |
29 |
|
T111 |
21 |
|
T112 |
11 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
772 |
1 |
|
|
T20 |
21 |
|
T111 |
23 |
|
T112 |
5 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1444 |
1 |
|
|
T20 |
38 |
|
T111 |
20 |
|
T112 |
18 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
765 |
1 |
|
|
T20 |
25 |
|
T111 |
21 |
|
T112 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1395 |
1 |
|
|
T20 |
29 |
|
T111 |
21 |
|
T112 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
769 |
1 |
|
|
T20 |
21 |
|
T111 |
23 |
|
T112 |
5 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1415 |
1 |
|
|
T20 |
38 |
|
T111 |
20 |
|
T112 |
18 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
765 |
1 |
|
|
T20 |
25 |
|
T111 |
21 |
|
T112 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1360 |
1 |
|
|
T20 |
27 |
|
T111 |
20 |
|
T112 |
7 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
769 |
1 |
|
|
T20 |
21 |
|
T111 |
23 |
|
T112 |
5 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1379 |
1 |
|
|
T20 |
38 |
|
T111 |
20 |
|
T112 |
18 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
764 |
1 |
|
|
T20 |
25 |
|
T111 |
21 |
|
T112 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1328 |
1 |
|
|
T20 |
26 |
|
T111 |
19 |
|
T112 |
7 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
768 |
1 |
|
|
T20 |
21 |
|
T111 |
23 |
|
T112 |
5 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1343 |
1 |
|
|
T20 |
38 |
|
T111 |
20 |
|
T112 |
18 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
764 |
1 |
|
|
T20 |
25 |
|
T111 |
21 |
|
T112 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1294 |
1 |
|
|
T20 |
24 |
|
T111 |
19 |
|
T112 |
7 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
768 |
1 |
|
|
T20 |
21 |
|
T111 |
23 |
|
T112 |
5 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1309 |
1 |
|
|
T20 |
38 |
|
T111 |
20 |
|
T112 |
18 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
764 |
1 |
|
|
T20 |
25 |
|
T111 |
21 |
|
T112 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1260 |
1 |
|
|
T20 |
24 |
|
T111 |
19 |
|
T112 |
6 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
768 |
1 |
|
|
T20 |
21 |
|
T111 |
23 |
|
T112 |
5 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1275 |
1 |
|
|
T20 |
36 |
|
T111 |
19 |
|
T112 |
18 |