Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7152174 |
1 |
|
|
T18 |
79 |
|
T19 |
95 |
|
T20 |
1542 |
| auto[1] |
5209008 |
1 |
|
|
T1 |
237 |
|
T2 |
20221 |
|
T11 |
1057 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
11701554 |
1 |
|
|
T18 |
79 |
|
T19 |
95 |
|
T20 |
1542 |
| auto[1] |
659628 |
1 |
|
|
T1 |
13 |
|
T2 |
1345 |
|
T11 |
51 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7177807 |
1 |
|
|
T18 |
79 |
|
T19 |
95 |
|
T20 |
1542 |
| auto[1] |
5183375 |
1 |
|
|
T1 |
218 |
|
T2 |
20321 |
|
T11 |
1129 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
2253411 |
1 |
|
|
T1 |
83 |
|
T2 |
9508 |
|
T11 |
577 |
| auto[1] |
auto[0] |
auto[1] |
328893 |
1 |
|
|
T1 |
8 |
|
T2 |
701 |
|
T11 |
26 |
| auto[1] |
auto[1] |
auto[0] |
2270336 |
1 |
|
|
T1 |
122 |
|
T2 |
9468 |
|
T11 |
501 |
| auto[1] |
auto[1] |
auto[1] |
330735 |
1 |
|
|
T1 |
5 |
|
T2 |
644 |
|
T11 |
25 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |